Flip Flops

Results: 3
Packaging
BulkTube
Function
ResetSet(Preset) and Reset
Type
D-TypeJK Type
Clock Frequency
50 MHz60 MHz
Max Propagation Delay @ V, Max CL
28ns @ 6V, 50pF30ns @ 6V, 50pF
Trigger Type
Negative EdgePositive Edge
Input Capacitance
3 pF10 pF
Operating Temperature
-55°C ~ 125°C (TA)-40°C ~ 85°C (TA)
Stocking Options
Environmental Options
Media
Marketplace Product
3Results

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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Function
Type
Output Type
Number of Elements
Number of Bits per Element
Clock Frequency
Max Propagation Delay @ V, Max CL
Trigger Type
Current - Output High, Low
Voltage - Supply
Current - Quiescent (Iq)
Input Capacitance
Operating Temperature
Mounting Type
Supplier Device Package
Package / Case
14-PDIP
SN74HC74N
IC FF D-TYPE DUAL 1BIT 14DIP
Texas Instruments
5,439
In Stock
88,612
Marketplace
1 : ¥7.88000
Tube
Bulk
Tube
Active
Set(Preset) and Reset
D-Type
Complementary
2
1
60 MHz
30ns @ 6V, 50pF
Positive Edge
5.2mA, 5.2mA
2V ~ 6V
4 µA
3 pF
-40°C ~ 85°C (TA)
Through Hole
14-PDIP
14-DIP (0.300", 7.62mm)
14-Dip
CD74HC74E
IC FF D-TYPE DUAL 1BIT 14DIP
Texas Instruments
1,520
In Stock
1 : ¥7.14000
Tube
Tube
Active
Set(Preset) and Reset
D-Type
Complementary
2
1
50 MHz
30ns @ 6V, 50pF
Positive Edge
5.2mA, 5.2mA
2V ~ 6V
4 µA
10 pF
-55°C ~ 125°C (TA)
Through Hole
14-PDIP
14-DIP (0.300", 7.62mm)
14-Dip
CD74HC73E
IC FF JK TYPE DUAL 1BIT 14DIP
Texas Instruments
2,498
In Stock
1,273
Marketplace
1 : ¥7.39000
Tube
Bulk
Tube
Active
Reset
JK Type
Complementary
2
1
60 MHz
28ns @ 6V, 50pF
Negative Edge
5.2mA, 5.2mA
2V ~ 6V
4 µA
10 pF
-55°C ~ 125°C (TA)
Through Hole
14-PDIP
14-DIP (0.300", 7.62mm)
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of 3

Flip Flops


Flip-flops are elementary digital memory devices capable of storing a single logic state or "bit" of information. They have at least two inputs; one or more to communicate the data to be stored and another to indicate the point in time to store it. Different flip-flop types such as D (delay), SR (Set-Reset), and JK respond differently to the signals presented to their inputs and can be used to implement different logical functions. They differ from latches in that they are edge sensitive devices, whose retained logic state changes only at the moment a valid clock signal is received.