TS3USB221A-Q1 Datasheet by Texas Instruments

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

TS3USB221A-Q1

SCDS300E –JULY 2010–REVISED JUNE 2020

TS3USB221A-Q1 ESD Protected, High-Speed USB 2.0 (480 Mbps)

1:2 Multiplexer/Demultiplexer Switch With Single Enable

1 Features

1• Qualified for Automotive Applications

• AEC-Q100 Qualified With the Following Results:

– Device Temperature Grade 1: –40°C to 125°C

Ambient Operating Temperature Range

– Device HBM ESD Classification Level H2

– Device CDM ESD Classification Level C5

• VCC Operation at 2.5 V to 3.3 V

• VI/O Accepts Signals Up to 5.5 V

• 1.8-V Compatible Control-Pin Inputs

• Low-Power Mode When OE Is Disabled (1 µA)

• rON = 16 ΩMaximum

•ΔrON = 0.2 ΩTypical

• Cio(on) = 6 pF Typical

• Low Power Consumption (30 µA Maximum)

• High Bandwidth (900 MHz Typical)

• ESD Performance Tested Per JESD 22

– 7000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

• ESD Performance I/O to GND Per JESD 22

– 12-kV Human-Body Model

2 Applications

• Routing High Speed USB Signals

• Automotive USB Hubs

• Phone-Controlled Automotive Infotainment

3 Description

The TS3USB221A-Q1 is a high-bandwidth switch

specially designed for the switching of high-speed

USB 2.0 signals in automotive USB hubs or

controllers with limited USB I/Os. The wide bandwidth

(900 MHz) of this switch allows signals to pass with

minimum edge and phase distortion. The device

multiplexes differential outputs from a USB host

device to one of two corresponding outputs. The

switch is bidirectional and offers little or no

attenuation of the high-speed signals at the outputs. It

is designed for low bit-to-bit skew and high channel-

to-channel noise isolation, and is compatible with

various standards, such as high-speed USB 2.0 (480

Mbps).

The TS3USB221A-Q1 integrates ESD protection cells

on all pins, is available in a tiny UQFN package

(2 mm × 1.5 mm) and is characterized over the free

air temperature range from –40°C to 125°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

TS3USB221A-Q1 UQFN (10) 1.50 mm × 2.00 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Block Diagram

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 3

6.1 Absolute Maximum Ratings ...................................... 3

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Dynamic Electrical Characteristics: VCC = 3.3 V....... 5

6.7 Dynamic Electrical Characteristics: VCC = 2.5 V....... 6

6.8 Switching Characteristics: VCC = 3.3 V..................... 6

6.9 Switching Characteristics: VCC = 2.5 V..................... 6

6.10 Typical Characteristics............................................ 7

7 Parameter Measurement Information .................. 8

8 Detailed Description............................................ 12

8.1 Overview ................................................................. 12

8.2 Functional Block Diagram....................................... 12

8.3 Feature Description................................................. 12

8.4 Device Functional Modes........................................ 13

9 Application and Implementation ........................ 14

9.1 Application Information............................................ 14

9.2 Typical Application ................................................. 14

10 Power Supply Recommendations ..................... 16

11 Layout................................................................... 16

11.1 Layout Guidelines ................................................. 16

11.2 Layout Example .................................................... 17

12 Device and Documentation Support ................. 18

12.1 Receiving Notification of Documentation Updates 18

12.2 Community Resource............................................ 18

12.3 Trademarks........................................................... 18

12.4 Electrostatic Discharge Caution............................ 18

12.5 Glossary................................................................ 18

13 Mechanical, Packaging, and Orderable

Information ........................................................... 18

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (August 2016) to Revision E Page

• Changed CDM spec to align with AEC Q100-011 ................................................................................................................ 4

Changes from Revision C (October 2012) to Revision D Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section ................................................................................................. 1

• Deleted the Ordering Information table; see the POA at the end of the data sheet .............................................................. 1

• Updated Applications section ................................................................................................................................................. 1

• Changed "in handset and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or

controllers with limited USB I/Os" to "in automotive USB hubs or controllers with limited USB I/Os" in Description section 1

• Changed the RθJA and RθJC(top) values in theThermal Information table, and added more thermal values ............................ 4

Changes from Revision B (July 2011) to Revision C Page

• Added AEC-Q100 info to Features......................................................................................................................................... 1

• Added "Per JESD 22" to ESD Performance I/O to GND in Features. ................................................................................... 1

• Added ESD ratings to Abs Max table..................................................................................................................................... 4

l TEXAS INSTRUMENTS E UUUU j ﬂﬂﬂﬂ

VCC

D+

D–

1D+

1D–

2D+

2D–

GND

110

VCC

D+

D–

1D+

1D–

2D+

2D–

GND

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5 Pin Configuration and Functions

RSE Package

10-Pin UQFN

Top View

RSE Package

10-Pin UQFN

Bottom View

Pin Functions

PIN I/O DESCRIPTION

NO. NAME

1 1D+ I/O USB port 1

2 1D– I/O

3 2D+ I/O USB port 2

4 2D– I/O

5 GND — Ground

6 OE I Bus-switch enable

8 D+ I/O Common USB port

7 D– I/O

9 S I Select input

10 VCC — Supply voltage

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to ground, unless otherwise specified.

(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

(4) VIand VOare used to denote specific conditions for VI/O.

(5) IIand IOare used to denote specific conditions for II/O.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN MAX UNIT

VCC Supply voltage –0.5 4.6 V

VIN Control input voltage(2) (3) –0.5 7 V

VI/O Switch I/O voltage(2) (3) (4) –0.5 7 V

IIK Control input clamp current VIN < 0 –50 mA

II/OK I/O port clamp current VI/O < 0 –50 mA

II/O ON-state switch current(5) ±120 mA

Continuous current through VCC or GND ±100 mA

Tstg Storage temperature –65 150 °C

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(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

VALUE UNIT

V(ESD) Electrostatic discharge

Human-body model (HBM), per AEC Q100-002

Classification Level H2(1) ±2000

Charged-device model (CDM), per AEC Q100-011

Classification C5

±750 for

corner pins

±500 for all

other pins

6.3 Recommended Operating Conditions

MIN MAX UNIT

VCC Supply voltage 2.3 3.6 V

VIH High-level control input voltage VCC = 2.3 V to 2.7 V 0.46 × VCC V

VCC = 2.7 V to 3.6 V 0.46 × VCC

VIL Low-level control input voltage VCC = 2.3 V to 2.7 V 0.25 × VCC V

VCC = 2.7 V to 3.6 V 0.25 × VCC

VI/O Data input/output voltage 0 5.5 V

TAOperating free-air temperature –40 125 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

THERMAL METRIC(1)

TS3USB221A-Q1

UNITRSE (UQFN)

10 PINS

RθJA Junction-to-ambient thermal resistance 179.9 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 107.9 °C/W

RθJB Junction-to-board thermal resistance 100.7 °C/W

ψJT Junction-to-top characterization parameter 7.1 °C/W

ψJB Junction-to-board characterization parameter 100 °C/W

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(1) VIN and IIN refer to control inputs. VI, VO, II, and IOrefer to data pins.

(2) All typical values are at VCC = 3.3 V (unless otherwise noted), TA= 25°C.

(3) For I/O ports, the parameter IOZ includes the input leakage current.

(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.

(5) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is

determined by the lower of the voltages of the two (A or B) terminals.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)(1)

PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT

VIK Input-source clamp

voltage VCC = 3.6 V, 2.7 V, II= –18 mA –1.8 V

IIN Input leakage current,

control inputs VCC = 3.6 V, 2.7 V, 0 V, VIN = 0 V to 3.6 V ±1 µA

IOZ (3) Off-state leakage

current VCC = 3.6 V, 2.7 V, VO= 0 V to 5.25 V, VI= 0 V, VIN = VCC or GND,

Switch OFF ±1 µA

I(OFF) Power-off leakage

current VCC = 0 V

VI/O = 0 V to 5.25 V ±2

µAVI/O = 0 V to 3.6 V ±2

VI/O = 0 V to 2.7 V ±1

ICC Supply current VCC = 3.6 V, 2.7 V, VIN = VCC or GND, II/O = 0 V, Switch ON or OFF 30 µA

ICC Supply current (low

power mode) VCC = 3.6 V, 2.7 V, VIN = VCC or GND, Switch disabled, OE in high

state 1 µA

ΔICC (4) Supply-current

change, control inputs

One input at 1.8 V,

Other inputs at VCC or

GND

VCC = 3.6 V 20 µA

VCC = 2.7 V 0.5

Cin Input capacitance,

control inputs VCC = 3.3 V, 2.5 V, VIN = VCC or 0 V 1.5 2.5 pF

Cio(OFF) OFF capacitance VCC = 3.3 V, 2.5 V, VI/O = VCC or 0 V, Switch OFF 3.5 5 pF

Cio(ON) ON capacitance VCC = 3.3 V, 2.5 V, VI/O = VCC or 0 V, Switch ON 6 7.5 pF

RON (5) ON-state resistance VCC = 3 V, 2.3 V

VI= 0 V, IO= 30 mA

TA= 25°C

3 6

VI= 2.4 V, IO= –15

mA 3.4 6

VI= 0 V, IO= 30 mA

TA= 125°C

6 10

VI= 2.4 V, IO= –15

mA 10 16

ΔRON

ON-state resistance

match between

channels VCC = 3 V, 2.3 V VI= 0 V, IO= 30 mA 0.2

VI= 1.7, IO= –15 mA 0.2

rON(flat) ON-state resistance

flatness VCC = 3 V, 2.3 V VI= 0 V, IO= 30 mA 1 Ω

VI= 1.7, IO= –15 mA 1

6.6 Dynamic Electrical Characteristics: VCC = 3.3 V

over operating range, TA= –40°C to 125°C, VCC = 3.3 V ±10%, GND = 0 V

PARAMETER TEST CONDITIONS TYP UNIT

XTALK Crosstalk RL= 50 , f = 250 MHz –40 dB

OIRR OFF isolation RL= 50 , f = 250 MHz –41 dB

BW Bandwidth (–3 dB) RL= 50 0.9 GHz

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6.7 Dynamic Electrical Characteristics: VCC = 2.5 V

over operating range, TA= –40°C to 125°C, VCC = 2.5 V ±10%, GND = 0 V

PARAMETER TEST CONDITIONS TYP UNIT

XTALK Crosstalk RL= 50 , f = 250 MHz –39 dB

OIRR OFF isolation RL= 50 , f = 250 MHz –40 dB

BW Bandwidth (3 dB) RL= 50 0.9 GHz

(1) For Max or Min conditions, use the appropriate value specified under Dynamic Electrical Characteristics: VCC = 3.3 V for the applicable

device type.

(2) Specified by design

(3) The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance.

The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise

and fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when

used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven

side.

6.8 Switching Characteristics: VCC = 3.3 V

over operating range, TA= –40°C to 125°C, VCC = 3.3 V ±10%, GND = 0 V

PARAMETER MIN TYP(1) MAX UNIT

tpd Propagation delay(2) (3) 0.25 ns

tON Line enable time S to D, nD 30 ns

OE to D, nD 17

tOFF Line disable time S to D, nD 12 ns

OE to D, nD 10

tSK(O) Output skew between center port to any other port(2) 0.1 0.2 ns

tSK(P) Skew between opposite transitions of the same output (tPHL– tPLH)(2) 0.1 0.2 ns

(1) For Max or Min conditions, use the appropriate value specified under Dynamic Electrical Characteristics: VCC = 2.5 V for the applicable

device type.

(2) Specified by design

(3) The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance.

The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise/fall

times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when used in

a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.

6.9 Switching Characteristics: VCC = 2.5 V

over operating range, TA= –40°C to 125°C, VCC = 2.5 V ±10%, GND = 0 V

PARAMETER MIN TYP(1) MAX UNIT

tpd Propagation delay(2) (3) 0.25 ns

tON Line enable time S to D, nD 50 ns

OE to D, nD 32

tOFF Line disable time S to D, nD 23 ns

OE to D, nD 12

tSK(O) Output skew between center port to any other port(2) 0.1 0.2 ns

tSK(P) Skew between opposite transitions of the same output (tPHL– tPLH)(2) 0.1 0.2 ns

l TEXAS INSTRUMENTS

2.8

2.9

3.0

3.1

3.2

3.3

3.4

3.5

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

V (V)

r ( )

on Ω

V = 3 V

V = 2.3 V

2.8

2.9

3.0

3.1

3.2

3.3

3.4

3.5

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

V (V)

r ( )

on Ω

V = 3 V

V = 2.3 V

–120

–100

–80

–60

–40

–20

100.0E+3 1.0E+6 10.0E+6 100.0E+6 1.0E+9 10.0E+9

Frequency (Hz)

Attenuation (dB)

100.0E+3 1.0E+6 10.0E+6 100.0E+6 1.0E+9 10.0E+9

Frequency (Hz)

–7

–6

–5

–4

–3

–2

–1

Gain (dB)

100.0E+3 1.0E+6 10.0E+6 100.0E+6 1.0E+9 10.0E+9

Frequency (Hz)

–120

–100

–80

–60

–40

–20

Attenuation (dB)

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6.10 Typical Characteristics

Figure 1. Gain vs Frequency Figure 2. OFF Isolation vs Frequency

Figure 3. Crosstalk vs Frequency Figure 4. ron vs VIN (IOUT = –15 mA)

Figure 5. rON vs VIN (IOUT = 30 mA)

‘H—Ivvv—o \ “H“W Hm 47

VIN

VCC

GND

Source

S ig n al

VCTRL S

50 

Network Analyzer

50 

VOUT1

VOUT2

50 

Channel ON: 1D to D

Channel OFF: 2D to D

VCTRL = VCC to GND

Network Analyzer Setup

Source Power= 0 dBm

(632-mV P-P at 50-load)

DC Bias= 350 mV

VOUT1

VIN

50 

VCC

GND

Source

Signal

VCTRL

Network Analyzer

50 

Channel OFF: 1D to D

VCTRL = VCC or GND

Network Analyzer Setup

Source Power = 0 dBm

(632-mV P-P at 50-load)

DC Bias = 350 mV

CLRL

VIN

VCC

GND

1D or 2D

VCTRL

1D or 2D

Logic

Input

V+

VCOM

500 

RLCL

50 pFtON

TEST

V+

500 50 pFtOFF

50%

tON tOFF

50%

90% 90%

Logic

Input

(VI)

1.8 V

Switch

Output

(VOUT1 or VOUT2)

VOH

VOL

VOUT1 or VOUT2

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7 Parameter Measurement Information

Figure 6. Turn-On (tON) and Turn-Off Time (tOFF)

Figure 7. OFF Isolation (OISO)

Figure 8. Crosstalk (XTALK)

‘5‘ TEXAS INSTRUMENTS

Input

Output

tPLH tPLH

400 mV

800 mV

50% 50%

VOH

VOL

VCC

GND

VCTRL

DVIN

Source

Signal

Network Analyzer

50 

50 VOUT1 Channel ON: 1D to D

VCTRL=VCC or GND

Network Analyzer Setup

Source Power= 0 d Bm

(632-mV P-P at 50-load)

DC Bias= 350 mV

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Parameter Measurement Information (continued)

Figure 9. Bandwidth (BW)

Figure 10. Propagation Delay

‘5‘ TEXAS INSTRUMENTS i,

VCC

IIN

GND

VCTRL

DVIN

VOUT1

IN OUT2 OUT1

CTRL IH IL

Channel ON

V V or V



VOUT2

800mV

400mV

50% 50%

50%

50%50%

50%

OUTPUTSKEWtSK(P)

PULSESKEWtSK(P)

t = t t

SK(P) PHL PLH

| – |

t = t t

SK(O) PLH1 PLH2

| – | or | – |t t

PHL1 PHL2

Input

Output

Output2

Output1

VOL

VOH

tPLH

tSK(O) tSK(O)

tPHL2

tPLH2

tPLH1 tPHL1

tPHL

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Parameter Measurement Information (continued)

Figure 11. Skew Test

Figure 12. ON-State Resistance (ron)

l TEXAS INSTRUMENTS Hwy T T“ J W 37 [ F ‘HMJ

VCC

GND

VBIAS

Capacitance

Meter

VOUT1

VBIAS= VCC or GND

VCTRL= VCC or GND

Capacitance is measured at 1D,

2D, D, and S inputs during ON

and of OFF conditions.

VOUT1

VIN

VCTRL

VCC

GND

DVIN

VOUT1

VOUT2

OFF- State Leakage Current

Channel OFF

VCTRL=VIH or VIL

VCTRL

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Parameter Measurement Information (continued)

Figure 13. OFF-State Leakage Current

Figure 14. Capacitance

‘5‘ TEXAS INSTRUMENTS

A B

Charge

Pump

VCC

Dí

D+

1Dí

1D+

2Dí

2D+

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8 Detailed Description

8.1 Overview

The TS3USB221A-Q1 device is a 2-channel SPDT switch specially designed for the switching of high-speed

USB 2.0 signals in automotive applications, such as USB hubs. The wide bandwidth (900 MHz) of this switch

allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from

a USB host device to one of two corresponding outputs. The switch is bidirectional and offers little or no

attenuation of the high-speed signals at the outputs. The device also has a low power mode that will reduce the

power consumption to 1 µA for portable applications with a battery or limited power budget.

The device is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with

various standards, such as high-speed USB 2.0 (480 Mbps).

The TS3USB221A-Q1 device integrates ESD protection cells on all pins, is available in a tiny UQFN package

(2 mm × 1.5 mm) and is characterized over the free air temperature range from –40°C to 125°C.

8.2 Functional Block Diagram

Figure 15. Block Diagram

EN is the internal enable signal applied to the switch.

Figure 16. Simplified Schematic of Each FET Switch (SW)

8.3 Feature Description

8.3.1 Low Power Mode

The TS3USB221A-Q1 has a low power mode that reduces the power consumption to 1 µA while the devices is

not in use. To put the device in low power mode and disable the switch, the bus-switch enable pin OE must be

supplied with a logic High signal.

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8.4 Device Functional Modes

Table 1 lists the functions of this device.

Table 1. Truth Table

S OE FUNCTION

X H Disconnect

L L D = 1D

H L D = 2D

l TEXAS INSTRUMENTS w

TS3USB221A-Q1

2-channel

VCC

D+

D-

GND

System

Controller

USB Port 1

USB Port 2

3.3 V

USB

Controller

Switch

Control Logic

2D+

2D-

1D+

1D-

0.1 F 0.1 F

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

There are many USB applications in which the USB hubs or controllers have a limited number of USB I/Os. The

TS3USB221A-Q1 solution can effectively expand the limited USB I/Os by switching between multiple USB buses

to interface them to a single USB hub or controller.

9.2 Typical Application

Figure 17. Application Schematic

9.2.1 Design Requirements

Design requirements of the USB 1.0,1.1, and 2.0 standards should be followed.

TI recommends pulling the digital control pins S and OE up to VCC or down to GND to avoid undesired switch

positions that could result from the floating pin.

9.2.2 Detailed Design Procedure

The TS3USB221A-Q1 can be properly operated without any external components. However, TI recommends

connecting unused pins to ground through a 50-Ωresistor to prevent signal reflections back into the device.

l TEXAS INSTRUMENTS

Time ( 10 ) (s)X–9

Differential Signal (V)

0.0

–0.5

0.5

–0.4

0.4

–0.3

0.3

–0.2

0.2

–0.1

0.1

0.0

0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 2.0

Time ( 10 ) (s)X–9

Differential Signal (V)

0.0

–0.5

0.5

–0.4

0.4

–0.3

0.3

–0.2

0.2

–0.1

0.1

0.0

0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 2.0

Time ( 10 ) (s)X–9

Differential Signal (V)

0.0

–0.5

0.5

–0.4

0.4

–0.3

0.3

–0.2

0.2

–0.1

0.1

0.0

0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 2.0

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SCDS300E –JULY 2010–REVISED JUNE 2020

Product Folder Links: TS3USB221A-Q1

Typical Application (continued)

9.2.3 Application Curves

Figure 18. Eye Pattern: 480-Mbps USB Signal With No

Switch (Through Path) Figure 19. Eye Pattern: 480-Mbps USB Signal With Switch

NC Path

Figure 20. Eye Pattern: 480-Mbps USB Signal With Switch NO Path

l TEXAS INSTRUMENTS

Signal 1

GND Plane

Power Plane

Signal 2

TS3USB221A-Q1

SCDS300E –JULY 2010–REVISED JUNE 2020

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Product Folder Links: TS3USB221A-Q1

10 Power Supply Recommendations

Power to the device is supplied through the VCC pin and should follow the USB 1.0, 1.1, and 2.0 standards. TI

recommends placing a bypass capacitor as close to the supply pin VCC to help smooth out lower frequency

noise to provide better load regulation across the frequency spectrum.

11 Layout

11.1 Layout Guidelines

Place supply bypass capacitors as close to VCC pin as possible, and avoid placing the bypass capacitors near

the D+/D- traces.

The high speed D+/D- traces should always be matched lengths and must be no more than 4 inches; otherwise,

the eye diagram performance may be degraded. A high-speed USB connection is made through a shielded,

twisted pair cable with a differential characteristic impedance. In layout, the impedance of D+ and D- traces

should match the cable characteristic differential impedance for optimal performance.

Route the high-speed USB signals using a minimum of vias and corners which will reduce signal reflections and

impedance changes. When a via must be used, increase the clearance size around it to minimize its

capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of

picking up interference from the other layers of the board. Be careful when designing test points on twisted pair

lines; through-hole pins are not recommended.

When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This

reduces reflections on the signal traces by minimizing impedance discontinuities.

Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators,

mounting holes, magnetic devices or IC’s that use or duplicate clock signals.

Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then

the stub should be less than 200 mm.

Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions.

Avoid crossing over anti-etch, commonly found with plane splits.

Due to high frequencies associated with the USB, TI recommends a printed-circuit board with at least four layers;

two signal layers separated by a ground and power layer as shown in Figure 21.

Figure 21. Four-Layer Board Stack-Up

The majority of signal traces should run on a single layer, preferably Signal 1. Immediately next to this layer

should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or

power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing

the number of signal vias reduces EMI by reducing inductance at high frequencies.

' TEXAS INSTRUMENTS \\\\\\\\ wwwwww

1D-

2D-

VCC

D+

LEGEND

VIA to Power Plane

VIA to GND Plane

Polygonal Copper Pour

Bypass Capacitor

V+

D-

2D+

GND

1D+

To Microcontroller

To USB Host

USB Port 1

USB Port 2

TS3USB221A-Q1

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SCDS300E –JULY 2010–REVISED JUNE 2020

Product Folder Links: TS3USB221A-Q1

11.2 Layout Example

Figure 22. Package Layout Diagram

l TEXAS INSTRUMENTS

TS3USB221A-Q1

SCDS300E –JULY 2010–REVISED JUNE 2020

www.ti.com

Product Folder Links: TS3USB221A-Q1

12 Device and Documentation Support

12.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

12.2 Community Resource

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

12.3 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

I TEXAS INSTRUMENTS Samples

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

TS3USB221AQRSERQ1 ACTIVE UQFN RSE 10 3000 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 OFW

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TS3USB221A-Q1 :

I TEXAS INSTRUMENTS

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

•Catalog: TS3USB221A

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

I TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS 7 “KO '«PT» Reel Diame|er AD Dimension des‘gned to accommodate the componem wwdlh E0 Dimension damned to eccemmodam the component \ength KO Dimenslun desgned to accommodate the componem thickness 7 w Overen with loe earner cape i p1 Pitch between successwe cavuy eemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D O Sprockemoles ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pocket Quadrams

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

TS3USB221AQRSERQ1 UQFN RSE 10 3000 180.0 8.4 1.68 2.13 0.76 4.0 8.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 30-May-2020

Pack Materials-Page 1

I TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TS3USB221AQRSERQ1 UQFN RSE 10 3000 223.0 270.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 30-May-2020

Pack Materials-Page 2

+ ; it 7 71:7 7 74 E J --l $4Ly-LFU‘% 7 j i i y \ ‘ w 2* "’7”‘1”r”" * T i L * 7% 1 $ w%‘\‘\\ :J D v 7

www.ti.com

PACKAGE OUTLINE

0.6

0.5

0.05

0.00

1.5

6X 0.5

8X 0.4

0.3

4X 0.3

0.2

2X 0.45

0.35

4X 0.25

0.15

2X 0.35

0.25

B1.55

1.45 A

2.05

1.95

(0.12)

TYP

UQFN - 0.6 mm max heightRSE0010A

PLASTIC QUAD FLATPACK - NO LEAD

4220307/A 03/2020

PIN 1 INDEX AREA

SEATING PLANE

0.05 C

0.1 C A B

0.05 C

SYMM

0.1 C A B

0.05 C

0.1 C A B

0.05 C

PIN 1 ID

(45 X 0.1)

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

SCALE 7.000

www.ti.com

EXAMPLE BOARD LAYOUT

2X (0.6)

2X (0.3)

(0.2)

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

8X (0.55)

4X (0.25)

6X (0.5)

(1.35)

(1.8)

(R0.05) TYP

UQFN - 0.6 mm max heightRSE0010A

PLASTIC QUAD FLATPACK - NO LEAD

4220307/A 03/2020

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:30X

NOTES: (continued)

3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).

METAL

SOLDER MASK

OPENING

SOLDER MASK DETAILS

NOT TO SCALE

NON SOLDER MASK

DEFINED

(PREFERRED)

EXPOSED

METAL

SOLDER MASK

OPENING

METAL

UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

www.ti.com

EXAMPLE STENCIL DESIGN

8X (0.55)

4X (0.25)

2X (0.6)

(0.3)

(1.35)

(1.8)

4X (0.2)

6X (0.5)

(R0.05) TYP

UQFN - 0.6 mm max heightRSE0010A

PLASTIC QUAD FLATPACK - NO LEAD

4220307/A 03/2020

NOTES: (continued)

5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICKNESS

SCALE: 30X

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

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permission to use these resources only for development of an application that uses the TI products described in the resource. Other

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

TS3USB221A-Q1 Datasheet by Texas Instruments

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