TFBS4650 Datasheet by Vishay Semiconductor Opto Division

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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 1Document Number: 84672
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Infrared Transceiver, 9.6 kbit/s to 115.2 kbit/s (SIR)
ADDITIONAL RESOURCES
DESCRIPTION
The TFBS4650 is one of the smallest IrDA® compliant
transceivers available. It supports data rates up to 115
kbit/s. The transceiver consists of a PIN photodiode,
infrared emitter, and control IC in a single package.
FEATURES
•Compliant with the IrDA physical layer IrPHY 1.4
(low power specification, 9.6 kbit/s to
115.2 kbit/s)
• Link distance: 30 cm/20 cm full 15° cone with
standard or low power IrDA, respectively.
Emission intensity can be set by an external
resistor to increase the range for extended low
power spec to > 50 cm
• Typical transmission distance to standard device: 50 cm
• Small package (L x W x H in mm): 6.8 x 2.8 x 1.6
• Low current consumption 75 μA idle at 3.6 V
• Shutdown current 10 nA typical at 25 °C
• Operates from 2.4 V to 5.5 V within specification over full
temperature range from -30 °C to +85 °C
• Split power supply, emitter can be driven by a separate
power supply not loading the regulated.
U.S. pat. no. 6,157,476
• Qualified for lead (Pb)-free and Sn/Pb processing (MSL4)
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
• Mobile phone
•PDAs
20206
3
3
3
D
D
D
3
D
3D Models
PRODUCT SUMMARY
PART NUMBER DATA RATE
(kbit/s)
DIMENSIONS
H x L x W
(mm x mm x mm)
LINK DISTANCE
(m)
OPERATING
VOLTAGE
(V)
IDLE SUPPLY
CURRENT
(mA)
TFBS4650 115.2 1.6 x 6.8 x 2.8 0 to ≥ 0.3 2.4 to 5.5 0.075
PARTS TABLE
PART DESCRIPTION QTY/REEL
TFBS4650-TR1 Oriented in carrier tape for side view surface mounting 1000 pcs
TFBS4650-TR3 Oriented in carrier tape for side view surface mounting 2500 pcs
TFBS4650-TT3 Oriented in carrier tape for top view surface mounting 2500 pcs
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 2Document Number: 84672
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FUNCTIONAL BLOCK DIAGRAM
PINOUT
TFBS4650, bottom view
weight 0.05 g
Definitions:
In the Vishay transceiver datasheets the following
nomenclature is used for defining the IrDA operating modes:
• SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial
infrared standard with the physical layer version IrPhy 1.0
• MIR: 576 kbit/s to 1152 kbit/s
•FIR: 4 Mbit/s
• VFIR: 16 Mbit/s
MIR and FIR were implemented with IrPhy 1.1, followed by
IrPhy 1.2, adding the SIR low power standard. IrPhy 1.3
extended the low power option to MIR and FIR and VFIR
was added with IrPhy 1.4. A new version of the standard in
any case obsoletes the former version.
PIN DESCRIPTION
PIN NUMBER SYMBOL DESCRIPTION I/O ACTIVE
1IREDA
IRED anode, connected via a current limiting resistor to VCC2. A separate
unregulated power supply can be used.
2 IREDC IRED cathode, do not connect for standard operation.
3TXD
Transmitter data input. Setting this input above the threshold turns on the
transmitter. This input switches the IRED with the maximum transmit pulse width
of about 100 μs.
IHigh
4RXD
Receiver output. Normally high, goes low for a defined pulse duration with the
rising edge of the optical input signal. Output is a CMOS tri-state driver, which
swings between ground and VCC. Receiver echoes transmitter output.
OLow
5SD
Shutdown. Logic low at this input enables the receiver, enables the transmitter,
and un-tri-states the receiver output. It must be driven high for shutting down the
transceiver.
IHigh
6V
CC Power supply, 2.4 V to 5.5 V. This pin provides power for the receiver and
transmitter drive section. Connect VCC1 via an optional filter.
7 GND Ground
IRED driver
TXD
SD
GND
V
CC
IREDA
RXD
Tri-state
driver
PD
IRED
ASIC
IREDC
19283
Comparator
Mode
control
Amplifier
19284
Pin 1 Pin 7
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 3Document Number: 84672
For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
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Notes
• Reference point pin, ground unless otherwise noted
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing
(1) Sn/lead (Pb)-free soldering. The product passed Vishay’s standard convection reflow profile soldering test
Note
• Vishay transceivers operating inside the absolute maximum ratings are classified as eye safe according the above table
ABSOLUTE MAXIMUM RATINGS
PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
Supply voltage range, transceiver 0 V < VCC2 < 6 V VCC1 -0.5 - 6 V
Supply voltage range, transmitter 0 V < VCC1 < 6 V VCC2 -0.5 - 6 V
Voltage at RXD All states VIN -0.5 - VCC + 0.5 V
Input voltage range, transmitter TXD Independent of VCC1 or VCC2 VIN -0.5 - 6 V
Input currents For all pins,
except IRED anode pin -40 - 40 mA
Output sinking current --20mA
Power dissipation PD- - 250 mW
Junction temperature TJ- - 125 °C
Ambient temperature range (operating) Tamb -30 - +85 °C
Storage temperature range Tstg -40 - +100 °C
Soldering temperature (1) See section
“Recommended Solder Profile” ---°C
Repetitive pulse output current < 90 μs, ton < 20 % IIRED (RP) - - 500 mA
Average output current (transmitter) IIRED (DC) - - 100 mA
Thermal resistance junction-to-ambient JESD51 RthJA - 300 - K/W
EYE SAFETY INFORMATION
STANDARD CLASSIFICATION
IEC/EN 60825-1 (2007-03), DIN EN 60825-1 (2008-05) “SAFETY OF LASER PRODUCTS -
Part 1: equipment classification and requirements”, simplified method Class 1
IEC 62471 (2006), CIE S009 (2002) “Photobiological Safety of Lamps and Lamp Systems” Exempt
DIRECTIVE 2006/25/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 5th April 2006
on the minimum health and safety requirements regarding the exposure of workers to risks arising
from physical agents (artificial optical radiation) (19th individual directive within the meaning of article
16(1) of directive 89/391/EEC)
Exempt
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 4Document Number: 84672
For technical questions within your region: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com
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Note
• Typical values are for design aid only, not guaranteed nor subject to production testing
ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, VCC = 2.4 V to 5.5 V unless otherwise noted)
PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
TRANSCEIVER
Supply voltage range VCC 2.4 - 5.5 V
Dynamic supply current
Idle, dark ambient
SD = low (< 0.8 V),
Eeamb = 0 klx,
Ee < 4 mW/m2
-25 °C ≤ T ≤ +85 °C
ICC -90130μA
Idle, dark ambient
SD = low (< 0.8 V),
Eeamb= 0 klx,
Ee < 4 mW/m2
T = +25 °C
ICC -75 - μA
Peak supply current during
transmission SD = low, TXD = high Iccpk -2 3mA
Shutdown supply current
dark ambient
SD = high
(> VCC - 0.5 V),
T = 25 °C, Ee = 0 klx
ISD --0.1μA
Shutdown supply current, dark
ambient
SD = high
(> VCC - 0.5 V),
-25 °C ≤ T ≤ +85 °C
ISD -- 1μA
Operating temperature range TA-30 - +85 °C
Input voltage low (TXD, SD) VIL -0.5 - 0.5 V
Input voltage high VCC = 2.4 V to 5.5 V VIH VCC - 0.5 - 6 V
Input voltage threshold SD VCC = 2.4 V to 5.5 V 0.9 1.35 1.8 V
Output voltage low VCC = 2.4 V to 5.5 V
CLOAD = 15 pF VOL -0.5 - VCC x 0.15 V
Output voltage high VCC = 2.4 V to 5.5 V
CLOAD = 15 pF VOH VCC x 0.8 - VCC + 0.5 V
RXD to VCC pull-up impedance SD = VCC
VCC = 2.4 V to 5 V RRXD - 500 - kΩ
Input capacitance
(TXD, SD) CI-- 6pF
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 5Document Number: 84672
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
• Typical values are for design aid only, not guaranteed nor subject to production testing
(2) This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent lamps.
(3) IrDA sensitivity definition: minimum irradiance Ee in angular range, power per unit area. The receiver must meet the BER specification while
the source is operating at the minimum intensity in angular range into the minimum half-angular range at the maximum link length
(4) Maximum irradiance Ee in angular range, power per unit area. The optical delivered to the detector by a source operating at the maximum
intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible related link errors. If placed at
the active output interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification. For more
definitions see the document “Symbols and Terminology” on the Vishay website
(5) RXD output is edge triggered by the rising edge of the optical input signal. The output pulse duration is independent of the input pulse
duration
(6) The radiant intensity can be adjusted by the external current limiting resistor to adapt the intensity to the desired value. The given value is
for minimum current consumption. This transceiver can be adapted to > 50 cm operation by increasing the current to > 200 mA, e.g.
operating the transceiver without current control resistor (i.e. R1 = 0 Ω) and using the internal current control
OPTOELECTRONIC CHARACTERISTICS (Tamb = 25 °C, VCC = 2.4 V to 5.5 V unless otherwise noted)
PARAMETER TEST CONDITIONS SYMBOL MIN. TYP. MAX. UNIT
RECEIVER
Sensitivity:
minimum irradiance Ee in
angular range (1)(2)
9.6 kbit/s to 115.2 kbit/s
λ = 850 nm to 900 nm Ee-40
(4)
81
(8.1)
mW/m2
(μW/cm2)
Maximum irradiance Ee in
angular range λ = 850 nm to 900 nm Ee5
(500) --
kW/m2
(mW/cm2)
No receiver output input
irradiance (3)
According to IrDA IrPHY 1.4,
appendix A1, fluorescent light
specification
Ee4
(0.4) --
mW/m2
(μW/cm2)
Rise time of output signal 10 % to 90 %, CL = 15 pF tr (RXD) 20 - 100 ns
Fall time of output signal 90 % to 10 %, CL = 15 pF tf (RXD) 20 - 100 ns
RXD pulse width of output
signal, 50 % (4)
Input pulse width
1.63 μs tPW 1.7 2 2.9 μs
Receiver start up time Power on delay - 100 150 μs
Latency tL- 50 200 μs
TRANSMITTER
IRED operating current, current
controlled
The IRED current is internally
controlled but also can be
reduced by an external resistor R1
ID200 300 400 mA
Forward voltage of
built-in IRED IF = 300 mA VF1.4 1.8 1.9 V
Output leakage IRED current Tamb = 85 °C IIRED --1μA
Output radiant intensity (5)
a = 0°, 15°, TXD = high, SD = low,
VCC1 = 3 V, VCC2 = 3 V, R1 = 30 Ω
(resulting in about 50 mA drive
current)
Ie51025mW/sr
Output radiant intensity (5)
a = 0°, 15°, TXD = high, SD = low,
VCC1 = 3 V, VCC2 = 3 V, R1 = 0 Ω,
IF = 300 mA
Ie30 65 150 mW/sr
Output radiant intensity (5)
VCC1 = 5 V, a = 0°, 15°
TXD = low or SD = high
(receiver is inactive as long as
SD = high)
Ie- - 0.04 mW/sr
Saturation voltage of IRED
driver VCC = 3 V, IF = 50 mA VCEsat -0.4- V
Peak - emission wavelength λp880 886 900 nm
Spectral bandwidth Δλ -45-nm
Optical rise time,
optical fall time
tropt,
tfopt 20 - 100 ns
Optical output pulse duration Input pulse width t < 30 μs
Input pulse width t ≥ 30 μs
topt
topt 30
t
50 300
μs
μs
Optical output pulse duration Input pulse width t = 1.63 μs topt 1.45 1.61 2.2 μs
Optical overshoot --20%
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 6Document Number: 84672
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RECOMMENDED CIRCUIT DIAGRAM
Operated at a clean low impedance power supply the
TFBS4650 needs only one additional external component
when the IRED drive current should be minimized for
minimum current consumption according the low power
IrDA standard. When combined operation in IrDA and
remote control is intended no current limiting resistor is
recommended.
However, depending on the entire system design and board
layout, additional components may be required (see Fig. 1).
When long wires are used for bench tests, the capacitors are
mandatory for testing rise / fall time correctly.
Fig. 1 - Recommended Application Circuit
The capacitor C1 is buffering the supply voltage VCC2 and
eliminates the inductance of the power supply line. This one
should be a small ceramic version or other fast capacitor to
guarantee the fast rise time of the IRED current. The resistor
R1 is necessary for controlling the IRED drive current when
the internally controlled current is too high for the
application.
Vishay transceivers integrate a sensitive receiver and a
built-in power driver. The combination of both needs a
careful circuit board layout. The use of thin, long, resistive
and inductive wiring should be avoided. The inputs (TXD,
SD) and the output RXD should be directly (DC) coupled to
the I/O circuit.
The capacitor C2 combined with the resistor R2 is the low
pass filter for smoothing the supply voltage.
As already stated above R2, C1 and C2 are optional and
depend on the quality of the supply voltages VCCx and
injected noise. An unstable power supply with dropping
voltage during transmission may reduce the sensitivity (and
transmission range) of the transceiver.
The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to the
transceiver power supply pins.
When connecting the described circuit to the power supply,
low impedance wiring should be used.
In case of extended wiring the inductance of the power
supply can cause dynamically a voltage drop at VCC2. Often
some power supplies are not able to follow the fast current
is rise time. In that case another 10 μF cap at VCC2 will be
helpful.
Keep in mind that basic RF-design rules for circuit design
should be taken into account. Especially longer signal lines
should not be used without termination. See e.g. “The Art of
Electronics” Paul Horowitz, Wienfield Hill, 1989, Cambridge
University Press, ISBN: 0521370957.
TRUTH TABLE
INPUTS OUTPUTS
SD TXD OPTICAL INPUT IRRADIANCE mW/m2RXD TRANSMITTER
High x x Tri-state floating with a weak
pull-up to the supply voltage 0
Low High x Low (echo on) Ie
Low High > 50 μs x High 0
Low Low < 4 High 0
Low Low > min. irradiance Ee
< max. irradiance EeLow (active) 0
Low Low > max. irradiance Eex0
IRED anod e
V
CC
Ground
V
CC2
V
CC1
GND
SD
SD
TXD
RXD
R2
C1 C2
IRED cathode
19286
R1
TXD
RXD
RECOMMENDED APPLICATION CIRCUIT
COMPONENTS
COMPONENT RECOMMENDED VALUE
C1, C2 0.1 μF, Ceramic Vishay part#
VJ 1206 Y 104 J XXMT
R1 See table below
R2 47 Ω, 0.125 W (VCC1 = 3 V)
RECOMMENDED RESISTOR R1 (Ω)
VCC2
(V)
MINIMIZED CURRENT CONSUMPTION,
IrDA LOW POWER COMPLIANT
2.7 24
330
3.3 36
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 7Document Number: 84672
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RECOMMENDED SOLDER PROFILES
Solder Profile for Sn/Pb Soldering
Fig. 2 - Recommended Solder Profile for Sn/Pb Soldering
Lead (Pb)-free, Recommended Solder Profile
The TFBS4650 is a lead (Pb)-free transceiver and qualified
for lead (Pb)-free processing. For lead (Pb)-free solder paste
like Sn(3.0 - 4.0)Ag (0.5 - 0.9)Cu, there are two standard reflow
profiles: Ramp-Soak-Spike (RSS) and Ramp-To-Spike
(RTS). The Ramp-Soak-Spike profile was developed
primarily for reflow ovens heated by infrared radiation. With
widespread use of forced convection reflow ovens the
Ramp-To-Spike profile is used increasingly. Shown in Fig. 3
is Vishay’s recommended profiles for use with the
TFBS4650 transceivers. For more details please refer to the
application note “SMD Assembly Instructions”.
Wave Soldering
For TFDUxxxx, TFBSxxxx, and TFBRxxxx transceiver
devices wave soldering is not recommended.
Manual Soldering
Manual soldering is the standard method for lab use.
However, for a production process it cannot be
recommended because the risk of damage is highly
dependent on the experience of the operator. Nevertheless,
we added a chapter to the above mentioned application
note, describing manual soldering and desoldering.
Storage
The storage and drying processes for all Vishay transceivers
(TFDUxxxx, TFBSxxxx, and TFBRxxxx) are equivalent to
MSL4.
The data for the drying procedure is given on labels on the
packing and also in the application note “Taping, Labeling,
Storage and Packing”.
Fig. 3 - Solder Profile, RSS Recommendation
0
20
40
60
80
100
120
140
160
180
200
220
240
260
0 50 100 150 200 250 300 350
Time (s)
Temperature (°C)
2 °C/s to 4 °C/s
2 °C/s to 4 °C/s
10 s max. at 230 °C
120 s to 180 s
160 °C max.
240 °C max.
90 s max.
19431
0
20
40
60
80
100
120
140
160
180
200
220
240
260
280
0 50 100 150 200 250 300 350
Time (s)
Temperature (°C)
2 °C...4 °C/s
2 °C...4 °C/s
90 s...120 s
T
≥ 217 °C for 50 s max
T
peak = 260 °C max.
50 s max.
T
≥ 255 °C for 20 s max
19261
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TFBS4650
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Rev. 2.2, 15-Jun-2020 8Document Number: 84672
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PACKAGE DIMENSIONS in millimeters
Fig. 4 - TFBS4650 Mechanical Dimensions, Tolerance ± 0.2 mm, if not otherwise mentioned
Fig. 5 - TFBS4650 Soldering Footprint, Tolerance ± 0.2 mm, if not otherwise mentioned
19322
19729
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TFBS4650
www.vishay.com Vishay Semiconductors
Rev. 2.2, 15-Jun-2020 9Document Number: 84672
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REEL DIMENSIONS in millimeters
HANDLING PRECAUTION
Sagging of carrier tape may cause some units to rotate and will result to pick-and-place problem. Do not allow carrier tape to
sag as shown in picture below.
TAPE WIDTH
(mm)
A MAX.
(mm)
N
(mm)
W1 MIN.
(mm)
W2 MAX.
(mm)
W3 MIN.
(mm)
W3 MAX.
(mm)
16 330 50 16.4 22.4 15.9 19.4
16 180 60 16.4 22.4 15.9 19.4
14017
Drawing-No.: 9.800-5090.01-4
Issue: 1; 29.11.05
VISHAY. i. 4‘4 Defefior Emwfier a @ $ :3:::;:;;*;ca¢ Ffl- : 1 Not indinaredmterams :01 v: i ‘ N a E *B 49* 1 B4 q, 44> , 2 #4} w /«5 :2 “i 4} E v‘ $ _: A m H *5 ,6 a 4} L; A 75 1.75 (16 DrawwnqiNu 970075296014. \ssue 1‘ 0812M IrdasuggortAM®wshay Com IrdasuggonAP@wshay.com IrdasuggoflEU®vlshay Com www.v\shay.com/doc?91000
TFBS4650
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Rev. 2.2, 15-Jun-2020 10 Document Number: 84672
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TAPE DIMENSIONS FOR TR1 AND TR3 in millimeters
19783
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TFBS4650
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Rev. 2.2, 15-Jun-2020 11 Document Number: 84672
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TAPE DIMENSIONS FOR TT3 in millimeters
21663
Drawing-No.: 9.700-5340.01-4
Issue: 1; 15.01.09
Progressive direction
specifications
according to DIN
technical drawings
4
0.32
16
7.5
1.75
3.1
2
7.1
EmitterDetector
2
8
Ø 1.5
Ø 1.5
2
4° max.
8° max.
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