NTJD4401N Datasheet by onsemi

MOSFET ON Semiconductor@ www.0nsemi.com HHH I:O UH
© Semiconductor Components Industries, LLC, 2015
May, 2019 − Rev. 7
1Publication Order Number:
NTJD4401N/D
NTJD4401N, NVJD4401N
MOSFET – Dual, N-Channel,
Small Signal, ESD
Protection, SC-88
20 V
Features
•Small Footprint (2 x 2 mm)
•Low Gate Charge N−Channel Device
•ESD Protected Gate
•Same Package as SC−70 (6 Leads)
•AEC−Q101 Qualified and PPAP Capable − NVJD4401N
•These Devices are Pb−Free and are RoHS Compliant
Applications
•Load Power Switching
•Li−Ion Battery Supplied Devices
•Cell Phones, Media Players, Digital Cameras, PDAs
•DC−DC Conversion
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 20 V
Gate−to−Source Voltage VGS ±12 V
Continuous Drain
Current
(Based on RqJA)
Steady
State
TA = 25°CID0.63 A
TA = 85°C 0.46
Power Dissipation
(Based on RqJA)
Steady
State
TA = 25°CPD0.27 W
TA = 85°C 0.14
Continuous Drain
Current
(Based on RqJL)
Steady
State
TA = 25°CID0.91 A
TA = 85°C 0.65
Power Dissipation
(Based on RqJL)
Steady
State
TA = 25°C
PD
0.55 W
TA = 85°C 0.29
Pulsed Drain Current t ≤10 msIDM ±1.2 A
Operating Junction and Storage Temperature TJ, TSTG −55 to
150
°C
Continuous Source Current (Body Diode) IS0.63 A
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s) TL260 °C
THERMAL RESISTANCE RATINGS (Note 1)
Parameter Symbol Typ Max Units
Junction−to−Ambient – Steady State RqJA 400 458 °C/W
Junction−to−Lead (Drain) – Steady State RqJL 194 252
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface mounted on FR4 board using 1 oz Cu area = 0.9523 in sq.
MARKING DIAGRAM &
PIN ASSIGNMENT
www.onsemi.com
V(BR)DSS RDS(on) Typ ID Max
20 V
0.29 W @ 4.5 V
0.36 W @ 2.5 V
0.63 A
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
TD MG
G
1
6
1
TD = Device Code
M = Date Code
G= Pb−Free Package
D1 G2 S2
S1 G1 D2
(Note: Microdot may be in either location)
Top View
SC−88 (SOT−363)
D1
G2
S2
S1
G1
6
5
4
1
2
3
D2
SC−88/SOT−363
CASE 419B
STYLE 28
www.cnsemi.com
NTJD4401N, NVJD4401N
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA20 27 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ22 mV/ °C
Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = 16 V 1.0 mA
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±12 V 10 mA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA0.6 0.92 1.5 V
Gate Threshold Temperature
Coefficient
VGS(TH)/TJ−2.1 mV/ °C
Drain−to−Source On Resistance RDS(on) VGS = 4.5 V, ID = 0.63 A 0.29 0.375 W
VGS = 2.5 V, ID = 0.40 A 0.36 0.445
Forward Transconductance gFS VDS = 4.0 V, ID = 0.63 A 2.0 S
CHARGES AND CAPACITANCES
Input Capacitance CISS
VGS = 0 V, f = 1.0 MHz,
VDS = 20 V
33 46 pF
Output Capacitance COSS 13 22
Reverse Transfer Capacitance CRSS 2.8 5.0
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 10 V,
ID = 0.63 A
1.3 3.0 nC
Threshold Gate Charge QG(TH) 0.1
Gate−to−Source Charge QGS 0.2
Gate−to−Drain Charge QGD 0.4
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time td(ON)
VGS = 4.5 V, VDD = 10 V,
ID = 0.5 A, RG = 20 W
0.083 ms
Rise Time tr 0.227
Turn−Off Delay Time td(OFF) 0.786
Fall Time tf 0.506
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS =0.23 A
TJ = 25°C 0.76 1.1 V
TJ = 125°C 0.63
Reverse Recovery Time tRR VGS = 0 V, dIS/dt = 100 A/ms,
IS = 0.63 A
0.410 ms
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
TJ:125°C T J : 25°C T J : .55oc
NTJD4401N, NVJD4401N
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3
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
0
1.4
1
62
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
0.6
0.2
0
Figure 1. On−Region Characteristics
0.4
1.2
21.2 2.4
1
0.6
0.2
0.8
0
0
Figure 2. Transfer Characteristics
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.1
0.4 1
0.3
0.2
0
Figure 3. On−Resistance vs. Drain Current and
Temperature
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Temperature
−50 0−25 25
1.4
1.2
1
0.8
0.6
50 125100
Figure 5. On−Resistance Variation with
Temperature
TJ, JUNCTION TEMPERATURE (°C)
TJ = 25°C
0.7
0.2 0.6
TJ = −55°C
TJ = 125°C
75 150
ID = 0.63 A
VGS = 4.5 V
and 2.5 V
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
4
25°C
2
1.2 V
0 1.4
Figure 6. Capacitance Variation
1.4 V
1.6 V
1.8 V
108
VDS ≥ 10 V
0.4
VGS = 2 V
VGS = 4.5 V to 2.2 V
0.4
0.8
1.2
0.8
0.4
1.6
TJ = 125°C
1.20.8
VGS = 4.5 V
TJ = −55°C
TJ = 25°C
0.1
0.4 1
0.3
0.2
0
ID, DRAIN CURRENT (AMPS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.7
0.2 0.6
TJ = 125°C
0 1.4
0.4
1.20.8
VGS = 2.5 V
TJ = −55°C
TJ = 25°C
VGS = 0 V
100
80
60
40
20
0
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
C, CAPACITANCE (pF)
TJ = 25°C
Coss
Ciss
Crss
52015
0.6
0.5 0.5
0.6
1.8
1.6
Veg GATEATOASOURCE VOLTAGE (v o s 0,2 0.4 0.6 Qg‘ TOTAL GATE Figure 7. Gater itoisource Vol
NTJD4401N, NVJD4401N
www.onsemi.com
4
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VGS
Figure 7. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
0 0.6
4
1
0
Figure 8. Diode Forward Voltage vs. Current
Qg, TOTAL GATE CHARGE (nC)
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID = 0.63 A
TJ = 25°C
10.8
2
3
5
0.40.2 1.4 0.8
0.1
0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
IS, SOURCE CURRENT (AMPS)
VGS = 0 V
0.7
0.60.40
0.4
0.5
0.6
0.2
0.3
10.2
TJ = 25°C
TJ = 150°C
1.2
QG(TOT)
QGS QGD
r(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
PULSE TIME t,(s)
10
1000
SINGLE PULSE
100 10001010.10.010.000001
1
0.2
D = 0.5
0.01
0.02
0.1
0.05
Figure 9. Thermal Response
100
0.0010.00010.00001
ORDERING INFORMATION
Device Package Shipping†
NTJD4401NT1G SC−88
(Pb−Free)
3000 / Tape & Reel
NVJD4401NT1G SC−88
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
Cddd M
123
A1
A
c
654
E
b
6X
XXXMG
G
XXX = Specific Device Code
M = Date Code*
G= Pb−Free Package
GENERIC
MARKING DIAGRAM*
1
6
STYLES ON PAGE 2
1
DIM MIN NOM MAX
MILLIMETERS
A−−− −−− 1.10
A1 0.00 −−− 0.10
ddd
b0.15 0.20 0.25
C0.08 0.15 0.22
D1.80 2.00 2.20
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
MIN NOM MAX
INCHES
0.10 0.004
E1 1.15 1.25 1.35
e0.65 BSC
L0.26 0.36 0.46
2.00 2.10 2.20
0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.078 0.082 0.086
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.65
0.66
6X
DIMENSIONS: MILLIMETERS
0.30
PITCH
2.50
6X
RECOMMENDED
TOP VIEW
SIDE VIEW END VIEW
bbb H
B
SEATING
PLANE
DETAIL A E
A2 0.70 0.90 1.00 0.027 0.035 0.039
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
A-B D
aaa C
2X 3 TIPS
D
E1
D
e
A
2X
aaa H D
2X
D
L
PLANE
DETAIL A
H
GAGE
L2
C
ccc C
A2
6X
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42985B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
SC−88/SC70−6/SOT−363
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
DOCUMENT NUMBER: QBASBAZQBSB am“ “'5‘“ “’2 “m“ Hmbd vasmns are unmnlmfle DESCRIPTION: SCrBB/SC7075/SOT7363 ON Semxcunduclm and are hademavks av Semxcanduclur Campunenls lnduslnes. uc dha ON Samanaucxar ar us suhsxdxanes m xna Umled sxaxas andJm mhev cmm‘nes ON Semxcunduclar vesewes me “gm to make changes wuhum mnna. mouse to any pruduns necem ON Semanduc‘m makes nu wanamy. represenlalmn m guarantee regardmg ma mamm at W; manual: can any pamcu‘av purpase nnv dues ON Semumnduclm assume any Mammy snsmg mac xna aapncauan m use M any pmduclnv mum and specmcsl‘y dwsc‘axms any and an Mammy mc‘udmg Wham hmma‘mn spema‘ cansequemm m \nmdeula‘ damages ON Semxmnduclar dues nn| away any hcense under Ms Dam nghls Ivar xna ngms av n|hers
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 3:
CANCELLED
STYLE 2:
CANCELLED
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 8:
CANCELLED
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42985B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
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© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
a a e lrademavks av Semxcunduclm Cnmvnnems In "sine \ghlsmanumhernlpalems \rademavks Dav www menu cumrsuerguwaxem Mavkmg gm 9 www nnserm cum
www.onsemi.com
1
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