Translators, Level Shifters

Results: 2
Series
-74ALVC
Packaging
Cut Tape (CT)Digi-Reel®Tape & Reel (TR)
Number of Circuits
12
Channels per Circuit
28
Voltage - VCCA
1.65 V ~ 3.6 V2.3 V ~ 3.6 V
Voltage - VCCB
2.3 V ~ 5.5 V3 V ~ 5.5 V
Output Type
Open Drain, Push-PullTri-State, Non-Inverted
Data Rate
24Mbps-
Operating Temperature
-55°C ~ 125°C (TA)-40°C ~ 125°C (TA)
Features
-Auto-Direction Sensing
Package / Case
8-VFSOP (0.091", 2.30mm Width)48-TFSOP (0.240", 6.10mm Width)
Supplier Device Package
8-VSSOP48-TSSOP
Stocking Options
Environmental Options
Media
Marketplace Product
2Results

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of 2
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Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Translator Type
Channel Type
Number of Circuits
Channels per Circuit
Voltage - VCCA
Voltage - VCCB
Input Signal
Output Signal
Output Type
Data Rate
Operating Temperature
Grade
Qualification
Features
Mounting Type
Package / Case
Supplier Device Package
8-TSSOP, 8-MSOP
TXS0102QDCURQ1
IC TRANSLTR BIDIRECTIONAL 8VSSOP
Texas Instruments
39,921
In Stock
1 : ¥8.13000
Cut Tape (CT)
3,000 : ¥3.43457
Tape & Reel (TR)
-
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Voltage Level
Bidirectional
1
2
1.65 V ~ 3.6 V
2.3 V ~ 5.5 V
-
-
Open Drain, Push-Pull
24Mbps
-40°C ~ 125°C (TA)
Automotive
AEC-Q100
Auto-Direction Sensing
Surface Mount
8-VFSOP (0.091", 2.30mm Width)
8-VSSOP
48-TSSOP
CALVC164245MDGGREP
IC TRANSLATOR BIDIR 48TSSOP
Texas Instruments
2,767
In Stock
1 : ¥35.80000
Cut Tape (CT)
2,000 : ¥23.79838
Tape & Reel (TR)
Tape & Reel (TR)
Cut Tape (CT)
Digi-Reel®
Active
Voltage Level
Bidirectional
2
8
2.3 V ~ 3.6 V
3 V ~ 5.5 V
-
-
Tri-State, Non-Inverted
-
-55°C ~ 125°C (TA)
-
-
-
Surface Mount
48-TFSOP (0.240", 6.10mm Width)
48-TSSOP
Showing
of 2

Translators, Level Shifters


Logic translator or level shifter ICs are devices used to pass information between digital logic devices that are operating from different/incompatible supply voltages, or which implement different signaling methods. Examples might include the connection of a digital-output sensor requiring a 5 V supply to an FPGA with a 3.3 V I/O supply, or converting between single-ended signaling methods like CMOS or TTL and differential techniques, such as PECL or LVDS.