Gates and Inverters - Multi-Function, Configurable

Results: 4
Manufacturer
NXP USA Inc.onsemi
Packaging
Tape & Reel (TR)Tube
Number of Circuits
12
Number of Inputs
10 Input (3, 3, 2, 2)11 Input (4, 2, 3, 2)
Mounting Type
Surface MountThrough Hole
Package / Case
14-DIP (0.300", 7.62mm)14-SOIC (0.154", 3.90mm Width)
Supplier Device Package
14-DIP14-MDIP14-SO
Stocking Options
Environmental Options
Media
Marketplace Product
4Results
Applied FiltersRemove All

Showing
of 4
Compare
Mfr Part #
Quantity Available
Price
Series
Package
Product Status
Logic Type
Number of Circuits
Number of Inputs
Schmitt Trigger Input
Output Type
Current - Output High, Low
Voltage - Supply
Operating Temperature
Mounting Type
Package / Case
Supplier Device Package
14-SOIC-SOT108-1
N74F51D,602
IC GATE AND/OR/INVERT 2IN 14SOIC
NXP USA Inc.
0
In Stock
Obsolete
Tube
Obsolete
AND/OR/INVERT Gate
2
10 Input (3, 3, 2, 2)
No
Differential
1mA, 20mA
4.5V ~ 5.5V
0°C ~ 70°C
Surface Mount
14-SOIC (0.154", 3.90mm Width)
14-SO
14-DIP
74F64PC
IC GATE AND/OR 4-2-3-2INP 14-DIP
onsemi
0
In Stock
Obsolete
Tube
Obsolete
AND/OR/INVERT Gate
1
11 Input (4, 2, 3, 2)
No
Differential
1mA, 20mA
4.5V ~ 5.5V
0°C ~ 70°C
Through Hole
14-DIP (0.300", 7.62mm)
14-MDIP
14-SOIC-SOT108-1
N74F51D,623
IC GATE AND/OR/INVERT 2IN 14SOIC
NXP USA Inc.
0
In Stock
Obsolete
Tape & Reel (TR)
Obsolete
AND/OR/INVERT Gate
2
10 Input (3, 3, 2, 2)
No
Differential
1mA, 20mA
4.5V ~ 5.5V
0°C ~ 70°C
Surface Mount
14-SOIC (0.154", 3.90mm Width)
14-SO
14-DIP
N74F51N,602
IC GATE AND/OR/INVERT 2IN 14DIP
NXP USA Inc.
0
In Stock
Obsolete
Tube
Obsolete
AND/OR/INVERT Gate
2
10 Input (3, 3, 2, 2)
No
Differential
1mA, 20mA
4.5V ~ 5.5V
0°C ~ 70°C
Through Hole
14-DIP (0.300", 7.62mm)
14-DIP
Showing
of 4

Gates and Inverters - Multi-Function, Configurable


Products in the configurable logic gate family perform elementary logic operations on individual logic signals in a fashion similar to standard logic gates, but without the limitation of being constrained to one specific function such as AND, NAND, etc. They are commonly implemented using a small number of logic gates internally, selected and interconnected to allow the overall logic function that is realized to be configured by the choice of which among several inputs the operating data is applied to, and the logic state to which any unused inputs are driven.