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Peripherals-Slide9

The hardware multiplier module (MPY) supports 8-/16-bit x 8-/16-bit signed and unsigned multiply with optional ‘multiply and accumulate’ functionality. It is a peripheral which does not interfere with CPU activities and can be accessed by the DMA. The MPY on new F47xx devices features up to 32-x32-bit operation. Timer_A and Timer_B are asynchronous 16-bit timer/counters with up to seven capture/compare registers and four operating modes. The timers support multiple capture/compares, PWM outputs, and interval timing and also have extensive interrupt capabilities.

PTM Published on: 2008-05-27