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One interrupt flag and one interrupt vector are associated with the Comparator_A+. The interrupt flag CAIFG is set on either the rising or falling edge of the comparator output, selected by the CAIES bit. If both the CAIE and the GIE bits are set, then the CAIFG flag generates an interrupt request. The CAIFG flag is automatically reset when the interrupt request is serviced or may be reset with software. Finally, the CASHORT bit shorts the Comparator_A+ inputs. This can be used to build a simple sample-and-hold for the comparator.
PTM Published on: 2008-05-27
