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Core-Slide3

From the CISC side, the RX adopts a rich instruction set with many addressing modes, allowing the RX instructions to directly access memory, and a variable-byte-length instruction format allows for extremely compact code. From the RISC side, the RX adopts a uniform register set pipelining that allows one clock per instruction performance and fast interrupt response time. As a bonus, RX has a floating point unit, which really helps in real-world control applications. Now to take a closer look inside the CPU core.

PTM Published on: 2012-05-15