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Core-Slide25

Once the Return From Exception instruction is executed, the hardware portion of the context restore is shortened by 3 clocks over a normal interrupt as the PC and PSW are restored from the backup registers rather than the stack. Using the fast interrupt, 5 clocks were saved over a standard interrupt. This is a nice improvement, but as one can see there is still some housekeeping going on in software upon entry of the ISR. Software has to save to the stack the registers it will use and then pop them off on the way out. Wouldn’t it be great if one could dedicate a few of the general purpose registers for use by the ISR to eliminate this overhead? The RX compiler allows one to set aside up to four registers for use only by the fast interrupt routine.

PTM Published on: 2012-05-15