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Some customers may want to keep their existing back-end encoding solution (e.g. an ASSP or DSP-based H.264 encoder). Intel® offers a smaller FPGA providing only the required elements of the pipeline that can enable the entry of WDR CMOS sensors in surveillance cameras. In this case, the front-end blocks from Apical (acquired by Arm®) remain, but the back-end removes the H.264 encoding and Ethernet MAC. It is replaced by a standard RAW or BT.1120 output that can connect to today’s typical ASSP or DSP-based encoder ICs.
PTM Published on: 2011-08-03
