Following Mini-SAS/Mini-SATA, the 2nd industry standard to adopt iPass was PCI Express. PCIe is the next-generation multi-purpose I/O interface that can be used across the computing industry (from mobile through high-end servers), as well as communications, networking and other equipment. Similar to the justification used for the Mini-SAS and Mini-SATA standards, iPass provides flexibility and future scalability by supporting Gen 1 & Gen 2 data rates and beyond, which was important to the PCI-SIG. PCIe sends data through differential signal pairs called lanes. Multiple PCIe lanes can be grouped together with typical lane widths of x1, x4, x8, and x16 cabled copper links. Unlike PCI, which shares bandwidth with all devices on the bus, each PCI Express device receives dedicated bandwidth. MX was chosen to support all lane widths that were defined – x1, x4, x8 and x16. Similar to the internal iPass connectors, each “lane” equals 1 shielded differential pair. Thus, the x4 PCIe standard is four lanes of shielded differential pairs.