Shown here are the specifics of the MSP430 JTAG standard four wire implementation. The figure shown here is from the MSP430 Hardware Tools Users Guide available on TI.com. There the designer can find additional information not shown here as well as details regarding TIs other MSP430 catalog tools and programmers with schematics provided. Shown in the figure is the standard interface via four wire JTAG to any MSP430. This is found as such in the tools and development boards as well as intended for use by developers designing custom hardware for the MSP430. Required connections are TDO, TDI, TCK, TMS and GND. When using MSP430 devices that also support SBW, RST is also required. The TEST signal is also required if the given MSP430 device in-use comes equipped with the TEST pin. MSP430 devices that typically make use of TEST are those that have shared pins with JTAG as well as application functionality (such as a UART, timer I/O or other GPIO functions). The TEST signal is used to enable JTAG on those shared pins as well as providing a pin interface to permanently disable the JTAG interface on devices that implement a physical JTAG fuse (such as the 1xx, 2xx and 4xx families). Customers desiring to protect software IP after programming can disable the device using this fuse and the TEST pin connection. Vcc is not strictly required but highly recommended in order to maintain reliable logic levels during communication. When provided by the host programmer, Vcc can be sourced on pin two of the standard MSP430 JTAG header. Alternatively, when the Vcc of the target device is provided on-board and not sourced by the tool, the local Vcc can be provided on pin four. When used with standard TI MSP430 programmers, this voltage is used as a reference for level shifting the JTAG connections providing proper CMOS logic level transitions during communication. The table shown here indicates device and device sub families that require a TEST pin connection in addition to the four wire JTAG. Remember that any devices supporting SBW also carry slightly different pin naming as well. The next slide will illustrate more details on the SBW implementation.