Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Slide 24 Product List
FSDR-Slide11

BD9673EFJ/BD9876EFJ also provides enhanced feature sets. Switching frequency for these devices is fixed at 300kHz by using a precise wave oscillation circuit. Due to the internal switching oscillation circuit, no external components are needed. Designers can also implement the synchronization feature by connecting a square wave to the SYNC pin. The soft start feature prevents rush current during start-up of the chip. Soft start time is set internally in the IC, after 10mS from the starting up EN pin, standard voltage comes to 1V and output voltage is enabled. The heat protection circuit activates when the maximum junction temperature exceeds 150°C. During this condition, output FET and DC/DC comparator outputs are turned off. Outputs are turned on again once the temperature falls below the maximum junction temperature. Low Voltage Error Prevention Circuit prevents the internal circuit during the decline of power supply voltage. It monitors VCC pin voltage and internal REG voltage, and when VCC voltage becomes 6.4V and below, UVLO turns off all output FETS, DC/DC comparator output, and resets the soft start circuit. It is possible to reduce the current consumption of these DC/DC converters to almost 0A via setting EN pin to logic low. HTSOP-J8 package is same as industry standard SO8 except the addition of the center metal pad which provides greater heat dissipation at higher load.

PTM Published on: 2013-07-26