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The DMA transfer count register is a single register that takes on two different configurations based on the DMA transfer mode. In normal mode, it is a 16-bit transfer counter that allows up to 65,535 transfers. Write the desired number of transfers into the low word of the register. In repeat and block modes, the upper word contains the repeat size or block size, and the lower word contains the repeat or block count. During the transfers, the DMAC updates the count in the lower word as it performs the data movement, reloading it with the value from the upper word at each repeat or block transfer. Be sure to initialize both the upper and lower words to the same value since the value in the lower word controls the initial repeat cycle or block transfer.
