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PIC24-Slide8

All of the devices in the PIC24F family are built with the same base peripheral set. The primary difference being the Flash memory sizes, which include 64kB, 96kB and 256kB. The devices start with the 16 MIPS PIC24F core. Around the core is a peripheral set that includes the 16 channels of 10-bit A/D converter and two analog comparators. The device includes a watchdog timer and five channels of 16-bit timers, four of which can be cascaded to form two 32-bit timers. The PIC24F family also includes a real time clock with calendar function that is often used for time stamping data logged information or communications data. The devices also include two I²Cs, two UARTS and two SPI channels. To compliment the various serial channels there is also a Cyclic Redundancy Check peripheral that can be used to ensure data is or will be correctly communicated.  Rounding out the peripheral list is a Parallel Master Port (PMP) that can be used to communicate to parallel peripherals or potentially external data memory.

PTM Published on: 2011-10-28