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On dsPIC33 devices, it is much easier to detect and recover from a mathematical error trap. There are six additional status bits within the INTCON1 register to provide details of a math error. These six new bits are highlighted in green in the slide. The OVA and OVB bits indicate an overflow condition in either accumulator a or b, respectively. These bits differ subtly from the OA and OB bits within the SR status register. When an accumulator overflows, accumulator A for example, the OA and OVA bits will be set at the same time. However, the OA bit will be cleared if a subsequent accumulator instruction does not result in an overflow. The OVA bit will only be cleared when the user clears the MATHERR trap status flag.
PTM Published on: 2011-11-07
