HCSL Buffers

Low skew, differential-to-HCSL fanout buffers from Renesas

Image of Renesas’ HCSL BuffersRenesas’ 85102I is a low-skew, 1-to-2 differential/LVCMOS-to-HCSL fanout buffer. The 85102I has two selectable clock inputs. The differential input supports LVPECL, LVDS, HSTL, SSTL and HCSL input levels. The single-ended input supports LVCMOS/LVTTL signal levels. The device is supplied by 3.3 V. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.

The 85104I is a low skew, 1-to-4 differential/LVCMOS-to-HCSL fanout buffer. The 85104I has two selectable clock inputs, the differential input supports LVPECL, LVDS, HSTL, SSTL and HCSL input levels. The single-ended input supports LVCMOS/LVTTL signal levels. The device is supplied by 3.3 V. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.

The ICS85108I is a low skew, high performance 1-to-8 differential-to-0.7 V HCSL clock distribution chip and a member of the HiPerClockS™ family of high performance clock solutions from Renesas. The ICS85108I CLK, nCLK pair can accept most differential input levels and translates them to 3.3 V HCSL output levels. The ICS85108I provides a low power, low noise, low skew, point-to-point solution for distributing HCSL clock signals. Guaranteed output and part-to-part skew specifications make the ICS85108I ideal for those applications demanding well defined performance and repeatability.

HCSL Buffers

图片制造商零件编号描述比率 - 输入:输出差分 - 输入:输出可供货数量
IC CLK BUFFER 1:2 500MHZ 16TSSOP85102AGILFIC CLK BUFFER 1:2 500MHZ 16TSSOP1:2是/是0 - 立即发货查看详情
IC CLK BUFFER 2:4 500MHZ 20TSSOP85104AGILFIC CLK BUFFER 2:4 500MHZ 20TSSOP2:4是/是493 - 立即发货查看详情
IC CLK BUFFER 1:8 500MHZ 24TSSOP85108AGILFIC CLK BUFFER 1:8 500MHZ 24TSSOP1:8是/是0 - 立即发货查看详情
发布日期: 2012-06-29