Analog Devices Inc. 的 LT5521 规格书

LT552 1 TECHNOLOGY L7H L7LJCUW
1
LT5521
5521f
Very High Linearity
Active Mixer
■
Wideband Output Frequency Range to 3.7GHz
■
+24.2dBm IIP3 at 1.95GHz RF Output
■
Low LO Leakage: –42dBm
■
Integrated LO Buffer: Low LO Drive Level
■
Single-Ended LO Drive
■
Wide Single Supply Range: 3.15V to 5.25V
■
Double-Balanced Active Mixer
■
Shutdown Function
■
16-Lead (4mm × 4mm) QFN Package
■
Cellular, W-CDMA, PHS and UMTS Infrastructure
■
Cable Downlink Infrastructure
■
Wireless Infrastructure
■
Fixed Wireless Access Equipment
■
High Linearity Mixer Applications
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
PA
2.7nH
LO INPUT
–5dBm
OUT
+
GND
OUT
–
V
CC
V
CC
V
CC
EN
BIAS
IN
+
110Ω
LO
IN
–
2.7nH
4:1
BPF
82pF
6.8pF
1nF
RF
OUTPUT
5V DC
5521 TA01
82pF
6.8pF
1µF
110Ω
10pF
1nF
IF
INPUT
1nF
BPF
1:1
Fundamental, 3rd Order
Intermodulation Distortion
vs Input Power
The LT
®
5521 is a very high linearity mixer optimized for
low distortion and low LO leakage applications. The chip
includes a high speed LO buffer with single-ended input
and a double-balanced active mixer. The LT5521 requires
only –5dBm LO input power to achieve excellent distor-
tion and noise performance, while reducing external drive
circuit requirements. The LO buffer is internally 50Ω
matched for wideband operation.
With a 250MHz input, a 1.7GHz LO and a 1.95GHz output
frequency, the mixer has a typical IIP3 of +24.2dBm,
–0.5dB conversion gain and a 12.5dB noise figure.
The LT5521 offers exceptional LO-RF isolation, greatly
reducing the need for output filtering to meet LO suppres-
sion requirements.
The device is designed to work over a supply voltage range
from 3.15V to 5.25V.
, LTC and LT are registered trademarks of Linear Technology Corporation.
P
IN
(dBm)
–100
OUTPUT POWER (dBm)
–60
–20
20
–80
–40
0
–10 –6 –2 2
5521 TA02
6–12–14 –8 –4 0 4
P
FUND
IM3
f
IF
= 250MHz
f
LO
= 1.7GHz
f
RF
= 1.95GHz
P
LO
= –5dBm
T
A
= 25°C
HBSOLUTE flXI U flflTl G L7LJUEAR
2
LT5521
5521f
ORDER PART
NUMBER
(Note 1)
Power Supply Voltage ........................................... 5.5V
Enable Voltage ............................... –0.2V to V
CC
+ 0.2V
LO Input Power ................................................ +10dBm
LO Input DC Voltage ..................................... 0V to 1.5V
IF Input Power ................................................. +10dBm
Difference Voltage Across Output Pins ................ ±1.5V
Maximum Pin 2 or Pin 3 Current ......................... 34mA
Operating Ambient Temperature Range.. – 40°C to 85°C
Storage Temperature Range ................. –65°C to 125°C
Maximum Junction Temperature ..........................125°C
LT5521EUF
T
JMAX
= 125°C, θ
JA
= 37°C/W
EXPOSED PAD (PIN 17) IS GND
MUST BE SOLDERED TO PCB
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
UU
VCC = 5V, EN = 2.9V, TA = 25°C unless otherwise noted.
Test circuit shown in Figure 1. (Note 2)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
16 15 14 13
5 6 7 8
TOP VIEW
17
UF PACKAGE
16-LEAD (4mm × 4mm) PLASTIC QFN
9
10
11
12
4
3
2
1GND
IN+
IN–
GND
OUT+
GND
GND
OUT–
GND
LO
GND
GND
EN
VCC
VCC
VCC
DC ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
LO Frequency Range 10 to 4000 MHz
Input Frequency Range 10 to 3000 MHz
Output Frequency Range 10 to 3700 MHz
LO Input Power –5 1 dBm
LO Return Loss Z
O
= 50Ω, f
LO
= 1700MHz 12 dB
Output Return Loss Requires Matching 12 dB
Input Return Loss (Pins 2, 3) Requires Matching 15 dB
VCC = 5V, EN = 2.9V, TA = 25°C unless otherwise noted.
Test circuit shown in Figure 1. (Note 2)
AC ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage 3.15 5.25 V
Supply Current 82 98 mA
Shutdown Current EN = 0.2V 20 100 µA
Enable (EN) Low = Off, High = On
Enable Mode EN = High 2.9 V
Disable Mode EN = Low 0.2 V
Enable Current EN = 5V 137 µA
Shutdown Enable Current EN = 0.2V 0.1 µA
Turn-On Time (Note 3) 200 ns
Turn-Off Time (Note 4) 200 ns
LO Voltage (Pin 15) Internally Biased 0.96 V
Input Voltage (Pins 2, 3) V
CC
= 5V, Internally Biased 2.20 V
V
CC
= 3.3V, Internally Biased 0.46 V
UF PART
MARKING
5521
L7LJCUW
3
LT5521
5521f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Gain –0.5 dB
Conversion Gain Variation vs Temperature –0.009 dB/°C
Input P1dB +10 dBm
Single-Side Band Noise Figure 12.5 dB
IIP3 Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone +24.2 dBm
IIP2 (Note 6) Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone, +49 dBm
f
LO
+ f
IF1
+ f
IF2
LO-RF Leakage –42 dBm
LO-IF Leakage –40 dBm
VCC = 5V, EN = 2.9V, fIF = 250MHz, PIF = –7dBm, fLO = 1700MHz,
PLO = –5dBm, fRF = 1950MHz, TA = 25°C. Test circuit shown in Figure 1.
AC ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Gain –0.5 dB
Conversion Gain Variation vs Temperature –0.012 dB/°C
Input P1dB +10 dBm
Single-Side Band Noise Figure 12.8 dB
IIP3 Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone +24.5 dBm
IIP2 (Note 6) Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone, +49 dBm
f
LO
+ f
IF1
+ f
IF2
LO-RF Leakage –38 dBm
LO-IF Leakage –59 dBm
VCC = 5V, EN = 2.9V, fIF = 44MHz, PIF = –7dBm, fLO = 1001MHz, PLO = –5dBm, fRF = 1045MHz, TA = 25°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Gain –0.5 dB
Conversion Gain Variation vs Temperature –0.013 dB/°C
Input P1dB +11 dBm
Single-Side Band Noise Figure 13.5 dB
IIP3 Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone +25.8 dBm
IIP2 (Note 6) Two Tones, ∆f
IF
= 5MHz, P
IF
= –7dBm/Tone, +50 dBm
f
LO
+ f
IF1
+ f
IF2
LO-RF Leakage –36 dBm
LO-IF Leakage –60 dBm
VCC = 3.3V, EN = 2.9V, fIF = 250MHz, PIF = –7dBm, fLO = 1700MHz, PLO = –5dBm, fRF = 1950MHz, TA = 25°C. (Note 5)
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
controls.
Note 3: Interval from the rising edge of the Enable input to the time when
the RF output is within 1dB of its steady-state output.
Note 4: Interval from the falling edge of the Enable signal to a 20dB drop
in the RF output power.
Note 5: R1 = R7 = 22.6Ω, Z1 = Z7 = 100nH.
Note 6: Second harmonic distortion measured at f
LO
+ f
IF1
+ f
IF2
.
\MZ L7LIH§Q§
4
LT5521
5521f
WU
TYPICAL DC PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
(5V Application) Supply Current vs Supply Voltage
(3.3V Application)
WU
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz, PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit
shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 5V.
Fundamental, 2nd and 3rd Order
Intermodulation Distortion
vs Input Power Conversion Gain vs Input Power Conversion Gain and IIP3
vs RF Frequency
Test circuit shown in Figure 1.
V
CC
(V)
4.7
I
CC
(mA)
75
80
85
5.0 5.2
5521 G01
70
65
60 4.8 4.9 5.1
90
95
100
85°C
25°C
–40°C
5.3
V
CC
(V)
3.1
50
I
CC
(mA)
60
70
80
90
85°C
25°C
–40°C
3.2 3.3 3.4 3.5
5521 G02
100
110
P
IN
(dBm)
–100
OUTPUT POWER (dBm)
–60
–20
20
–80
–40
0
–10 –6 –2 2
5521 G03
6–12–14 –8 –4 0 4
85°C
25°C
–40°CP
FUND
IM3
IM2
IM2
IM3
P
IN
(dBm)
–25
G
C
(dB)
–0.5
0
0.5
5
5521 G04
–1.0
–1.5
–15 –5
–20 10
–10 0 15
–2.0
–2.5
1.0
–40°C
25°C
85°C
RF
OUT
(MHz)
1750
4
6
10
2050
5521 G05
2
0
1850 1950 2150
–2
–4
8
22
23
25
IIP3
G
C
21
20
19
18
24
G
C
(dB)
IIP3 (dBm)
85°C
25°C
–40°C
5
LT5521
5521f
LO-RF Leakage vs LO Frequency Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage Conversion Gain and IIP3
vs LO Power
LO-RF Leakage vs LO Power LO-RF Leakage vs Supply Voltage Noise Figure vs LO Power
WU
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1700MHz, fIF = 250MHz, fRF = 1950MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output
frequency and VCC = 5V.
LO FREQUENCY (MHz)
1500
–48
LEAKAGE (dBm)
–46
–44
–42
–40
1600 1700
85°C
1800 1900
5521 G06
–38
–36
1550 1650 1750 1850
–40°C
25°C
V
CC
(V)
4.6
–2
G
C
(dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
0
2
4
6
4.8 5.0 5.2 5.4
5521 G07
8
10
0
5
10
15
20
25
IIP3
30
4.7 4.9 5.1 5.3
85°C
25°C
–40°C
NF
G
C
LO POWER (dBm)
–25
4
6
10
–10 0
5521 G08
2
0
–20 –15 –5
G
C
IIP3
510
–2
–4
8
22
23
25
21
20
19
18
24
G
C
(dB)
IIP3 (dBm)
85°C
25°C
–40°C
LO POWER (dBm)
–25
–50
LO LEAKAGE (dBm)
–48
–44
–42
–40
–5
–32
5521 G09
–46
–15
–20 05
–10 10
–38
–36
–34
85°C
25°C
–40°C
V
CC
(V)
4.7
LO LEAKAGE (dBm)
–44
–42
–40°C
–40
5.0 5.2
5521 G10
–46
–48
–50 4.8 4.9 5.1
–38
–36
–34
5.3
85°C
25°C
LO POWER (dBm)
–20
NOISE FIGURE (dB)
16
18
20
0
5521 G11
14
12
15
17
19
13
11
10 –15 –10 –5 5
85°C
–40°C
25°C
Low Side LO (LS) and High Side
LO (HS) Comparison: Conversion
Gain and IIP3 vs RF Frequency
RFOUT (MHz)
1750
4
6
10
2050
5521 G13
2
0
1850 1950 2150
–2
–4
8LS
20
22
HS
HS
26
18
16
14
12
24
GC (dB)
IIP3 (dBm)
LSGC
IIP3
LS: R1 = R7 = 110Ω
HS: R1 = R7 = 121Ω
fIF = 250MHz
Low Side LO (LS) and High Side
LO (HS) Comparison: Noise Figure
vs RF Frequency
RF
OUT
(MHz)
1700
11.5
NOISE FIGURE (dB)
11.7
12.1
12.3
12.5
LS
13.5
12.9
1800 1900 1950
5521 G14
11.9
13.1
13.3
12.7
1750 1850 2000 2050 2100
HS
LS: R1 = R7 = 110Ω
HS: R1 = R7 = 121Ω
f
IF
= 250MHz
L7LIH§Q§
6
LT5521
5521f
WU
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output
frequency.
Fundamental, 2nd and 3rd Order
Intermodulation Distortion
vs Input Power Conversion Gain vs Input Power Conversion Gain and IIP3
vs RF Frequency, Fixed IF
INPUT POWER (dBm)
–14
–120
OUTPUT POWER (dBm)
–100
–60
–40
–20
20
–12 –4 0
5521 G15
–80
0
–6 46
–10 –8 –2 2
85°C
25°C
–40°C
P
FUND
IM3
IM3
IM2
IM2
P
IN
(dBm)
–25
G
C
(dB)
–0.5
0
0.5
5
5521 G16
–1.0
–1.5
–15 –5
–20 10
–10 0 15
–2.0
–2.5
1.0
–40°C
25°C
85°C
RF
OUT
(MHz)
920
6
8
10
1120
5521 G17
4
2
G
C
IIP3
970 1020 1070 1170
0
–2
–4
23
24
25
22
21
20
19
18
G
C
(dB)
IIP3 (dBm)
85°C
25°C
–40°C
LO-RF Leakage vs LO Frequency Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage Conversion Gain and IIP3
vs LO Power
LO FREQUENCY (MHz)
850
–42
LEAKAGE (dBm)
–40
–38
–36
900 950 1000 1050
5521 G18
1100
–34
–32
–41
–39
–37
–35
–33
1150
–40°C
25°C
85°C
V
CC
(V)
4.6
–2
G
C
(dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
0
2
4
6
4.8 5.0 5.2 5.4
5521 G19
8
10
2
6
10
14
18
22
IIP3
26
4.7 4.9 5.1 5.3
85°C
25°C
–40°C
NF
G
C
LO POWER (dBm)
–25
4
6
10
–10 0
5521 G20
2
0
–20 –15 –5
G
C
IIP3
510
–2
–4
8
22
23
25
21
20
19
18
24
G
C
(dB)
IIP3 (dBm)
85°C
25°C
–40°C
LO-RF Leakage vs LO Power
LO POWER (dBm)
–25
LO LEAKAGE (dBm)
–34
–32
–30
–10 0
5521 G21
–36
–38
–20 –15 –5 5 10
–40
–42
–40°C
25°C
85°C
LO-RF Leakage vs Supply Voltage
V
CC
(V)
4.6
LO LEAKAGE (dBm)
–36
–34
–32
5.2
5521 G22
–38
–40
4.8 5.0
4.7 5.3
4.9 5.1 5.4
–42
–44
–30
–40°C
25°C
85°C
x“ HP3 .‘llS HS “ "" L7LJCUW
7
LT5521
5521f
WU
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1001MHz, fIF = 44MHz, fRF = 1045MHz,
PLO = –5dBm, VCC = 5V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.045GHz output
frequency.
Noise Figure vs LO Power
Low Side LO (LS) and High Side
LO (HS) Comparison: Noise Figure
vs RF Frequency
LO POWER (dBm)
–20
NOISE FIGURE (dB)
16
18
20
0
5521 G23
14
12
15
17
19
13
11
10 –15 –10
85°C
–40°C
25°C
–5 5
RF
OUT
(MHz)
11.0
NOISE FIGURE (dB)
12.0
13.0
HS
LS
14.0
11.5
12.5
13.5
985 1025 1065 1105
5521 G24
1145945
f
IF
= 44MHz
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO = –5dBm, VCC = 3.3V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit
shown in Figure 1 is tuned for 1.95GHz output frequency and VCC = 3.3V.
POUT, IM3 and IM2 vs Input Power Conversion Gain vs Input Power Conversion Gain and IIP3
vs RF Frequency
P
IN
(dBm)
–14
OUTPUT POWER (dBm)
–100
–60
–40
–20
20
–12 –4 0
5521 G25
–80
0
–6 46
–10 –8 –2 2
85°C
25°C
–40°C
P
OUT
IM2
IM2
IM3
IM3
P
IN
(dBm)
–20
G
C
(dB)
–0.5
0
0.5
–5
85°C
5
5521 G26
–1.0
–1.5
–15 –10 010
–2.0
–2.5
25°C
–40°C
RF
OUT
(MHz)
1750
G
C
(dB)
IIP3 (dBm)
4
6
8
2050
5521 G27
2
0
1850 1950
1800 2100
1900 2000 2150
–2
–4
10
21
23
25
19
17
15
13
27
G
C
IIP3
85°C
25°C
–40°C
RF
OUT
(MHz)
940
–2
G
C
(dB)
IIP3 (dBm)
–1
0
1
2
3
4
19
20
21
22
23
24
25
IIP3
G
C
990 1040
LS
LS
HS
HS
1090 1140
5521 G34
f
IF
= 44MHz
Low Side LO (LS) and High Side
LO (HS) Comparison: Conversion
Gain and IIP3 vs RF Frequency
L7LJUEAR
8
LT5521
5521f
WU
TYPICAL AC PERFOR A CE CHARACTERISTICS
fLO = 1.7GHz, fIF = 250MHz, fRF = 1.95GHz, PLO
= –5dBm, VCC = 3.3V, EN = 2.9V, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1 is tuned for 1.95GHz output
frequency and VCC = 3.3V.
LO-RF Leakage vs LO Frequency
LO FREQUENCY (MHz)
1500
LEAKAGE (dBm)
–36
–34
1900
5521 G28
–38
–40 1600 1700 1800
1550 1650 1750 1850
–32
–37
–35
–39
–33
85°C
25°C
–40°C
LO POWER (dBm)
–25
GC (dB)
IIP3 (dBm)
4
6
8
0
5521 G29
2
0
–15 –5
–20 5
–10 10
–2
–4
10
21
23
25
19
17
15
13
27
GC
IIP3
85°C
25°C
–40°C
LO POWER (dBm)
–25
–36
–34
85°C
–30
–10 0
5521 G30
–38
–40
–20 –15 –5 5 10
–42
–44
–32
LO LEAKAGE (dBm)
25°C
–40°C
Conversion Gain and IIP3
vs LO Power
LO-RF Leakage vs LO Power LO Leakage vs Supply Voltage
V
CC
(V)
3.10
–2
G
C
(dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
0
2
4
6
3.20
IIP3
NF
G
C
3.30 3.40 3.50
5521 G31
8
4
12
8
16
20
24
3.15 3.25 3.35 3.45
85°C
25°C
–40°C
Noise Figure vs LO Power
LO POWER (dBm)
–20
10
NOISE FIGURE (dB)
12
14
16
18
20
22
–15 –10 –5 0
5521 G32
5
85°C
25°C
–40°C
VCC (V)
3.0
–50
LO LEAKAGE (dBm)
–44
–38
–32
3.1 3.2 3.3 3.4
5521 G33
3.5
–40°C
85°C
–26
–20
–47
–41
–35
–29
–23
3.6
25°C
Conversion Gain, IIP3 and Noise
Figure vs Supply Voltage
UU
U
PI FU CTIO S
GND (Pins 1, 4, 10, 11, 13, 14, 16): Ground. These pins
are internally connected to the Exposed Pad for improved
isolation. They should be connected to RF ground on the
printed circuit board, and are not intended to replace the
primary grounding through the backside of the package.
IN
+
, IN
–
(Pins 2, 3): Differential Input Pins. Each pin
requires a resistive DC path to ground. See Applications
Information for choosing the resistor value. External match-
ing is required.
EN (Pin 5): Enable Input Pin. The enable voltage should be
at least 2.9V to turn the chip on and less than 0.2V to turn
the chip off.
V
CC
(Pins 6, 7, 8): Power Supply Pins. Total current draw
for these three pins is 40mA.
OUT
+
, OUT
–
(Pins 12, 9): RF Output Pins. These pins must
have a DC connection to the supply voltage (see Applica-
tions Information). These pins draw 20mA each. External
matching is required.
LO (Pin 15): Local Oscillator Input. This input is internally
DC biased to 0.96V. Input signal must be AC coupled.
Exposed Pad (Pin 17): Circuit Ground Return for the
Entire IC. For best performance, this pin must be soldered
to the printed circuit board.
L7LJDW
9
LT5521
5521f
TEST CIRCUITS
Figure 1. Demonstration Board Schematic
EN
EN
V
CC
V
CC
V
CC
GND L0
LT5521
EXPOSED
PAD (17)
GND GND
OUT
+
GND
GND
OUT
–
GND
IN
+
C13Z14
IF
IN
50Ω
LO
IN
50Ω
C6
IN
–
GND
12
16 15 14 13
L1
L2
V
CC
C11
5521 F01
C4
C3
RF
OUT
50Ω
C12
T2
11
10
9
1
2
3
4
5
R8
R1
Z3
C2
T1
R7
Z7
OPT
Z1
OPT
678
C1 RF
GND
GND
DC
ε
r
= 4.4
0.017"
0.017"
0.062"
REF
R1, R7
Z14
Z3
L1, L2
T1
T2
C1, C13
C3
C12
C2, C4, C6
C11
Z1, Z7
R8
f
IF
= 250MHz, f
RF
= 1.95GHz
f
LO
= 1.7GHz, V
CC
= 5V
110Ω, 1%
10pF
0Ω
2.7nH
M/A-COM MABACT0010
3
M/A-COM ETC1.6-4-2-3
6.8pF
82pF
82pF
1nF
1µF
0Ω
10k
f
IF
= 44MHz, f
RF
= 1.045GHz
f
LO
= 1.001GHz, V
CC
= 5V
110Ω, 1%
120nH
150pF
10nH
M/A-COM MABACT0010
3
M/A-COM ETC1.6-4-2-3
27pF
3.9pF
1nF
1nF
1µF
0Ω
10k
f
IF
= 250MHz, f
RF
= 1.95GHz
f
LO
= 1.7GHz, V
CC
= 3.3V
22.6Ω, 1%
10pF
0Ω
2.7nH
M/A-COM MABACT0010
3
M/A-COM ETC1.6-4-2-3
6.8pF
82pF
82pF
1nF
1µF
100nH
10k
Note 1: Tabulated values are used for characterization measurements.
Note 2: Components shown on the schematic are included for consistency with the demo board.
If no value is shown for the component, the site is unpopulated.
Note 3: T1 also M/A-COM ETC1-1-13 and Sprague Goodman GLSW4M202. These alternative transformers
have been measured and have similar performance.
THIS COMPONENT CAN BE REPLACED BY PCB TRACE ON FINAL APPLICATION
Table 1. Demonstration Board Bill of Materials
1, 2
BLOCK DIAGRA
W
12
1516 1314
65 87
11
10
9
1
2
3
4
OUT
+
OUT
–
GND
5521 BD
BIAS
EN V
CC
V
CC
V
CC
GND
GND
17
EXPOSED
PAD GND GNDLO
GND
GND
IN
+
IN
–
L7LJUEAR
10
LT5521
5521f
APPLICATIO S I FOR ATIO
WUUU
The LT5521 is a high linearity double-balanced active
mixer. The chip consists of a double-balanced mixer core,
a high performance LO buffer and associated bias and
enable circuitry. The chip is designed to operate with a
supply voltage ranging from 3.15V to 5.25V.
Table 2. Port Impedance
FREQUENCY DIFFERENTIAL DIFFERENTIAL SINGLE-ENDED
(MHz) INPUT OUTPUT LO
50 19.8 + j0.7 282.2 – j8.4 49.9 + j0.1
100 20.1 + j2.0 282.3 – j20.8 49.8 + j0.3
300 18.2 + j5.3 262.3 – j55.1 49.2 + j0.9
600 15.2 + j16.8 231.4 – j67.0 47.7 + j2.0
1000 14.5 + j28.1 215.0 – j124.5 45.3 + j2.8
1500 20.5 + j42.3 109.5 – j158.0 43.3 + j2.8
2000 48.2 + j26.8 52.9 – j92.1 43.0 + j3.3
2300 18.2 + j29.4 61.6 – j74.2 43.4 + j4.6
3200 22.4 + j125.1 14.2 – j27.5 44.6 + j14.0
3500 27.9 – j4.4 42.4 + j17.9
4000 42.8 – j16.0 38.6 + j22.8
Signal Input Interface
Figure 2 shows the signal inputs of the LT5521. The signal
input pins are connected to the common emitter nodes of
the mixer quad differential pairs. The real part of the
differential IN
+
/IN
–
impedance is 20Ω. The mixer core
current is set by external resistors R1 and R7. Setting their
values at 110Ω, the nominal DC voltage at the inputs is
2.2V with V
CC
= 5V. Figure 3 shows the input return loss
for a matched input at 250MHz.
For input frequencies above 100MHz, a broadband im-
pedance matching tranformer with a 1:1 impedance ratio
is recommended. Table 3 provides the component values
necessary to match various IF frequencies using the M/A-
COM CT0010 transformer (T1, Figure 1).
Table 3. Component Values for Input Matching Using the
M/A-COM CT0010
IF C2 Z14 Z3
44MHz 1000pF 120nH 150pF
95MHz 820pF 33pF 27nH
120MHz 1000pF 27pF 18nH
150MHz 330pF 22pF 10nH
170MHz 330pF 18pF 6.8nH
250MHz 82pF 10pF 0Ω
300MHz 15pF 3.9pF 0Ω
435MHz 8.2pF 0.5pF 0Ω
520MHz 6.8pF Unused 0Ω
Below 100MHz, the Mini-Circuits TCM2-1T or the Pulse
CX2045 are better choices for a wider input match. This
configuration is shown in Figure 4. The series 1nF capaci-
tors maintain differential symmetry while providing DC
isolation between the inputs. This helps to improve LO
suppression.
Shunt capacitor C13 (Figure 2) is an optional capacitor
across the input pins that significantly improves LO sup-
pression. Although this capacitor is optional, it is impor-
tant to regulate LO suppression, mitigating part-to-part
variation. This capacitor should be optimized depending
Figure 2. Signal Input with External Matching
Figure 3. IF Input Return Loss
V
CC
IN
–
IN
+
R1
Z1
OPT
Z3
C2 LT5521
3
2
C13
IF
IN
50Ω
5521 F02
Z14
C6
1nF R7
T1
1:1
Z7
OPT
FREQUENCY (MHz)
100
IF RETURN LOSS (dB)
–25
–20
–15
250 350
5521 F03
–30
–35
–40 150 200 300
–10
–5
0
400
11
LT5521
5521f
APPLICATIO S I FOR ATIO
WUUU
on the IF input frequency and the LO frequency. Smaller
C13 values have reduced impact on the LO output sup-
pression; larger values will degrade the conversion gain.
A single-ended 50Ω source can also be matched to the
differential signal inputs of the LT5521 without an input
transformer. Figure 5 shows an example topology for a
discrete balun, and Table 4 lists component values for
several frequencies. The discrete input match is intrinsi-
cally narrowband. LO suppression to the output is de-
graded and noise figure degrades by 4dB for input
frequencies greater than 200MHz. Noise figure degrada-
tion is worse at lower input frequencies.
Operation at Reduced Supply Voltage
External resistors R1 and R7 (Figure 2) set the current
through the mixer core. For best distortion performance,
these resistors should be chosen to maintain a total of
40mA through the mixer core (20mA per side). At 5V
supply, R1 and R7 should be 110Ω. Table 5 shows
recommended values for R1 and R7 at various supply
voltages. Caution: Using values below the recommended
resistance can adversely affect operation or damage the
part.
Table 5. Minimum External Resistor Values vs Supply Voltage
V
CC
(V) R1, R7 (Ω)
5 110
4.5 82.5
4 54.9
3.5 38.3
3.3 23.2
Excessive mismatch between the external resistors R1
and R7 will degrade performance, particularly LO sup-
pression. Resistors with 1% mismatch are recommended
for optimum performance.
Figure 2 shows RF chokes in series with R1 and R7. These
inductors are optional. In general, the chokes improve the
conversion gain and noise figure by 2dB at 3.3V (i.e., at the
minimum values of R1 and R7). The DC resistance varia-
tion of the RF chokes must be considered in the 1% source
resistance mismatch suggested for maintaining LO sup-
pression performance.
Figure 6 indicates the typical performance of the LT5521
as the external source resistance (R1, R7) is varied while
keeping the supply current constant. Figure 6 data was
taken without the benefit of input chokes, and shows the
gradual gain degradation for smaller values of the input
resistors R1 and R7. Figure 7 shows the typical behavior
when the supply voltage is fixed and the core current is
varied by adjusting values of the external resistors R1 and
R7. Decreasing the core current decreases the power
consumption and improves noise figure but degrades
distortion performance. Figure␣ 8 demonstrates the im-
pact of the RF chokes in series with the source resistance
at 3.3V. There is a 2dB improvement in conversion gain
and noise figure and a corresponding decrease in IIP3.
Figure 5. Alternative Transformerless Input Circuit
Using Low Cost Discrete Components
LT5521
5521 F05
L4
C14
C16
1nF
C13
R1
110Ω
C2
82pF
R7
110Ω
L3
IF
IN
50Ω
2
3
IN
+
IN
–
Figure 4. Low Frequency Signal Input
V
CC
IN
–
IN
+
R1
C2 1nF
1nF
LT5521
3
2
C13
IF
IN
50Ω
5521 F04
R7
T1
2:1
Table 4. Component Values for Discrete Bridge Balun Signal
Input Matching
IF (MHz) C14, C16 (pF) L3, L4 (nH)
220 22 22
250 18 18
640 4.7 4.7
_ HP: / HPS NF IIP L7LJUEAR
12
LT5521
5521f
APPLICATIO S I FOR ATIO
WUUU
The user can tailor the biasing of the LT5521 to meet
individual system requirements. It is recommended to
choose a source resistance as large as possible to mini-
mize sensitivity to power supply variation.
Output Interface
A DC connection to V
CC
must be provided on the PCB to the
output pins. These pins will draw approximately 20mA
each from the power supply. On-chip, there is a nominal
300Ω differential resistance between the output pins.
Figure 9 shows a typical matching circuit using an external
balun to provide differential to single-ended conversion.
LO suppression and 2xLO suppression are influenced by
the symmetry of the external output matching circuitry.
PCB design must maintain the trace layout symmetry of
the output pins as much as possible to minimize these
signals.
The M/A-COM ETC1.6-4-2-3 4:1 transformer (T2, Fig-
ure␣ 9) is suitable for applications with output frequencies
between 500MHz and 2700MHz. Output matching at vari-
ous frequencies is achieved by adding inductors in series
with the output (L1, L2) and DC blocking capacitor C3, as
shown in Figure 9. Table 6 specifies center frequency and
bandwidth of the output match for different matching
configurations. Figure 10 shows the typical output return
loss vs frequency for 1GHz and 2GHz applications. Capaci-
tor C12 provides a solid AC ground at the RF output
frequency.
Figure 7. IIP3, GC and Noise Figure vs Core Current,
Constant Supply Voltage
Figure 6. IIP3, GC and Noise Figure vs External Resistance,
Constant Core Current (Variable Supply Voltage)
R1 AND R7 (Ω)
0
CONVERSION GAIN (dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
1.5
2.5 IIP3
NF
G
C
3.5
60 100
5521 F06
0.5
–0.5
20 40 80 120 140
–1.5
–2.5
20
25
30
15
10
5
0
T
A
= 25°C
f
IF
= 250MHz
f
LO
= 1.7GHz
f
RF
= 1.95GHz
CORE CURRENT (mA)
15
CONVERSION GAIN (dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
20 25 30 35
5521 F07
40 45
IIP3
NF
0
5
10
15
20
30
25
–1.8
–1.2
–0.6
0
0.6
1.8
1.2
G
C
T
A
= 25°C
f
IF
= 250MHz
f
LO
= 1.7GHz
f
RF
= 1.95GHz
V
CC
= 4V
CORE CURRENT (mA)
25
–3
CONVERSION GAIN (dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
–1
1
3
5
9
30 35 40 45
5521 F08
50
IIP3
NF
G
C
RFC
RFC
RFC
55
7
0
5
10
15
20
30
25
T
A
= 25°C
f
IF
= 250MHz
f
LO
= 1.7GHz
f
RF
= 1.95GHz
V
CC
= 3.3V
Figure 8. Comparison of 3.3V Performance With
and Without Input RF Choke Figure 9. Simplified Output Circuit
with External Matching Components
V
CC
LT5521
300Ω
5521 F09
L1 T2
4:1
L2
V
CC
OUT
+
OUT
–
C3
OUT
C12
12
9
L7LJCUW
13
LT5521
5521f
APPLICATIO S I FOR ATIO
WUUU
Table 6. Matching Values Using M/A-COM ETC1.6-4-2-3
Output Transformer
f
OUT
L1, L2 C3 C12 ∆f (10dB RL)
2.4GHz 0nH 82pF 82pF 450MHz
2.2GHz 1nH 82pF 82pF 430MHz
2.0GHz 2.7nH 82pF 82pF 400MHz
1.7GHz 4.7nH 82pF 82pF 400MHz
1.3GHz 10nH 82pF 82pF 400MHz
1.0GHz 10nH 3.9pF 1nF 500MHz
For applications with LO and output frequencies below
1GHz, the M/A-COM MABAES0054 is recommended for
the output component T2. This transformer maintains
better low frequency output symmetry. Table 7 lists com-
ponents necessary for a 750MHz output match using the
M/A-COM MABAES0054.
Table 7. Matching Values Using M/A-COM MABAES0054
Output Transformer
f
OUT
L1, L2 C3 C12 ∆f (10dB RL)
750MHz 33nH 82pF 1nF 500MHz
Hybrid baluns provide a low cost alternative for differen-
tial to single-ended conversion. The critical performance
parameters of conversion gain, IIP3, noise figure and LO
suppression are largely unaffected by these transform-
ers. However, their limited bandwidth and reduced sym-
metry outside the frequency of operation degrades the
suppression of higher order LO harmonics, particularly
2xLO. Murata LBD21 series hybrid balun transformers,
for ex
ample, can be used for output frequencies as low as
840MHz and as high as 2.4GHz.
Figure 10. Output Return Loss vs Frequency
FREQUENCY (GHz)
0.7
–10
–5
1GHz
5
2.2
5521 F10
–15
–20
1.2 1.7
–25
–30
0
RETURN LOSS (dB)
2GHz
Johanson Technology supplies the 3700BL15B100S hy-
brid balun for use between 3.4GHz and 4GHz. With addi-
tional matching, this transformer can be used for
applications between 3.3GHz and 3.7GHz. Example LT5521
performance is shown in Figure 11.
FREQUENCY (GHz)
3.2
10
8
6
4
2
0
–2
–4
22
IIP3
NF
HS
HS
HS
G
C
20
18
16
14
12
10
8
3.5 3.7
5521 F11
3.3 3.4 3.6 3.8
CONVERSION GAIN (dB)
IIP3 (dBm) AND NOISE FIGURE (dB)
LS
LS
LS
T
A
= 25°C
f
IF
= 300MHz
Figure 11. LT5521 Performance for an Application Tuned to
3.5GHz with Low Side (LS) and High Side (HS) LO Injection
LO Interface
The LO input pin is internally matched to 50Ω. It has an
internal DC bias of 960mV. External AC coupling is re-
quired. Figure 12 shows a simplified schematic of the LO
input. Overdriving the LO input will dramatically reduce
the performance of the mixer. The LO input power should
not exceed +1dBm for normal operation. Select C1 (Figure
12) only large enough to achieve the desired LO input
return loss. This reduces external low frequency signal
amplification through the LO buffer.
For applications with LO frequency in the range of 2.1GHz
to 2.4GHz, the LT5521 achieves improved distortion and
Figure 12. Simplified LO Input Circuit
15
VCC
8Ω
C1
5521 F12
60Ω
LT5521
LOIN
50Ω
60Ω
m =58pF L7LJUEAR
14
LT5521
5521f
APPLICATIO S I FOR ATIO
WUUU
noise performance with slightly reduced current through
the mixer core. Accordingly, in a 5V application operating
within this LO frequency range, the recommended source
resistor value (R1 and R7) is increased to 121Ω.
Enable Interface
Figure 14 shows a simplified schematic of the EN pin
interface. The voltage necessary to turn on the LT5521 is
2.9V. To disable the chip, the enable voltage must be below
0.2V. If the EN pin is not connected, the chip is disabled.
It is not recommended, however, that any pins be left
floating for normal operation.
It is important that the voltage at the EN pin never exceed
V
CC
, the power supply voltage, by more than 0.2V. If this
should occur, the supply current could be sourced through
the EN pin ESD protection diodes, potentially damaging
the IC. The resistor R8 (Figure 1) in series with the EN pin
on the demo board is populated with a 10kΩ resistor to
protect the EN pin to avoid inadvertant damage to the IC.
For timing measurements, this resistor is replaced with a
Figure 13. LO Port Return Loss
Figure 14. Enable Input Circuit
FREQUENCY (MHz)
0
RETURN LOSS (dB)
–15
–10
–5
3000
5521 F13
–20
–25
1000 2000
500 3500
1500 2500 4000
–30
–35
0
C1 = 6.8pF
C1 = 2.7pF
5
V
CC
5521 F14
LT5521
EN
0Ω resistor. If the shutdown function is not required, then
the EN pin should be wired directly to the V
CC
power supply
on the PCB.
Supply Decoupling
The power supply decoupling shown in the schematic of
Figure 1 is recommended to minimize spurious signal
coupling into the output through the power supply.
ACPR Performance
Because of its high linearity and low noise, the LT5521 offers
outstanding ACPR performance in a variety of applications.
For example, Figures 15 and 16 show ACPR and Alternate
Channel measurements for single channel and 4-channel
64 DPCH W-CDMA signals at 1.95GHz output frequency.
OUTPUT CHANNEL POWER (dBm)
–40
–50
–40
–30
0
5521 F15
–60
ACPR
–70
–30 –20 –10 10
–80
–90
–100
–140
–135
–130
–145
–150
–155
–160
–165
ACPR
NOISE FLOOR (dBm/Hz)
T
A
= 25°C
f
RF
= 1.95GHz
f
IF
= 70MHz
f
LO
= 1.88GHz
30MHz OFFSET NOISE
OUTPUT CHANNEL POWER, EACH CHANNEL (dBm)
–40
–80
ACPR AND AltCPR (dB)
NOISE FLOOR (dBm/Hz)
–75
–70
–65
–60
–50
–35 –30 –25 –20
1635 G24
–15
–55
–165
–160
–155
–150
–145
–135
–140
ACPR
AltCPR
30MHz OFFSET NOISE
TA = 25°C
fRF = 1.95GHz
fIF = 70MHz
fLO = 1.88GHz
Figure 15. Single Channel W-CDMA ACPR
and 30MHz Offset Noise Performance
Figure 16. 4-Channel W-CDMA ACPR,
AltCPR and 30MHz Offset Noise Floor
EN VCCO . —mln§~2 IN "- Imam. com (403)411— 4900i LT5521EUF UP/DOWN-CONVERTING MIXER D064“ 6ND VEC .‘I‘. 3.15V (o 5.25V i % o i wj um, MU HP WIT L7LJCUW
15
LT5521
5521f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
4.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
PIN 1
TOP MARK
(NOTE 6)
0.55 ± 0.20
1615
1
2
BOTTOM VIEW—EXPOSED PAD
2.15 ± 0.10
(4-SIDES)
0.75 ± 0.05 R = 0.115
TYP
0.30 ± 0.05
0.65 BSC
0.200 REF
0.00 – 0.05
(UF) QFN 1103
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.72 ±0.05
0.30 ±0.05
0.65 BSC
2.15 ± 0.05
(4 SIDES)
2.90 ± 0.05
4.35 ± 0.05
PACKAGE
OUTLINE
APPLICATIO S I FOR ATIO
WUUU
Figure 17. Top View of Demo Board
L7LJUEAR
16
LT5521
5521f
LINEAR TECHNOLOGY CORPORATION 2004
LT/TP 0604 1K • PRINTED IN THE USA
RELATED PARTS
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
PART NUMBER DESCRIPTION COMMENTS
Infrastructure
LT5511 High Linearity Upconverting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer
LT5512 DC-3GHz High Signal Level Downconverting Mixer DC to 3GHz, 21dBm IIP3, Integrated LO Buffer
LT5514 Ultralow Distortion, Wideband Digitally Controlled BW = 850MHz, OIP3 = 47dBm at 100MHz, 22.5dB Gain Control Range
Gain Amplifier/ADC Driver
LT5515 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 20dBm IIP3, Integrated LO Quadrature Generator
LT5516 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 21.5dBm IIP3, Integrated LO Quadrature Generator
LT5517 40MHz to 900MHz Quadrature Demodulator 21dBm IIP3, Integrated LO Quadrature Generator
LT5519 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω
Matching, Single-Ended LO and RF Ports Operation
LT5520 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω
Matching, Single-Ended LO and RF Ports Operation
LT5522 600MHz to 2.7GHz High Signal Level Downconverting Mixer 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB,
50Ω Single-Ended RF and LO Ports
RF Power Detectors
LT5504 800MHz to 2.7GHz RF Measuring Receiver 80dB Dynamic Range, Temperature Compensated,
2.7V to 5.25V Supply
LTC®5505 RF Power Detectors with >40dB Dynamic Range 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply
LTC5507 100kHz to 1000MHz RF Power Detector 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply
LTC5508 300MHz to 7GHz RF Power Detector 44dB Dynamic Range, Temperature Compensated, SC70 Package
LTC5509 300MHz to 3GHz RF Power Detector 36dB Linear Dynamic Range, Low Power Consumption, SC70 Package
LTC5530 300MHz to 7GHz Precision RF Power Detector Precision V
OUT
Offset Control, Shutdown, Adjustable Gain
LTC5531 300MHz to 7GHz Precision RF Power Detector Precision V
OUT
Offset Control, Shutdown, Adjustable Offset
LTC5532 300MHz to 7GHz Precision RF Power Detector Precision V
OUT
Offset Control, Adjustable Gain and Offset
LT5534 50MHz to 3GHz RF Power Detector 60dB Dynamic Range, Temperature Compensated, SC70 Package
Low Voltage RF Building Blocks
LT5500 1.8GHz to 2.7GHz Receiver Front End 1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer
LT5502 400MHz Quadrature IF Demodulator with RSSI 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain,
90dB RSSI Range
LT5503 1.2GHz to 2.7GHz Direct IQ Modulator and 1.8V to 5.25V Supply, Four-Step RF Power Control,
Upconverting Mixer 120MHz Modulation Bandwidth
LT5506 500MHz Quadrature IF Demodulator with VGA 1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB
Linear Power Gain, 8.8MHz Baseband Bandwidth
LT5546 500MHz Ouadrature IF Demodulator with 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V
VGA and 17MHz Baseband Bandwidth Supply, –7dB to 56dB Linear Power Gain
RF Power Controllers
LTC1757A RF Power Controller Multiband GSM/DCS/GPRS Mobile Phones
LTC1758 RF Power Controller Multiband GSM/DCS/GPRS Mobile Phones
LTC1957 RF Power Controller Multiband GSM/DCS/GPRS Mobile Phones
LTC4400 SOT-23 RF PA Controller Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range,
450kHz Loop BW
LTC4401 SOT-23 RF PA Controller Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range,
250kHz Loop BW
LTC4403 RF Power Controller for EDGE/TDMA Multiband GSM/GPRS/EDGE Mobile Phones