Analog Devices Inc. 的 LTC4400-1/2 规格书

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LTC4400-1/LTC4400-2

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FEATURES

DESCRIPTIO

APPLICATIO S

TYPICAL APPLICATIO

RF Power Controllers with

450kHz Loop BW and

45dB Dynamic Range

The LTC

4400-1 is a SOT-23 RF power controller for fast

turn-on RF power amplifiers operating in the 300MHz to

2.7GHz range. Examples include the Hitachi PF08109B,

PF08122B, PF08123B, PF08107B and RF Micro Devices

RF3108. For slow turn-on RF power amplifiers refer to the

LTC4401-1/LTC4401-2.

RF power is controlled by driving the RF amplifier power

control pin and sensing the resultant RF output power via

a directional coupler or capacitive tap. The RF input

voltage is peak detected using an on-chip Schottky diode.

This detected voltage is compared to the DAC voltage at

the PCTL pin to control the output power. The RF power

amplifier is protected against high power control pin

voltages.

Internal and external offsets are cancelled over tempera-

ture by an autozero control loop, allowing accurate low

power programming. The shutdown feature disables the

part and reduces the supply current to <10µA.

A dual control channel version (LTC4400-2) is also

available in an 8-pin MSOP package.

■

RF Power Amplifier Control in ThinSOT

Package

■

Internal Schottky Diode Detector with >45dB Range

■

Wide Input Frequency Range:

300MHz to 2.7GHz (LTC4400-1)

300MHz to 2GHz (LTC4400-2)

■

Autozero Loop Cancels Offset Errors and

Temperature Dependent Offsets

■

Wide V

Range: 2.7V to 6V

■

Automatic Bandwidth Control Improves Low Power

Ramp Response

■

Allows Direct Connection to Battery

■

RF Output Power Set by External DAC

■

Internal Frequency Compensation

■

Rail-to-Rail Power Control Output

■

Power Control Signal Overvoltage Protection

■

Low Operating Current: 1mA

■

Low Shutdown Current: 10µA

■

Two Pole PCTL Input Filtering

■

Low Profile (1mm) ThinSOT (LTC4400-1) and

8-Pin MSOP (LTC4400-2) Packages

, LTC and LT are registered trademarks of Linear Technology Corporation.

LTC4400-1 Dual Band Cellular Telephone Transmitter

■

GSM/GPRS Cellular Telephones

■

PCS Devices

■

Wireless Data Modems

■

U.S. TDMA Cellular Phones

SHDN

PCTL

PCA

GND

LTC4400-1

SHDN

DAC

1.8GHz

INPUT

900MHz

INPUT

4400 TA01

0.1µF0.4pF

50Ω

Li-Ion

900MHz

OUTPUT

1.8GHz

OUTPUT

PA MODULE

BAND

SELECT

ThinSOT is a trademark of Linear Technology Corporation.

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR

OUTPUT VOLTAGE (mV)

100

1000

10000

–26 –22–18 –14 –10 –6 –2 2 6 10 14 18

4400 TA04

= 25°C

= 3.6V

900MHz 1800MHz

LTC4400-1 Detector Characteristics at

900MHz and 1800MHz

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ABSOLUTE AXI U RATI GS

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to GND .............................................. –0.3V to 6.5V

PCA/B

Voltage to GND ............................ –0.3V to 3.2V

PCTL Voltage to GND ................. –0.3V to (V

+ 0.3V)

RF Voltage to GND............................ (V

– 2.6V) to 7V

BSEL, SHDN Voltage to GND ...... –0.3V to (V

+ 0.3V)

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 3.6V, SHDN = HI, unless otherwise noted.

ELECTRICAL CHARACTERISTICS

PACKAGE/ORDER I FOR ATIO

VPCA/B

.................................................................. 10mA

Operating Temperature Range (Note 2) .. –40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Maximum Junction Temperature ........................ 125°C

Lead Temperature (Soldering, 10 sec)................ 300°C

(Note 1)

ORDER PART

NUMBER

S6 PART MARKING

LTC4400-1ES6

LTWZ

JMAX

= 125°C, θ

= 230°C/W

Consult LTC Marketing for parts specified with wider operating temperature ranges.

PCA

PCB

GND

BSEL

SHDN

PCTL

TOP VIEW

MS8 PACKAGE

8-LEAD PLASTIC MSOP

ORDER PART

NUMBER

MS8 PART MARKING

LTC4400-2EMS8

LTXB

JMAX

= 125°C, θ

= 250°C/W

RF 1

GND 2

PCTL 3

6 V

5 VPCA

4 SHDN

TOP VIEW

S6 PACKAGE

6-LEAD PLASTIC TSOT-23

PARAMETER CONDITIONS MIN TYP MAX UNITS

Operating Voltage ●2.7 6 V

VCC

Shutdown Current SHDN = 0V ●10 20 µA

VCC

Operating Current SHDN = HI, I

VPCA/B

= 0mA ●1.2 1.9 mA

PCA/B

LOAD

= 400Ω, Enabled ●0 0.05 V

PCA/B

Dropout Voltage I

LOAD

= 6mA, V

= 2.7V ●V

– 0.25 V

PCA/B

Voltage Clamp PCTL = 1V ●2.7 2.9 3.1 V

PCA/B

Output Current V

PCA/B

= 2.4V, V

= 3V ●710 mA

PCA/B

Enable Time SHDN = V

(Note 5) ●9 10.2 µs

PCA/B

Bandwidth C

LOAD

= 100pF, R

LOAD

= 400Ω (Note 8) PCTL < 80mV ●350 450 560 kHz

PCTL > 160mV 230 kHz

PCA/B

Load Capacitance ●100 pF

PCA/B

Slew Rate V

PCTL

= 2V Step, C

LOAD

= 100pF, ●1.8 2.5 3 V/µs

LOAD

= 400Ω (Note 3)

PCA/B

Droop 1µV/ms

PCA/B

Start Voltage Open Loop (Note 9) ●270 450 550 mV

BSEL, SHDN Input Threshold V

= 2.7V to 6V ●0.35 1.4 V

BSEL, SHDN Input Current BSEL = SHDN = 3.6V ●16 24 36 µA

PCTL Input Voltage Range (Note 7) ●0 2.4 V

PCTL Input Resistance ●60 90 120 kΩ

PCTL Input Filter 270 kHz

Autozero Range (Note 4) ●400 mV

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TYPICAL PERFOR A CE CHARACTERISTICS

LTC4400-1 Detector Characteristics

at 900MHz LTC4400-1 Detector Characteristics

at 1800MHz

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: Specifications over the –40°C to 85°C operating temperature range

are assured by design, characterization and correlation with statistical

process controls.

Note 3: Slew rate is measured open loop. The slew time at V

PCA/B

measured between 1V and 2V.

Note 4: Maximum DAC zero-scale offset voltage that can be applied to PCTL.

Note 5: This is the time from SHDN rising edge 50% switch point to

PCA

= 0.25V.

Note 6: Guaranteed by design. This parameter is not production tested.

Note 7: Includes maximum DAC offset voltage and maximum control

voltage.

Note 8: Bandwidth is calculated using the 10% to 90% rise time:

BW = 0.35/rise time

Note 9: Measured 12µs after SHDN = HI.

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–28 –10 2 8

1–22 –4 14–16

4401 G01

75°C

25°C

–30°C

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–26 –14 –8 –2 4 10 16

1–20

4401 G02

75°C

25°C

–30°C

ELECTRICAL CHARACTERISTICS

PARAMETER CONDITIONS MIN TYP MAX UNITS

RF Input Frequency Range LTC4400-1(Note 6) 300 2700 MHz

LTC4400-2(Note 6) 300 2000 MHz

RF Input Power Range RF Frequency = 900MHz (Note 6) –28 18 dBm

(LTC4400-1) RF Frequency = 1800MHz (Note 6) –26 18 dBm

RF Frequency = 2400MHz (Note 6) –24 16 dBm

RF Frequency = 2700MHz (Note 6) –22 16 dBm

RF Input Power Range RF Frequency = 900MHz (Note 6) –28 18 dBm

(LTC4400-2) RF Frequency = 2000MHz (Note 6) –26 18 dBm

RF Input Resistance Referenced to V

●150 250 350 Ω

The ● denotes specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VCC = 3.6V, SHDN = HI, unless otherwise noted.

LTC4400-1 Detector Characteristics

at 2400MHz

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–24 –12 –8 –4 40 8 12 16

1–20 –16

4401 G03

75°C

25°C

–30°C

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RF (Pins 1/8): RF Feedback Voltage. This input is referenced

to V

. The frequency range is 300MHz to 2700MHz for the

LTC4400-1 and 300MHz to 2000MHz for the LTC4400-2.

This pin has an internal 250Ω termination, an internal

Schottky diode detector and peak detector capacitor.

GND (Pins 2/4): System Ground.

PCTL (Pins 3/5): Analog Input. The external power control

DAC drives this input. The amplifier servos the RF power

until the RF detected signal equals the DAC signal. The

input impedance is typically 90kΩ.

PCB

(Pin 3): (LTC4400-2 Only) Power Control Voltage

Output. This pin drives an external RF power amplifier

power control pin. The maximum load capacitance is

100pF.

SHDN (Pins 4/6): Shutdown Input. A logic low on the SHDN

pin places the part in shutdown mode. A logic high places

the part in enable mode. SHDN has an internal 150k pull-

down resistor to ensure that the part is in shutdown when

the drivers are in a three-state condition.

PCA

(Pins 5/2): Power Control Voltage Output. This pin

drives an external RF power amplifier power control pin.

The maximum load capacitance is 100pF.

(Pins 6/1): Input Supply Voltage, 2.7V to 6V. V

should be bypassed with 0.1µF and 100pF ceramic capaci-

tors. Used as return for RF 250Ω termination.

BSEL (Pin 7): (LTC4400-2 Only) Selects V

PCA

when Low

and V

PCB

when High. This input has an internal 150k

resistor to ground.

PI FU CTIO S

(LTC4400-1/LTC4400-2)

LTC4400-1 Detector Characteristics

at 2700MHz

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–22 –10 –6 –2 621014

1–18 –14

4401 G04

75°C

25°C

–30°C

TYPICAL PERFOR A CE CHARACTERISTICS

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–28 –10 2 8

1–22 –4 14–16

4400 G05

75°C

25°C

–30°C

RF INPUT POWER (dBm)

PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)

100

1000

10000

–26 –14 –8 –2 4 10 16

1–20

4400 G06

75°C

25°C

–30°C

LTC4400-2 Detector Characteristics

at 900MHz LTC4400-2 Detector Characteristics

at 1800MHz

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–

RF DET

–

80mV

270kHz

FILTER

–

30k

22k 51k

30k

250Ω

28pF

33pF

100Ω

4400-1 BD

12Ω

150k

60µA60µA

RF 1

Li-Ion

PCA

GND

PCTL

RF PARF IN

AUTOZERO

TXENB

–

CONTROL

SHDN

10µs

DELAY

NOTE: THE DIRECTIONAL COUPLER SHOWN IN THIS FIGURE MAY BE REPLACED

WITH A COUPLING CAPACITOR AND RESISTOR AS DESCRIBED IN APPLICATION

NOTE 91 “LOW COST COUPLING METHODS FOR RF POWER DETECTORS REPLACE

DIRECTIONAL COUPLERS”

REF

50Ω

68Ω

REF

GAIN

COMPRESSION

CLAMP

BUFFER

38k

30k

33.4k 6k

30k

–

TXENB

LTC4400-1

VBG

BLOCK DIAGRA

(LTC4400-1)

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BLOCK DIAGRA

–

RF DET

–

80mV

270kHz

FILTER

–

30k

22k 51k

30k

250Ω

28pF

100Ω

4400-2 BD

12Ω

150k

60µA60µA

RF 8

VCC

Li-Ion

VPCA

GND

PCTL

BSEL

RF PA RF PA900MHz

AUTOZERO

TXENB

–

100Ω

12Ω

CONTROL

150k

SHDN

10µs

DELAY

VREF

1.8GHz/1.9GHz

VREF

GAIN

COMPRESSION

CLAMP

MUX1 MUX2

38k

30k

33.4k 6k

30k

–

TXENB

LTC4400-2

VBG

DIPLEXER

3VPCB

BUF A

BUF B

50Ω0.4pF

(LTC4400-2)

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APPLICATIONS INFORMATION

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Operation

The LTC4400-X RF power control amplifier integrates

several functions to provide RF power control over fre-

quencies ranging from 300MHz to 2.7GHz. This product is

well suited to control RF power amplifiers that exhibit fast

turn-on times. The device also prevents damage to the RF

power amplifier due to overvoltage conditions. These

functions include an internally compensated power con-

trol amplifier to control the RF output power, an autozero

section to cancel internal and external voltage offsets, an

RF Schottky diode peak detector and amplifier to convert

the RF feedback signal to DC, a V

PCA/B

overvoltage clamp,

compression and a bandgap reference.

Band Selection

The LTC4400-2 is designed to drive two separate power

control lines. The BSEL pin will select V

PCA

when low and

PCB

when high. BSEL must be established prior to SHDN

being asserted high.

Control Amplifier

The control amplifier supplies the power control voltage to

the RF power amplifier. A portion (typically –19dB for low

frequencies and –14dB for high frequencies) of the RF

output voltage is sampled, via a directional coupler or

capacitive tap, to close the gain control loop. When a DAC

voltage is applied to PCTL, the amplifier quickly servos

PCA/B

positive until the detected feedback voltage applied

to the RF pin matches the voltage at PCTL. This feedback

loop provides accurate RF power control. V

PCA/B

is capable

of driving a 6mA load current and 100pF load capacitor.

Control Amplifier Compression

The gain compression breakpoints are at PCTL = 80mV

and PCTL = 160mV. Above 160mV the gain does not

change. The compression changes the feedback attenua-

tion these by reducing the loop gain.

RF Detector

The internal RF Schottky diode peak detector and ampli-

fier converts the RF feedback

voltage

to a low frequency

voltage

. This

voltage

is compared to the DAC

voltage

the PCTL pin by the control amplifier to close the RF

power control loop. The RF pin input resistance is typi-

cally 250Ω and the frequency range of this pin is 300MHz

to 2700MHz for the LTC4400-1 and 300MHz to 2000MHz

for the LTC4400-2. The detector demonstrates excel

lent

efficiency over a wide range of input power. The Schottky

detector is biased at about 60µA and drives an on-chip

peak detector capacitor of 28pF.

Autozero

An autozero system is included to improve power pro-

gramming accuracy over temperature. This section can-

cels internal offsets associated with the Schottky diode

detector and control amplifier. External offsets associated

with the DAC driving the PCTL pin are also cancelled.

Offset drift due to temperature is cancelled between each

burst. The maximum offset voltage allowed at the DAC

output is limited to 400mV. Autozeroing is performed

during a 10µs period after SHDN is asserted high. An

internal timer enables the

PCA/B

output after 10µs. The

autozero capacitors are held and the

PCA/B

pin is con-

nected to the control amplifier output. The hold droop

voltage of typically <1µV/ms provides for accurate offset

cancella

tion. The part should be shut down between

bursts or after multiple consecutive bursts.

Filter

There is a 270kHz two pole filter included in the PCTL path

to remove DAC noise.

Protection Features

The RF power amplifier control voltage pin is overvoltage

protected. The VPCA/B overvoltage clamp regulates

VPCA/B to 2.9V when the gain and PCTL input combination

attempts to exceed this voltage.

Modes of Operation

Shutdown: The part is in shutdown mode when SHDN is

low. V

PCA/B

is held at ground and the power supply current

is typically 10µA.

Enable: When SHDN is asserted high the part will auto-

matically calibrate out all offsets. This takes <10µs and is

controlled by an internal delay circuit. After 10µs V

PCA/B

will step up to the starting voltage of 450mV. The user can

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then apply the ramp signal. The user should wait 12µs after

SHDN has been asserted high before applying the ramp.

The DAC should be settled 2µs after asserting SHDN high.

APPLICATIO S I FOR ATIO

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General Layout Considerations

The LTC4400-X should be placed near the coupling com-

ponents. The feedback signal line to the RF pin should be

a 50Ω transmission line with optional termination or a

short line.

External Termination

The LTC4400-X has an internal 250Ω termination resistor

at the RF pin. If a directional coupler is used, it is recom-

mended that an external 68Ω termination resistor be

connected between the RF coupling capacitor (33pF), and

ground at the side connected to the directional coupler.

Termination components should be placed adjacent to the

LTC4400-X. An alternative method couples RF from the

power amplifier to the power controller through a 0.4pF

±0.05pF capacitor and 50Ω series resistor, completely

eliminating the directional coupler.

Power Ramp Profiles

The external voltage gain associated with the RF channel

can vary significantly between RF power amplifier types.

The LTC4400-X frequency compensation has been

optimized to be stable with several different power ampli-

fiers and manufacturers. This frequency compensation

generally defines the loop dynamics that impact the power/

time response and possibly (slow loops) the power ramp

sidebands. The LTC4400-X operates open loop until an RF

voltage appears at the RF pin, at which time the loop closes

and the output power follows the DAC profile. The RF

power amplifier will require a certain control voltage level

(threshold) before an RF output signal is produced. The

LTC4400-X V

PCA/B

output must quickly rise to this thresh-

old voltage in order to meet the power/time profile. To

reduce this time, the LTC4400-X starts at 450mV. How-

ever, at very low power levels the PCTL input signal is

small, and the V

PCA/B

output may take several microsec-

onds to reach the RF power amplifier threshold voltage. To

reduce this time, it may be necessary to apply a positive

pulse at the start of the ramp to quickly bring the V

PCA/B

output to the threshold voltage. This can generally be

achieved with DAC programming. The magnitude of the

pulse is dependent on the RF amplifier characteristics.

Power ramp sidebands and power/time are also a factor

when ramping to zero power. When the power is ramped

down the loop will eventually open at power levels below

the LTC4400-X detector threshold. The LTC4400-X will

then go open loop and the output voltage at V

PCA/B

will

stop falling. If this voltage is high enough to produce RF

output power, the power/time or power ramp sidebands

may not meet specification. This problem can be avoided

by starting the DAC ramp from 100mV (Figure 1). At the

end of the cycle, the DAC can be ramped down to 0mV.

This applies a negative signal to the LTC4400-X thereby

ensuring that the V

PCA/B

output will ramp to 0V. The

100mV ramp step must be applied <2µs after SHDN is

asserted high to allow the autozero to cancel the step. Slow

DAC rise times will extend this time by the additional RC

time constants which may require that the DAC is enabled

and settled prior to SHDN asserted high.

LTC4400-X Timing Diagram

10µs28µs

2µs28µs

543µs

T1 T2 T3 T4 T5 T6

VSTART

SHDN

VPCA/B

PCTL

4400 TA02

T1: LTC4400-X COMES OUT OF SHUTDOWN 12µs PRIOR TO BURST

T2: INTERNAL TIMER COMPLETES AUTOZERO CORRECTION, <10µs

T3: BASEBAND CONTROLLER STARTS RF POWER RAMP UP AT 12µs AFTER

SHDN IS ASSERTED HIGH

T4: BASEBAND CONTROLLER COMPLETES RAMP UP

T5: BASEBAND CONTROLLER STARTS RF POWER RAMP DOWN AT END OF BURST

T6: LTC4400-X RETURNS TO SHUTDOWN MODE BETWEEN BURSTS

T7: BSEL CHANGE PRIOR TO SHDN, 0ns TYPICAL (LTC4400-2 ONLY)

T8: BSEL CHANGE AFTER TO SHDN, 0ns TYPICAL (LTC4400-2 ONLY)

BSEL

T7 T8

(LTC4400-2 ONLY)

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APPLICATIO S I FOR ATIO

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Demo Board

The LTC4400-X demo board is available upon request. The

demo board has a 900MHz and an 1800MHz RF channel

controlled by the LTC4400-X. Timing signals for SHDN are

generated on the board using a 13MHz crystal reference.

The PCTL power control pin is driven by a 10-bit DAC and

the DAC profile can be loaded via a serial port. The serial

port data is stored in a flash memory which is capable of

storing eight ramp profiles. The board is supplied preloaded

with four GSM power profiles and four DCS power profiles

covering the entire power range. External timing signals

can be used in place of the internal crystal controlled

timing. A variety of RF power amplifiers as well as ramp

generation software are available.

LTC4400-X Control Loop Stability

The LTC4400-X provides a stable control loop for several

RF power amplifier models from different manufacturers

over a wide range of frequencies, output power levels and

SWR

conditions. However, there are several factors that

can improve or degrade loop frequency stability.

1) The additional voltage gain supplied by the RF power

amplifier increases the loop gain raising poles normally

below the 0dB axis. The extra voltage gain can vary

significantly over input/output power ranges, frequency,

power supply, temperature and manufacturer. RF power

amplifier gain control transfer functions are often not

available and must be generated by the user. Loop oscil-

lations are most likely to occur in the midpower range

where the external voltage gain associated with the RF

power amplifier typically peaks. It is useful to measure the

oscillation or ringing frequency to determine whether it

corresponds to the expected loop bandwidth and thus is

due to high gain bandwidth.

2) Loop voltage losses supplied by the RF feedback

coupler will improve phase margin. The larger the loss, the

more stable the loop will become. However, larger losses

reduce the RF signal to the LTC4400-X and detector

performance may be degraded at low power levels. (See

RF Detector Characteristics.)

3) Additional poles within the loop due to filtering or the

turn-on response of the RF power amplifier can degrade

the phase margin if these pole frequencies are near the

effective loop bandwidth frequency. Generally loops using

RF power amplifiers with fast turn-on times have more

phase margin. Extra filtering below 16MHz should never

be placed within the control loop, as this will only degrade

phase margin.

4) Control loop instability can also be due to open-loop

issues. RF power amplifiers should first be characterized

in an open-loop configuration to ensure self oscillation is

not present. Self-oscillation is often related to poor power

supply decoupling, ground loops, coupling due to poor

layout and extreme V

SWR

conditions. The oscillation fre-

quency is generally in the 100kHz to 10MHz range. Power

supply related oscillation suppression requires large value

ceramic decoupling capacitors placed close to the RF

power amp supply pins. The range of decoupling capacitor

values is typically 1nF to 3.3µF.

5) Poor layout techniques associated with the RF coupling

components may result in high frequency signals bypass-

ing the coupler. This could result in stability problems due

to the reduction in the coupler loss.

Figure 1. LTC4400-X Ramp Timing

START

CODE

100mV

–10

–20

–30

–40

–50

–60

–70

–80

12µs, ALLOWS TIME FOR DAC

AND AUTOZERO TO SETTLE

SHDN

543 553 561 571

4400 F01

–28 –18 –10 0 TIME (µs)

RFOUT (dBc)DAC VOLTAGE

START

PULSE

ZERO

CODE

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Determining External Loop Gain and Bandwidth

The external loop voltage gain contributed by the RF chan-

nel and RF feedback coupling network should be mea-

sured in a closed-loop configuration. A voltage step is

applied to PCTL and the change in V

PCA/B

is measured. The

detected voltage is K • PCTL, where K is the internal gain

between PCTL and the RF pin, and the external voltage gain

contributed by the RF power amplifier and RF feedback

coupling network is K • ∆V

PCTL

/∆V

VPC

. Measuring voltage

gain in the closed-loop configuration accounts for the

nonlinear detector gain that is dependent on RF input

voltage and frequency.

The LTC4400-X unity gain bandwidth specified in the data

sheet assumes that the net voltage gain contributed by the

RF power amplifier and RF feedback coupler is unity. The

bandwidth is calculated by measuring the rise time be-

tween 10% and 90% of the voltage change at V

PCA/B

for a

small step in voltage applied to PCTL.

BW1 = 0.35/rise time

The LTC4400-X control amplifier unity gain bandwidth

(BW1) is typically 450kHz below a PCTL voltage of 80mV.

For PCTL voltages <80mV, the RF detected voltage is

0.6PCTL. For PCTL voltages >160mV, RF detected voltage

is 1.22PCTL – 0.1. This change in gain is due to an internal

compression circuit designed to extend the detector range.

For example, to determine the external RF channel loop

voltage gain with the loop closed, apply a 100mV step to

PCTL from 300mV to 400mV. V

PCA/B

will increase to

APPLICATIO S I FOR ATIO

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supply enough feedback voltage to the RF pin to cancel

this 100mV step which would be the required detected

voltage step of 122mV. V

PCA/B

changed from 1.5V to

1.561V to create the RF output power change required.

The net external voltage gain contributed by the RF power

amplifier and RF feedback coupling network can be calcu-

lated by dividing the 122mV change at the RF pin by the

61mV change at the V

PCA/B

pin. The net external voltage

gain would then be approximately 2. The loop bandwidth

extends to 2 • BW1. If BW1 is 230kHz, the loop bandwidth

increases to approximately 460kHz. The phase margin can

be determined from Figures 2 and 3. Repeat the above

voltage gain measurement over the full power and fre-

quency range.

External pole frequencies within the loop will further

reduce phase margin. The phase margin degradation, due

to external and internal pole combinations, is difficult to

determine since complex poles are present. Gain peaking

may occur, resulting in higher bandwidth and lower phase

margin than predicted from the open-loop Bode plot. A

low frequency AC SPICE model of the LTC4400-X power

controller is included to better determine pole and zero

interactions. The user can apply external gains and poles

to determine bandwidth and phase margin. DC, transient

and RF information cannot be extracted from the present

model. The model is suitable for external gain evaluations

up to 6×. The 270kHz PCTL input filter limits the band-

width, therefore, use the RF input as demonstrated in the

model. Gain compression is not modeled.

Figure 2. Measured Open-Loop Gain and Phase, PCTL < 80mV Figure 3. Measured Open-Loop Gain and Phase, PCTL > 160mV

FREQUENCY (Hz)

100

–20

VOLTAGE GAIN (dB)

PHASE (DEG)

–10

1k 10k 100k 1M 10M

4400 F02

–30

–40

–50

–60

–20

100

–40

–60

–80

–100

–120

140

120

160

PHASE

GAIN

LOAD

= 2k

LOAD

= 33pF

FREQUENCY (Hz)

100

–20

VOLTAGE GAIN (dB)

PHASE (DEG)

–10

1k 10k 100k 1M 10M

4400 F03

–30

–40

–50

–60

–20

100

–40

–60

–80

–100

140

120

180

160

PHASE

LOAD

= 2k

LOAD

= 33pF

GAIN

L7LJIJMW

LTC4400-1/LTC4400-2

sn4400 4400fas

APPLICATIO S I FOR ATIO

WUUU

This model (Figure 6) is being supplied to LTC users as an

aid to circuit designs. While the model reflects reasonably

close similarity to corresponding devices in low frequency

AC performance terms, its use is not suggested as a

replacement for breadboarding. Simulation should be

used as a forerunner or a supplement to traditional lab

testing.

Users should note very carefully the following factors

regarding this model: Model performance in general will

reflect typical baseline specs for a given device, and

certain aspects of performance may not be modeled fully.

While reasonable care has been taken in the preparation,

we cannot be responsible for correct application on any

and all computer systems. Model users are hereby notified

that these models are supplied “as is”, with no direct or

implied responsibility on the part of LTC for their operation

within a customer circuit or system. Further, Linear Tech-

nology Corporation reserves the right to change these

models without prior notice.

In all cases, the current data sheet information is your final

design guideline, and is the only performance guarantee.

For further technical information, refer to individual device

data sheets. Your feedback and suggestions on this model

is appreciated.

Figure 4. Closed-Loop Block Diagram Figure 5. SPICE Model Open-Loop Gain and Phase

Characteristics from RF to VPCA, PCTL < 80mV

FREQUENCY (Hz)

100

–20

VOLTAGE GAIN (dB)

PHASE (DEG)

–10

1k 10k 100k 1M 10M

4400 F05

–30

–40

–50

–60

–20

100

–40

–60

–80

–100

140

120

180

160

PHASE

LOAD

= 2k

LOAD

= 33pF

GAIN

G1PCTL

IFB

H1 RF

4400 F04

VPC

LTC4400-X

RF DETECTOR

CONTROL

AMPLIFER RF POWER AMP

CONTROLLED

RF OUTPUT

POWER

RF COUPLER

14dB to 20dB LOSS

–

Linear Technology Corporation hereby grants the users of

this model a nonexclusive, nontransferable license to use

this model under the following conditions:

The user agrees that this model is licensed from Linear

Technology and agrees that the model may be used,

loaned, given away or included in other model libraries as

long as this notice and the model in its entirety and

unchanged is included. No right to make derivative works

or modifications to the model is granted hereby. All such

rights are reserved.

This model is provided as is. Linear Technology makes

no warranty, either expressed or implied about the suit-

ability or fitness of this model for any particular purpose.

In no event will Linear Technology be liable for special,

collateral, incidental or consequential damages in con-

nection with or arising out of the use of this model. It

should be remembered that models are a simplification

of the actual circuit.

L7 LJEJW

LTC4400-1/LTC4400-2

sn4400 4400fas

APPLICATIO S I FOR ATIO

WUUU

*LTC4400-X Low Frequency AC Spice Model*

*July 11, 2001

*Main Network Description

GGIN1 ND3 0 ND2 IFB 86E-6

GGXFB IFB 0 0 ND12 33E-6

GGX5 ND11 0 0 ND10 1E-6

GGX6 ND12 0 0 ND11 1E-6

GGX1 ND4 0 0 ND3 1E-6

GGX2 ND6 0 0 ND4 1E-6

GGX3 ND7 0 0 ND6 1E-6

GGX4 ND8 0 0 ND7 1E-6

EEX1 ND9 0 0 ND8 2

CCC1 ND3 0 44E-12

CCPCTL2 ND2 0 7E-12

CCPCTL1 ND1 0 13E-12

CCLINT VPCA 0 5E-12

CCLOAD VPCA 0 33E-12

CCFB1 IFB 0 2.4E-12

CCX5 ND11 0 16E-15

CCX6 ND12 0 1.2E-15

CCP ND10 0 28E-12

CCX2 ND6 0 8E-15

CCX3 ND7 0 32E-15

LLX1 ND5 0 80E-3

RR01 ND3 0 20E6

RRFILT ND2 ND1 44E3

RRPCTL1 PCTL ND1 51E3

RRPCTL2 ND1 0 38E3

RR9 VPCA ND9 50

RRLOAD VPCA 0 2E3

RRFB1 IFB 0 22E3

RRT RF 0 250

RRX5 ND11 0 1E6

RRX6 ND12 0 1E6

RRSDRF ND10 500

RRX1 ND4 ND5 1E6

RRX2 ND6 0 1E6

RRX3 ND7 0 1E6

RRX4 ND8 0 1E6

**Closed-loop feedback, comment-out VPCTLO, VRF, Adjust EFB gain to reflect external gain, currently set at 3X**

*EFB RF 0 VPCA VIN 3

*VIN VIN 0 DC 0 AC 1

*VPCTLO PCTL 0 DC 0

**Open-loop connections, comment-out EFB, VIN and VPCTLO******

VPCTLO PCTL 0 DC 0

VRF RF 0 DC 0 AC 1

******Add AC statement and print statement as required***

.AC DEC 50 100 1E7

*****for PSPICE only*****

.OP

.PROBE

*************************

.END

Figure 6. LTC4400-X Low Frequency AC SPICE Model

L7LJIJMW

LTC4400-1/LTC4400-2

sn4400 4400fas

APPLICATIO S I FOR ATIO

WUUU

Figure 7. LTC4400-X Low Frequency AC Model

RO1

20E6

ND3

ND2ND1 GIN1

86E-6

IFB

GX1

1E-6

GX2

1E-6

GX3

1E-6

GX4

1E-6

CC1

44E-12

PCTL2

38E3

PCTL1

51E3

FILT

44E3

RX1

1E6

ND4

RX2

1E6

ND6

ND5 RX3

1E6

ND7

CX3

32E-15

RX4

1E6

LOAD

2E3

ND8

–

CX2

8E-15

–

RX5

1E6

ND11

ND10

CX5

16E-15

–

RSD

500Ω

250Ω

28E-12

RX6

1E6

ND12

CX6

1.2E-15

–

4400 F07

–

RFB1

22E3

GM GM GM GM GM

GX5

1E-6

GX6

1E-6

GXFB

33E-6

EX1

AMP

PCTL

PCA

PCTL2

7E-12

PCTL1

13E-12

CFB1

2.4E-12 2

ND9

ND8

2X BUFFER

LINT

5E-12 C

LOAD

33E-12

50Ω

LX1

80E-3

L7 LJEJW

LTC4400-1/LTC4400-2

sn4400 4400fas

PACKAGE DESCRIPTIO

S6 Package

6-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1636)

1.50 – 1.75

(NOTE 4)

2.80 BSC

0.30 – 0.45

6 PLCS (NOTE 3)

DATUM ‘A’

0.09 – 0.20

(NOTE 3)

S6 TSOT-23 0302

2.90 BSC

(NOTE 4)

0.95 BSC

1.90 BSC

0.80 – 0.90

1.00 MAX 0.01 – 0.10

0.20 BSC

0.30 – 0.50 REF

PIN ONE ID

NOTE:

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. JEDEC PACKAGE REFERENCE IS MO-193

3.85 MAX

0.62

MAX 0.95

REF

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

1.4 MIN

2.62 REF

1.22 REF

L7LJIJMW osmium TI] I] I] I]: ﬂ 5 327345

LTC4400-1/LTC4400-2

sn4400 4400fas

PACKAGE DESCRIPTIO

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

MSOP (MS8) 0802

0.53 ± 0.015

(.021 ± .006)

SEATING

PLANE

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

0.18

(.077)

0.254

(.010)

1.10

(.043)

MAX

0.22 – 0.38

(.009 – .015)

TYP

0.13 ± 0.076

(.005 ± .003)

0.86

(.034)

REF

0.65

(.0256)

BSC

0° – 6° TYP

DETAIL “A”

GAUGE PLANE

4.90 ± 0.15

(1.93 ± .006)

8765

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

3.00 ± 0.102

(.118 ± .004)

NOTE 4

0.52

(.206)

REF

5.23

(.206)

MIN

3.2 – 3.45

(.126 – .136)

0.889 ± 0.127

(.035 ± .005)

RECOMMENDED SOLDER PAD LAYOUT

0.42 ± 0.04

(.0165 ± .0015)

TYP

0.65

(.0256)

BSC

L7 LJEJW

LTC4400-1/LTC4400-2

sn4400 4400fas

 LINEAR TECHNOLOGY CORPORATION 2001

LT/TP 0403 1K REV A • PRINTED IN THE USA

PART NUMBER DESCRIPTION COMMENTS

LTC1261 Regulated Inductorless Voltage Inverter Regulated –5V from 3V, REG Pin Indicates Regulation, Up to 15mA, Micropower

LTC1732 Li-Ion Linear Charger Complete Linear Charger for 1- and 2-Cell Li-Ion Battery

LTC1734/LTC1734L ThinSOT Li-Ion Battery Charger Only Two External Components, No Reverse Current Protection Diode Required,

No Sense Resistor Required, PROG Voltage for Charge Termination

LTC1754 ThinSOT Charge Pump 2V ≤ V

≤ 4V, I

OUT

= 40mA, No Inductors for White LED Backlight

LTC1757A RF Power Controller Single/Dual Band GSM/DCS/GPRS Mobile Phones

LTC1758 RF Power Controller Single/Dual Band GSM/DCS/GPRS Mobile Phones

LTC1957 RF Power Controller Single/Dual Band GSM/DCS/GPRS Mobile Phones

LTC4052 Li-Ion Pulse Charger Complete Pulse Charger for 1-Cell Li-Ion Battery

LTC4401 SOT-23 RF PA Controller Multiband GSM/DCS/GPRS Phones, 45dB Dynamic Range, 250kHz Loop BW

LT®5500 1.8GHz to 2.7GHz Receiver Front End Dual LNA Gain Setting +13.5dB/–14dB at 2.5GHz, Double-Balanced Mixer,

1.8V ≤ V

SUPPLY

≤ 5.25V

LT5502 400MHz Quadrature IF Demodulator with 70MHz to 400MHz IF, 1.8V ≤ V

SUPPLY

≤ 5.25V, 84dBm Limiting Gain,

RSSI 90dB RSSI Range

LT5503 1.2GHz to 2.7GHz Direct IQ Modulator with Direct IQ Modulator with Integrated 90° Phase Shifter, 4-Step RF Power Control,

Mixer 1.8V ≤ V

SUPPLY

≤ 5.25V

LT5504 800MHz to 2.7GHz RF Measuring Receiver 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.5V Supply

LTC5505 300MHz to 3.5GHz RF Power Detector >40dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply

LTC5507 100kHz to 1GHz RF Power Detector 40dB Dynamic Range, Temperature Compensated, 2.7V to 6V Supply

LTC5508 300MHz to 7GHz RF Power Detector 40dB Dynamic Range, 2.7V to 6V Supply, SC70 Package

LT5511 High Signal Level Up Converting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer

LT5512 High Signal Level Down Converting Mixer DC-3GHz RF Input, 20dBm IIP3, Integrated LO Buffer

RELATED PARTS

TYPICAL APPLICATION

LTC4400-2 Dual Band Cellular Telephone Transmitter

DAC RF PA

4400 TA03

DIRECTIONAL

COUPLER

RF PA

50Ω

0.1µF

SHDN

BSEL

GND

PCA

PCB

PCTL

LTC4400-2

SHDN

BSEL

Li-Ion

33pF

68Ω

1.8GHz/

1.9GHz

900MHz

DIPLEXER

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

●

FAX: (408) 434-0507

●

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