onsemi 的 DM74S11 规格书

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© 2000 Fairchild Semiconductor Corporation DS006447 www.fairchildsemi.com
August 1986
Revised April 2000
DM74S11 Triple 3-Input AND Gate
DM74S11
Triple 3-Input AND Gate
General Description
This device contains three independent gates each of
which performs the logic AND function.
Ordering Code:
Connection Diagram Function Table
Y = ABC
H = HIGH Logic Level
L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Order Number Package Number Package Description
DM74S11N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
ABCY
XXLL
XLXL
LXXL
HHHH
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DM74S11
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Note 2: All typicals are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Switching Characteristics
at VCC = 5V and TA = 25°C
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range −65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current −1mA
IOL LOW Level Output Current 20 mA
TAFree Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
(Note 2)
VIInput Clamp Voltage VCC = Min, II = −18 mA −1.2 V
VOH HIGH Level VCC = Min, IOH = Max 2.7 3.4 V
Output Voltage VIH = Min
VOL LOW Level VCC = Min, IOL = Max 0.5 V
Output Voltage VIL = Max
IIInput Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.7V 50 µA
IIL LOW Level Input Current VCC = Max, VI = 0.5V −2mA
IOS Short Circuit Output Current VCC = Max (Note 3) −40 −100 mA
ICCH Supply Current with Outputs HIGH VCC = Max 13.5 24 mA
ICCL Supply Current with Outputs LOW VCC = Max 24 42 mA
RL = 280Ω
Symbol Parameter CL = 15 pF CL = 50 pF Units
Min Max Min Max
tPLH Propagation Delay Time 2.5 7 3 9 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time 2.5 7.5 3 11 ns
HIGH-to-LOW Level Output
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DM74S11 Triple 3-Input AND Gate
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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