onsemi 的 74F182 规格书

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© 2002 Fairchild Semiconductor Corporation DS009492 www.fairchildsemi.com
April 1988
Revised June 2002
74F182 Carry Lookahead Generator
74F182
Carry Lookahead Generator
General Description
The 74F182 is a high-speed carry lookahead generator. It
is generally used with the 74F181 or 74F381 4-bit arith-
metic logic units to provide high-speed lookahead over
word lengths of more than four bits.
Features
■Provides lookahead carries across a group of four ALUs
■Multi-level lookahead high-speed arithmetic operation
over long word lengths
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: This device not available in Tape and Reel.
Logic Symbols Connection Diagram
Order Number Package Number Package Description
74F182SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F182PC
(Note 1) N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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74F182
Unit Loading/Fan Out
Functional Description
The 74F182 carry lookahead generator accepts up to four
pairs of Active LOW Carry Propagate (P0–P3) and Carry
Generate (G0–G3) signals and an Active HIGH Carry input
(Cn) and provides anticipated Active HIGH carries (Cn+x,
Cn+y, Cn+z) across four groups of binary adders. The
74F182 also has Active LOW Carry Propagate (P) and
Carry Generate (G) outputs which may be used for further
levels of lookahead. The logic equations provided at the
outputs are:
Cn+x = G0 + P0 Cn
Cn+y = G1 + P1 G0 + P1 P0 Cn
Cn+z = G2 + P2 G1 + P2 P1 G0 + P2 P1 P0 Cn
G = G3 + P3 G2 + P3 P2 G1 + P3 P2 P1 G0
P = P2 P2 P1 P0
Also, the 74F182 can be used with binary ALUs in an
active LOW or active HIGH input operand mode. The con-
nections (Figure 1) to and from the ALU to the carry looka-
head generator are identical in both cases. Carries are
rippled between lookahead blocks. The critical speed path
follows the circled numbers. There are several possible
arrangements for the carry interconnects, but all achieve
about the same speed. A 28-bit ALU is formed by dropping
the last 74F181 or 74F381.
*ALUs may be either 74F181 or 74F381
FIGURE 1. 32-Bit ALU with Rippled Carry between 16-Bit Lookahead ALUs
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
CnCarry Input 1.0/2.0 20 µA/−1.2 mA
G0, G2Carry Generate Inputs (Active LOW) 1.0/14.0 20 µA/−8.4 mA
G1Carry Generate Input (Active LOW) 1.0/16.0 20 µA/−9.6 mA
G3Carry Generate Input (Active LOW) 1.0/8.0 20 µA/−4.8 mA
P0, P1Carry Propagate Inputs (Active LOW) 1.0/8.0 20 µA/−4.8 mA
P2Carry Propagate Input (Active LOW) 1.0/6.0 20 µA/−3.6 mA
P3Carry Propagate Input (Active LOW) 1.0/4.0 20 µA/−2.4 mA
Cn+x − Cn+zCarry Outputs 50/33.3 −1 mA/20 mA
GCarry Generate Output (Active LOW) 50/33.3 −1 mA/20 mA
PCarry Propagate Output (Active LOW) 50/33.3 −1 mA/20 mA
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74F182
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Inputs Outputs
CnG0P0G1P1G2P2G3P3Cn+xCn+yCn+zG P
XHH L
LHX L
XLX H
HXL H
XXXHH L
XHHHX L
LHXHX L
XXXLX H
XLXXL H
HXLXL H
XXXXXHH L
XXXHHHX L
XHHHXHX L
LHXHXHX L
XXXXXLX H
XXXLXXL H
XLXXLXL H
HXLXLXL H
X XXXXHH H
X XXHHHX H
X HHHXHX H
H HXHXHX H
X XXXXLX L
XXXLXXL L
XLXXLXL L
L XLXLXL L
HXXX H
XHXX H
XXHX H
XXXH H
LLLL L
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74F182
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F182
Absolute Maximum Ratings(Note 2) Recommended Operating
Conditions
Note 2: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150°C
VCC Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 3) −0.5V to +7.0V
Input Current (Note 3) −30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output −0.5V to VCC
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated IOL (mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambient Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V
Symbol Parameter Min Typ Max Units VCC Conditions
VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal
VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA
VOH Output HIGH 10% VCC 2.5 VMin
IOH = −1 mA
Voltage 5% VCC 2.7 IOH = −1 mA
VOL Output LOW 10% VCC 0.5 V Min IOL = 20 mA
Voltage
IIH Input HIGH 5.0 µAMaxV
IN = 2.7V
Current
IBVI Input HIGH Current 7.0 µAMaxV
IN = 7.0V
Breakdown Test
ICEX Output HIGH 50 µAMaxV
OUT = VCC
Leakage Current
VID Input Leakage 4.75 V 0.0 IID = 1.9 µA
Test All Other Pins Grounded
IOD Output Leakage 3.75 µA0.0
VIOD = 150 mV
Circuit Current All Other Pins Grounded
IIL Input LOW −1.2 mA Max VIN = 0.5V (Cn)
Current −2.4 VIN = 0.5V (P3)
−3.6 VIN = 0.5V (P2)
−4.8 VIN = 0.5V (G3, P0, P1)
−8.4 VIN = 0.5V (G0, G2)
−9.6 VIN = 0.5V (G1)
IOS Output Short-Circuit Current −60 −150 mA Max VOUT = 0V
ICCH Power Supply Current 18.4 28.0 mA Max VO = HIGH
ICCL Power Supply Current 23.5 36.0 mA Max VO = LOW
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74F182
AC Electrical Characteristics
Symbol Parameter
TA = +25°CT
A = −55°C to +125°CT
A = 0°C to +70°C
Units
VCC = +5.0V VCC = +5.0V VCC = +5.0V
CL = 50 pF CL = 50 pF CL = 50 pF
Min Typ Max Min Max Min Max
tPLH Propagation Delay 3.0 6.6 8.5 3.0 12.0 3.0 9.5 ns
tPHL Cn to Cn+x, Cn+y, Cn+z3.0 6.8 9.0 3.0 11.0 3.0 10.0
tPLH Propagation Delay 2.5 6.2 8.0 2.5 11.0 2.5 9.0
nstPHL P0, P1, or P2 to 1.5 3.7 5.0 1.0 7.0 1.5 6.0
Cn+x, Cn+y, or Cn+z
tPLH Propagation Delay 2.5 6.5 8.5 2.5 11.0 2.5 9.5
nstPHL G0, G1, or G2 to 1.53.95.21.07.01.56.0
Cn+x, Cn+y, or Cn+z
tPLH Propagation Delay 3.0 7.9 10.0 3.0 12.0 3.0 11.0 ns
tPHL P1, P2, or P3 to G 3.0 6.0 8.0 2.5 10.0 3.0 9.0
tPLH Propagation Delay 3.0 8.3 10.5 3.0 12.0 3.0 11.5 ns
tPHL Gn to G 3.0 5.7 7.5 2.5 10.0 3.0 8.5
tPLH Propagation Delay 3.0 5.7 7.5 2.5 10.0 3.0 8.5 ns
tPHL Pn to P 2.54.15.52.58.02.56.5
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74F182
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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74F182 Carry Lookahead Generator
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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