Texas Instruments 的 TIR1000, TIR1000I 规格书

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TIR1000, TIR1000I
SLLS228G DECEMBER 1995REVISED AUGUST 2015
TIR1000x Standalone IrDA™ Encoder and Decoder
1 Features 3 Description
The TIR1000x serial infrared (SIR) encoder and
1 Adds Infrared (IR) Port to Universal Asynchronous decoder is a CMOS device that encodes and
Receiver Transmitter (UART) decodes bit data in conformance with the IrDA
Compatible With Infrared Data Association specification.
(IrDA™) and Hewlett Packard Serial Infrared A transceiver device is needed to interface to the
(HPSIR) photo-sensitive diode (PIN) and the light emitting
Provides 1200-bps to 115-kbps Data Rate diode (LED). A UART is needed to interface to the
Operates from 2.7 V to 5.5 V serial data lines.
Provides Simple Interface With UART Device Information(1)
Decodes Negative or Positive Pulses PART NUMBER PACKAGE BODY SIZE (NOM)
Available in Two 8-Terminal Plastic Small Outline TSSOP (8) 3.00 mm × 4.40 mm
Packages (PSOP) TIR1000x SO (8) 6.20 mm × 5.30 mm
PS Package Has Slightly Larger Dimensions (1) For all available packages, see the orderable addendum at
Than PW Package the end of the data sheet.
2 Applications
UART Interfacing
Infrared Data Communications
Functional Block Diagram
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
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SLLS228G DECEMBER 1995REVISED AUGUST 2015
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Table of Contents
7.3 Feature Description................................................... 6
1 Features.................................................................. 17.4 Device Functional Modes.......................................... 7
2 Applications ........................................................... 18 Application and Implementation .......................... 9
3 Description ............................................................. 18.1 Application Information.............................................. 9
4 Revision History..................................................... 28.2 Typical Application ................................................... 9
5 Pin Configuration and Functions......................... 39 Power Supply Recommendations...................... 11
6 Specifications......................................................... 310 Layout................................................................... 12
6.1 Absolute Maximum Ratings ...................................... 310.1 Layout Guidelines ................................................. 12
6.2 ESD Ratings ............................................................ 410.2 Layout Example .................................................... 12
6.3 Recommended Operating Conditions....................... 411 Device and Documentation Support ................. 13
6.4 Thermal Information.................................................. 411.1 Community Resources.......................................... 13
6.5 Electrical Characteristics........................................... 411.2 Trademarks........................................................... 13
6.6 Switching Characteristics.......................................... 511.3 Electrostatic Discharge Caution............................ 13
7 Detailed Description.............................................. 611.4 Glossary................................................................ 13
7.1 Overview ................................................................... 612 Mechanical, Packaging, and Orderable
7.2 Functional Block Diagram......................................... 6Information ........................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (July 1999) to Revision G Page
Added Applications,Pin Configuration and Functions section, ESD Ratings table, Typical Characteristics section,
Feature Description section, Device Functional Modes,Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section ..................................................................................................................... 1
Added PS package drawing ................................................................................................................................................... 3
Changed troutput rise time FROM: 1.3 ns TO: 23.8 ns in Switching Characteristics ........................................................... 5
Changed tfoutput fall time FROM: 1.8 ns TO: 9.2 ns in Switching Characteristics .............................................................. 5
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l TEXAS INSTRUMENTS MN MW x0
16XCLK 8
1
7
2
6
3
5
4
U_TXD
U_RXD
GND RESET
IR_RXD
IR_TXD
VCC
8
1
7
2
6
3
5
4
16XCLK
U_TXD
U_RXD
GND RESET
IR_RXD
IR_TXD
VCC
TIR1000, TIR1000I
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SLLS228G DECEMBER 1995REVISED AUGUST 2015
5 Pin Configuration and Functions
PS Package PW Package
8-Pin SO 8-Pin TSSOP
Top View Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
Clock signal. 16XCLK must be set to 16 times the baud rate. The highest baud rate for IrDA is 115.2 kbps
16XCLK 1 I for which the clock frequency equals 1.843 MHz (this terminal is tied to the BAUDOUT of a UART).
GND 4 — Ground
Infrared receiver data. IR_RXD is an IrDA-SIR-modulated input from an optoelectronics transceiver whose
IR_RXD 6 I input pulses should be 3/16 of the baud rate period.
IR_TXD 7 O Infrared transmitter data. IR_TXD is an IrDA-SIR-modulated output to an optoelectronics transceiver.
Active high reset. RESET initializes an IrDA-SIR-decode/encode state machine (this terminal is tied to a
RESET 5 I UART reset line).
Receiver data. U_RXD is decoded (demodulated) data from IR_RXD according to the IrDA specification (this
U_RXD 3 O terminal is tied to SIN of a UART).
Transmitter data. U_TXD is encoded (modulated) data and output data as IR_TXD (this terminal is tied to
U_TXD 2 I SOUT from a UART).
VCC 8 Supply voltage
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC Supply voltage(2) –0.5 6 V
VIInput voltage at any input –0.5 VCC + 0.5 V
VOOutput voltage –0.5 VCC + 0.5 V
TIR1000 0 °C
TAOperating free-air temperature range TIR1000I –40 85 °C
Case temperature for 10 seconds SO package 260 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage levels are with respect to GND.
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6.2 ESD Ratings
VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22- ±900
C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
LOW VOLTAGE (3-V NOMINAL)
VCC Supply voltage 2.7 3 3.3 V
VIH High-level input voltage 0.7 VCC V
VIL Low-level input voltage 0.2 VCC V
TIR1000 0 70
Operating free-air
TA°C
temperature TIR1000I –40 85
STANDARD VOLTAGE (5-V NOMINAL)
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 0.7 VCC V
VIL Low-level input voltage 0.2 VCC V
TIR1000 0 70
Operating free-air
TA°C
temperature TIR1000I –40 85
6.4 Thermal Information
TIR1000
THERMAL METRIC(1) PS (SO), PW (TSSOP) UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 179.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 63.4 °C/W
RθJB Junction-to-board thermal resistance 108.4 °C/W
ψJT Junction-to-top characterization parameter 7.0 °C/W
ψJB Junction-to-board characterization parameter 106.7 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IOH = – 4 mA VCC = 5 V VCC – 0.8
VOH High-level output voltage V
IOH = – 1.8 mA VCC = 3 V VCC – 0.55
IOL = +4 mA VCC = 5 V 0.5
VOL Low-level output voltage V
IOL = +1.8 mA VCC = 3 V 0.5
IIII Input current VI= 0 to VCC All other pins floating ±3 µA
VCC = 5.25 V TA= 25°C
ICC Supply current All inputs at 0.2 V 16XCLK at 2 MHz 1 mA
No load on outputs
Ci(16XCLK) Clock input capacitance 5 pF
f(16XCLK) Clock frequency 2 MHz
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16 Cycles7 Cycles
External Strobe
16XCLK
IR_RXD
U_RXD
16 Cycles16 Cycles
TIR1000, TIR1000I
www.ti.com
SLLS228G DECEMBER 1995REVISED AUGUST 2015
6.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
trOutput rise time No load 23.8 ns
tfOutput fall time No load 9.2 ns
(1) Typical values are at TA= 25°C.
Figure 1. Recommended Strobing For Decoded Data
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Decoder
Encoder
RESET
IR_RXD
16XCLK
U_TXD
U_RXD
IR_TXD
TIR1000, TIR1000I
SLLS228G DECEMBER 1995REVISED AUGUST 2015
www.ti.com
7 Detailed Description
7.1 Overview
TIR1000 serial infrared (SIR) encoder and decoder is a device (CMOS) that encodes and decodes bit data
according with the IrDA specifications.
For the correct performance of the TIR1000 device, an optoelectronics device and a UART device are
necessary. The TIR1000 device operates as an interface between wireless infrared and UART communication.
7.2 Functional Block Diagram
7.3 Feature Description
The Infrared Data Association (IrDA) defines several protocols for sending and receiving serial infrared data,
including the following rates:
115.2 kbps
0.576 Mbps
1.152 Mbps
4 Mbps
The low rate of 115.2 kbps was specified first and the others must maintain downward compatibility with it. At the
115.2 kbps rate, the protocol implemented in the hardware is fairly simple. It primarily defines a serial infrared
data word to be surrounded by a start bit equal to 0 and a stop bit equal to 1. Individual bits are encoded or
decoded the same whether they are start, data, or stop bits.
The TIR1000 and TIR1000I devices evaluate only single bits and follow only the 115.2-kbps protocol. The
115.2-kbps rate is a maximum rate. When both ends of the transfer are set up to a lower but matching speed,
the protocol (with the TIR1000 and TIR1000I devices) still works.
The clock used to code or sample the data is 16 times the baud rate, or 1.843 MHz maximum. To code a 1, no
pulse is sent or received for 1-bit time period, or 16 clock cycles. To code a 0, one pulse is sent or received
within a 1-bit time period, or 16 clock cycles. The pulse must be at least 1.6 μs wide and 3 clock cycles long at
1.843 MHz. At lower baud rates, the pulse can be 1.6 μs wide or as long as 3 clock cycles.
The transmitter output, IR_TXD, is intended to drive an LED circuit to generate an infrared pulse. The LED
circuits work on positive pulses. A terminal circuit is expected to create the receiver input, IR_RXD. Most (but not
all) PIN circuits have inversion and generate negative pulses from the detected infrared light. Their output is
normally high. The TIR1000 and TIR1000I devices can decode either negative or positive pulses on IR_RXD.
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16XCLK
IR_RXD
U_RXD
16 Cycles16 Cycles 16 Cycles16 Cycles
16XCLK
U_TXD
IR_TXD
16 Cycles16 Cycles 16 Cycles16 Cycles
TIR1000, TIR1000I
www.ti.com
SLLS228G DECEMBER 1995REVISED AUGUST 2015
7.4 Device Functional Modes
7.4.1 IrDA Encoder Function
Serial data from a UART is encoded to transmit data to the optoelectronics. While the serial data input to this
block (U_TXD) is high, the output (IR_TXD) is always low, and the counter used to form a pulse on IR_TXD is
continuously cleared. After U_TXD resets to 0, IR_TXD rises on the falling edge of the seventh 16XCLK. On the
falling edge of the tenth 16XCLK pulse, IR_TXD falls, creating a 3-clock-wide pulse. While U_TXD stays low, a
pulse is transmitted during the seventh to tenth clocks of each 16-clock bit cycle.
Figure 2. IrDA-SIR Encoding Scheme Figure 3. Encoding Scheme
Detailed Timing Diagram Macro View
7.4.2 IrDA Decoder Function
After reset, U_RXD is high and the 4-bit counter is cleared. When a falling edge is detected on IR_RXD, U_RXD
falls on the next rising edge of 16XCLK with sufficient setup time. U_RXD stays low for 16 cycles (16XCLK) and
then returns to high as required by the IrDA specification. As long as no pulses (falling edges) are detected on
IR_RXD, U_RXD remains high.
Figure 4. IrDA-SIR Decoding Scheme Figure 5. Decoding Scheme
Detailed Timing Diagram Macro View
It is possible for jitter or slight frequency differences to cause the next falling edge on IR_RXD to be missed for
one 16XCLK cycle. In that case, a 1-clock-wide pulse appears on U_RXD between consecutive zeroes. It is
important for the UART to strobe U_RXD in the middle of the bit time to avoid latching this 1-clock-wide pulse.
The TL16C550C UART already strobes incoming serial data at the proper time. Otherwise, note that data is
required to be framed by a leading zero and a trailing one. The falling edge of that first zero on U_RXD
synchronizes the read strobe. The strobe occurs on the eighth 16XCLK pulse after the U_RXD falling edge and
once every 16 cycles thereafter until the stop bit occurs.
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*9 TEXAS INSTRUMENTS vvv 99m 2&&V 0’9 929 3 d 9 9 353% dbhfiu 99 9 fit vvvvv‘ 99 99 && && 9 fi 9 9 fir 3% fi» 3' 4' CV. 99 2&t vvvvv‘ 99 99 && && 9 fi 9 9 fir 9v9ww 99999 &&&R& ”vs ‘ at. 2.2. 9 &
16XCLK
IR_RXD
U_RXD
16 Cycles16 Cycles16 Cycles16 Cycles
1 2 3 4 5 6 7 8 10 12 14 16
IR_RXD
16XCLK
U_RXD
1 2 3 4 5 6 7 8 10 12 14 16 1 2 3 4 5 6 7 8 10 12 14 16
IR_RXD
16XCLK
U_RXD
TIR1000, TIR1000I
SLLS228G DECEMBER 1995REVISED AUGUST 2015
www.ti.com
Figure 6. Timing Causing 1-Clock-Wide Pulse Between Consecutive Ones
The TIR1000 and TIR1000I can decode positive pulses on IR_RXD. The timing is different, but the variation is
invisible to the UART. The decoder, which works from the falling edge, now recognizes a zero on the trailing
edge of the pulse rather than on the leading edge. As long as the pulse width is fairly constant, as defined by the
specification, the trailing edges should also be 16 clock cycles apart and data can readily be decoded. The zero
appears on U_RXD after the pulse rather than at the start of it.
Figure 7. Positive IR_RXD Pulse Decode
Detailed View
Figure 8. Positive IR_RXD Pulse Decode
Macro View
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l TEXAS INSTRUMENTS TUECSSUC (UART) T‘R1000‘TIR1UOOI
D7–D0
MEMR or I/OR
or I/ONMEMW
INTR
RESET
A0
A1
A2
CS
L
H
XOUT
XIN
RCLK
BAUDOUT
RI
CTS
DCD
DSR
DTR
RTS
SOUT IR_TXD
IR_RXD
SIN
INTRPT
D7–D0
U_TXD To LED
U_RXD From TERMINAL
16XCLK
RD1
WR1
MR
A0
A1
A2
ADS
WR2
RD2
CS2
CS1
CS0
TL16C550C
(ACE)
TL16C550C (UART) TIR1000, TIR1000I Optoelectronics
1.843 MHz
C
P
U
B
u
s
TIR1000, TIR1000I
www.ti.com
SLLS228G DECEMBER 1995REVISED AUGUST 2015
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
IrDA provides several specifications for a complete set of protocols for wireless infrared communications.
8.2 Typical Application
A simple application of the TIR1000 device is developing a system with an optoelectronics device and a UART
device (TL16C500C). Hence, the TIR1000 device interfaces between the infrared and serial devices.
Figure 9. Typical Application Schematic
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‘% $4 “HF H “HF
Driver
Optional
Driver
External
Clock
Optional
Clock
Output
Oscillator Clock
to Baud Generator
Logic
Oscillator Clock
to Baud Generator
Logic
XIN
XOUT
VCC
Crystal
XIN
RX2 XOUT
C1
RP
C2
VCC
TIR1000, TIR1000I
SLLS228G DECEMBER 1995REVISED AUGUST 2015
www.ti.com
Typical Application (continued)
8.2.1 Design Requirements
Table 1 lists the design requirements for the typical application.
Table 1. Design Requirements
DESIGN PARAMETER EXAMPLE VALUE
Power supply 3 V (low voltage)
1.843-MHz clock source Crystal
Baud rate 115.2 kbps
TRANSMITTER
Peak wavelength 850–900 nm
Intensity in angular range 40–500 mW/Sr
Half angle ±15-30°
Pulse Duration at 115.2 kbps 2.23 µs
RECEIVER
Irradiance in angular range 4–500 mW/cm2
Half angle ±15°
Receiver latency 10 ms
8.2.2 Detailed Design Procedure
The asynchronous communications element (TL16C550C) contains a programmable baud generator that takes a
clock input in the range between DC and 16 MHz and divides it by a divisor in the range between
1 and (216 – 1). The output frequency of the baud generator is sixteen times (16×) the baud rate. The formula for
the divisor is shown in Equation 1.
divisor = XIN frequency input / (desired baud rate × 16) (1)
For example:
divisor = 1.843 MHz / (115.2 kbps × 16) = 0.9999 (2)
Error (divisor) <1%
Figure 10. Typical Clock Circuits (Programmable Baud Generator)
Table 2. Typical Crystal Oscillator Network
CRYSTAL Rp RX2 C1 C2
1.8432 MHz 1 M1.5 k10–30 pF 40–60 pF
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8.2.3 Application Curves
Figure 11. Rise Time of IR_TXD (Data) Figure 12. Fall Time of IR_TXD (Data)
9 Power Supply Recommendations
All power rails require a 10-µF capacitor or 1-µF capacitors for stability and noise immunity. These bulk
capacitors can be placed anywhere on the power rail. The smaller decoupling capacitors must be placed as
close to the power pins of the TIR1000 device as possible with an optimal grouping of two of differing values per
pin.
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Power Plane
VCC
IR_TXD
IR_RXD
RESET
Ground Plane
GND
U_RXD
U_TXD
16XCLK
TIR1000
TL16C550C
BADOUT
SOUT
SIN
W
W
0.57 W´
2w
1w
W
W
TIR1000, TIR1000I
SLLS228G DECEMBER 1995REVISED AUGUST 2015
www.ti.com
10 Layout
10.1 Layout Guidelines
There is no fundamental information about how many layers should be used and how the board stackup should
look. Again, the easiest way the get good results is to use the design from the EVMs of Texas Instruments. The
magazine Elektronik Praxis has published an article with an analysis of different board stackups. These are listed
in Table 3. Generally, the use of microstrip traces needs at least two layers, whereas one of them must be a
GND plane. Better is the use of a four-layer PCB, with a GND and a VCC plane and two signal layers. If the
circuit is complex and signals must be routed as stripline, because of propagation delay and/or characteristic
impedance, a six-layer stackup should be used.
Table 3. Possible Board Stackup on a Four-Layer PCB
MODEL 1 MODEL 2 MODEL 3 MODEL 4
Layer 1 SIG SIG SIG GND
Layer 2 SIG GND GND SIG
Layer 3 VCC VCC SIG VCC
Layer 4 GND SIG VCC SIG
Decoupling Good Good Bad Bad
EMC Bad Bad Bad Bad
Signal integrity Bad Bad Good Bad
Self disturbance Satisfaction Satisfaction Satisfaction High
Avoid right-angle bends in a trace and try to route them at least with two 45° corners. To minimize any
impedance change, the best routing would be a round bend as shown in Figure 13.
Figure 13. Poor and Good Right Angle Bends
10.2 Layout Example
Figure 14. Layout Example
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11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
IrDA is a trademark of Infrared Data Association.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com 13-Aug-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TIR1000IPS ACTIVE SO PS 8 80 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 IR1000I
TIR1000IPSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 IR1000I
TIR1000IPW ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 R1000I
TIR1000IPWG4 ACTIVE TSSOP PW 8 150 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 R1000I
TIR1000IPWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 R1000I
TIR1000PSR ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 IR1000
TIR1000PSRG4 ACTIVE SO PS 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 IR1000
TIR1000PWR ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 IR1000
TIR1000PWRG4 ACTIVE TSSOP PW 8 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 IR1000
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
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PACKAGE OPTION ADDENDUM
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Addendum-Page 2
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
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l TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS 7 “KO '«m» Reel Diameter AD Dimension deswgned to accommodate the componem wwdlh ED Dimension desxgned to accommodate the componenl \engm K0 Dimenslun deswgned to accommodate the componem thickness , w OveraH wwdm loe earner cape i p1 Pitch between successwe cavuy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D D Sprockemules ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pockel Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TIR1000IPSR SO PS 8 2000 330.0 16.4 8.35 6.6 2.5 12.0 16.0 Q1
TIR1000IPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
TIR1000PSR SO PS 8 2000 330.0 16.4 8.35 6.6 2.5 12.0 16.0 Q1
TIR1000PWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 1
l TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TIR1000IPSR SO PS 8 2000 853.0 449.0 35.0
TIR1000IPWR TSSOP PW 8 2000 853.0 449.0 35.0
TIR1000PSR SO PS 8 2000 853.0 449.0 35.0
TIR1000PWR TSSOP PW 8 2000 853.0 449.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 2
l TEXAS INSTRUMENTS T - Tube height| L - Tube length l ,g + w-Tuhe _______________ _ ______________ width 47 — B - Alignment groove width
TUBE
*All dimensions are nominal
Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
TIR1000IPS PS SOP 8 80 530 10.5 4000 4.1
TIR1000IPW PW TSSOP 8 150 530 10.2 3600 3.5
TIR1000IPWG4 PW TSSOP 8 150 530 10.2 3600 3.5
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Jan-2022
Pack Materials-Page 3
MECHANICAL DATA PS (R-PDSO-GB) PLASTIC SMALL-OUTLINE PACKAGE {XI OAS NOM m1 w 5, 0 7,40 0 I 4 H) 5,90 E if 0,05 Seufing P‘une 7 2,00 MAX 4040063/0 03/03 NOTES. A, NI \inear dimensbns are in mimme|ers B Tm's drawing 15 subjac| |o chowge wwlhou| Hofice. C Endy dimens'mns dc nut incmde mnld flush or prnhusian. rm| |u exceed 0.!5 *1? TEXAS INSTRUMENTS www.li.cnm
PC "RipfliCiGfl FL/“wT‘C SM/LL OdTLVE Exarrpre Board LcyoM Sten(eNmL)epeDn)rnge (\ute c) > \ , em? «*1 BE if *E'H'HEF ' Examp‘e Nun Sodarmask Defined Pad ‘ , 7 Exumse Pad Geomeuy (See Noie c) Exampe Nunesmer Mask Oeemrg (See Nate E] AH hnec' drmensruns c'e rn m'hrmers THs druwmq rs s to Change wrtrrou: rretrce Pubhcahon PCe/Ja rs reccwmended «or aHe'nate desrgns \aser cuflmg apemres wrm rrceemrdur ons cm arse rounqu corners wfl arier bener paste re‘euse (hammers mum cuNad U‘ev buurc ussemb‘y srte for stem: desrqn reca'nmerdm'ms. Refer «0 PC 7525 for uther stenc' rscummendchurs Customers snoum cu'vtuct t've'v board ut'mr site {or seder may lu‘evuuces betweev and «Foam srgrrc pads NO’ES Sam?
PW0008A '
www.ti.com
PACKAGE OUTLINE
C
TYP
6.6
6.2
1.2 MAX
6X 0.65
8X 0.30
0.19
2X
1.95
0.15
0.05
(0.15) TYP
0 - 8
0.25
GAGE PLANE
0.75
0.50
A
NOTE 3
3.1
2.9
B
NOTE 4
4.5
4.3
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
18
0.1 C A B
5
4
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
PW0008A
www.ti.com
EXAMPLE BOARD LAYOUT
(5.8)
0.05 MAX
ALL AROUND 0.05 MIN
ALL AROUND
8X (1.5)
8X (0.45)
6X (0.65)
(R )
TYP
0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:10X
1
45
8
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
PW0008A
www.ti.com
EXAMPLE STENCIL DESIGN
(5.8)
6X (0.65)
8X (0.45)
8X (1.5)
(R ) TYP0.05
4221848/A 02/2015
TSSOP - 1.2 mm max heightPW0008A
SMALL OUTLINE PACKAGE
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SYMM
SYMM
1
45
8
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
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