Microchip Technology 的 SAM D09 Summary 规格书

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Atmel-42414GS-SAM-D09-Summary_09/2016
SMART
Description
The Atmel® | SMART™ SAM D09 is a series of low-power microcontrollers using the 32-bit
ARM®Cortex®-M0+ processor, and ranging from 14- to 24-pins with up to16KB Flash and 4KB of
SRAM. The SAM D09 devices operate at a maximum frequency of 48MHz and reach
2.46 Coremark/MHz. They are designed for simple and intuitive migration with identical
peripheral modules, hex compatible code, identical linear address map and pin compatible
migration paths between all devices in the product series. All devices include intelligent and
flexible peripherals, Atmel Event System for inter-peripheral signaling, and support for capacitive
touch button, slider and wheel user interfaces. The SAM D09 series is compatible to the other
product series in the SAM D family, enabling easy migration to larger device with added features.
The Atmel SAM D09 devices provide the following features: In-system programmable Flash, six-
channel direct memory access (DMA) controller, 6 channel Event System, programmable
interrupt controller, up to 22 programmable I/O pins, 32-bit real-time clock and calendar, two 16-
bit Timer/Counters (TC), where each TC can be configured to perform frequency and waveform
generation, accurate program execution timing or input capture with time and frequency
measurement of digital signals. The TCs can operate in 8- or 16-bit mode, selected TCs can be
cascaded to form a 32-bit TC, and one timer/counter has extended functions optimized for motor,
lighting and other control applications. The series provide two Serial Communication Modules
(SERCOM) that each can be configured to act as an USART, UART, SPI, I2C, SMBus, PMBus
and LIN slave; up to 10-channel 350ksps 12-bit ADC with programmable gain and optional
oversampling and decimation supporting up to 16-bit resolution, programmable Watchdog Timer,
brown-out detector and power-on reset and two-pin Serial Wire Debug (SWD) program and
debug interface.
All devices have accurate and low-power external and internal oscillators. All oscillators can be
used as a source for the system clock. Different clock domains can be independently configured
to run at different frequencies, enabling power saving by running each peripheral at its optimal
clock frequency, and thus maintaining a high CPU frequency while reducing power consumption.
The SAM D09 devices have two software-selectable sleep modes, idle and standby. In idle mode
the CPU is stopped while all other functions can be kept running. In standby all clocks and
functions are stopped expect those selected to continue running. The device supports
SleepWalking. This feature allows the peripheral to wake up from sleep based on predefined
conditions, and thus allows the CPU to wake up only when needed, e.g. when a threshold is
crossed or a result is ready. The Event System supports synchronous and asynchronous events,
allowing peripherals to receive, react to and send events even in standby mode.
The Flash program memory can be reprogrammed in-system through the SWD interface. The
same interface can be used for non-intrusive on-chip debug and trace of application code. A boot
loader running in the device can use any communication interface to download and upgrade the
application program in the Flash memory.
The Atmel SAM D09 devices are supported with a full suite of program and system development
tools, including C compilers, macro assemblers, program debugger/simulators, programmers and
evaluation kits.
Atmel SAM D09
SMART ARM-Based Microcontroller
DATASHEET SUMMARY
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Atmel-42414GS-SAM-D09-Summary_09/2016
Features
zProcessor
zARM Cortex-M0+ CPU running at up to 48MHz
zSingle-cycle hardware multiplier
zMicro Trace Buffer
zMemories
z8/16KB in-system self-programmable Flash
z4KB SRAM Memory
zSystem
zPower-on reset (POR) and brown-out detection (BOD)
zInternal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M) and 48MHz to 96MHz Fractional
Digital Phase Locked Loop (FDPLL96M)
zExternal Interrupt Controller (EIC)
z8 external interrupts
zOne non-maskable interrupt
zTwo-pin Serial Wire Debug (SWD) programming, test and debugging interface
zLow Power
zIdle and standby sleep modes
zSleepWalking peripherals
zPeripherals
z6-channel Direct Memory Access Controller (DMAC)
z6-channel Event System
zTwo 16-bit Timer/Counters (TC), configurable as either:
zOne 16-bit TC with compare/capture channels
zOne 8-bit TC with compare/capture channels
zOne 32-bit TC with compare/capture channels, by using two TCs
z32-bit Real Time Counter (RTC) with clock/calendar function
zWatchdog Timer (WDT)
zCRC-32 generator
zTwo Serial Communication Interfaces (SERCOM), each configurable to operate as either:
zUSART with full-duplex and single-wire half-duplex configuration
zI2C Bus
zSMBUS/PMBUS
zSPI
zLIN slave
z12-bit, 350ksps Analog-to-Digital Converter (ADC) with up to 10 channels
zDifferential and single-ended input
z1/2x to 16x programmable gain stage
zAutomatic offset and gain error compensation
zOversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
zI/O
zUp to 22 programmable I/O pins
zPackages
z24-pin QFN
z14-pin SOIC
zOperating Voltage
z2.4V – 3.63V
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1. Configuration Summary
Note: 1. The signals for TC2 are not routed out on the 14-pin package.
Table 1-1. Configuration Summary
SAM D09D – 24-pin QFN SAM D09C – 14-pin SOIC
Pins 24 14
General Purpose I/O-pins (GPIOs) 22 12
Flash 16KB 8KB
SRAM 4KB 4KB
Timer Counter (TC) 2 2(1)
Waveform output channels for TC 2 2
DMA channels 6 6
Serial Communication Interface (SERCOM) 2 2
Analog-to-Digital Converter (ADC) channels 10 5
Real-Time Counter (RTC) Yes Yes
RTC alarms 1 1
RTC compare values 1 32-bit value or
2 16-bit values
1 32-bit value or
2 16-bit values
External Interrupt lines 8 8
Maximum CPU frequency 48MHz 48MHz
Packages QFN SOIC
Oscillators
32.768kHz crystal oscillator (XOSC32K)
0.4-32MHz crystal oscillator (XOSC)
32.768kHzinternal oscillator (OSC32K)
32kHz ultra-low-power internal oscillator (OSCULP32K)
8MHz high-accuracy internal oscillator (OSC8M)
48MHz Digital Frequency Locked Loop (DFLL48M)
96MHz Fractional Digital Phased Locked Loop (FDPLL96M)
Event System channels 6 6
SW Debug Interface Yes Yes
Watchdog Timer (WDT) Yes Yes
W AAAAA
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2. Ordering Information
2.1 SAM D09C – 14-pin SOIC
2.2 SAM D09D – 24-pin QFN
2.3 Device Identification
The DSU - Device Service Unit peripheral provides the Device Selection bits in the Device Identification register
(DID.DEVSEL) in order to identify the device by software. The device variants have a reset value of DID=0x1001drxx,
with the LSB identifying the die number ('d'), the die revision ('r') and the device selection ('xx').
SAMD = General Purpose Microcontroller
09 = Cortex M0+ DMA
C = 14 pins
D = 24 pins
No character = Tray (Default)
T = Tape and Reel
U = -40 - 85OC Matte Sn Plating
M = QFN
SS = SOIC
SAMD 09 C 13 A M UT
A = Default Variant
14 = 16KB
13 = 8KB
-
Product Family
Product Series
Pin Count
Flash Memory Density
Device Variant
Package Type
Package Grade
Package Carrier
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD09C13A-SSUT 8K 4K SOIC14 Tape & Reel
Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD09D14A-MUT 16K 4K QFN24 Tape & Reel
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Note: The device variant (last letter of the ordering number) is independent of the die revision (DSU.DID.REVISION): The device variant denotes functional
differences, whereas the die revision marks evolution of the die. The device variant denotes functional differences, whereas the die revision marks
evolution of the die
Table 2-1. Device Identification Values
Device Variant DID.DEVSEL Device ID (DID)
SAMD09D14AM 0x00 0x10040r00
Reserved 0x01 - 0x06
SAMD09C13A 0x07 0x10040r07
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Atmel-42414GS-SAM-D09-Summary_09/2016
3. Block Diagram
2. Some products have different number of SERCOM instances and ADC signals.
6 x SERCOM
8 x Timer Counter
REAL TIME
COUNTER
AHB-APB
BRIDGE C
M
M
HIGH SPEED
BUS MATRIX
PORT
PORT
WATCHDOG
TIMER
SERIAL
WIRE
SWDIO
S
CORTEX-M0+
PROCESSOR
Fmax 48 MHz
SWCLK
DEVICE
SERVICE
UNIT
AHB-APB
BRIDGE A
10-CHANNEL
12-bit ADC 350KSPS
AIN[9..0]
VREFA
S
SRAM
CONTROLLER
4 KB
RAM
M
RESET
CONTROLLER
SLEEP
CONTROLLER
CLOCK
CONTROLLER
POWER MANAGER
RESETN
2 x TIMER / COUNTER
EVENT SYSTEM
S
2x SERCOM
SYSTEM CONTROLLER
XOUT
XIN
XOUT32
XIN32
OSCULP32K
OSC32K
OSC8M
DFLL48M
BOD33
XOSC32K
XOSC
VREF
PERIPHERAL
ACCESS CONTROLLER
AHB-APB
BRIDGE B
EXTERNAL INTERRUPT
CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
PERIPHERAL
ACCESS CONTROLLER
EXTINT[7..0]
NMI
GCLK_IO[5..0]
S
PAD0
WO1
PAD1
PAD2
PAD3
WO0
VREFB
8/16 KB
NVM
NVM
CONTROLLER
Cache
M
DMA
IOBUS
FDPLL96M
DMA
DMA
DMA
MICRO
TRACE BUFFER
S
GENERIC CLOCK
CONTROLLER
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4. Pinout
4.1 SAM D09C 14-pin SOIC
1
2PA02
3
PA14 4
PA04
5
PA05
69
10
PA08
11
PA09 12
PA15
PA28/
14
13
PA30
PA24
RST
PA25
GND
VDD
IO/IN/ANA
PA31
8
7
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
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4.2 SAM D09D 24-pin QFN
1
2
PA02
3
PA03
4
PA04
5
PA05
6
PA06
PA07
9
10
PA08
11
PA09
12
PA10
PA11
PA14
PA15
PA27
24
PA28/
23
PA23
17
PA22
16
15
14 PA17
13 PA16
PA24
RST
20
PA25
22
GND
PA30
PA31
7
8
21
19
18
VDD
IO/IN/ANA
DIGITAL PIN
ANALOG PIN
OSCILLATOR
GROUND
INPUT SUPPLY
RESET/GPIO PIN
0x1 FFFFFFF 0x20001000 AtmeL
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Atmel | SMART SAM D09 [DATASHEET SUMMARY]
Atmel-42414GS-SAM-D09-Summary_09/2016
5. Product Mapping
Figure 5-1. Atmel SAM D09 Product Mapping
Code
SRAM
Undefined
Peripherals
Reserved
Undefined
Reserved
Global Memory Space
0x00000000
0x20000000
0x20001000
0x40000000
0x43000000
0x60000000
0x60000200
0xFFFFFFFF
Internal SRAM
SRAM
AHB-APB
Bridge A
AHB-APB
Bridge B
AHB-APB
Bridge C
AHB-APB
Internal Flash
Reserved
Code
0x00000000
0x00004000
0x1FFFFFFF
0x20000000
0x20001000
0x40000000
0x41000000
0x42000000
0x42FFFFFF
Reserved
PAC0
PM
SYSCTRL
GCLK
WDT
RTC
EIC
AHB-APB Bridge A
0x40000000
0x40000400
0x40000800
0x40000C00
0x40001000
0x40001400
0x40001800
0x40FFFFFF
0x40001C00
AHB-APB Bridge B
Reserved
PAC1
DSU
NVMCTRL
PORT
0x41000000
0x41002000
0x41004000
0x41004400
0x41FFFFFF
0x41004700
TC2
PAC2
EVSYS
SERCOM0
SERCOM1
Reserved
Reserved
TC1
AHB-APB Bridge C
ADC
Reserved
Reserved
Reserved
0x42000000
0x42000400
0x42000800
0x42000C00
0x42001000
0x42001400
0x42001800
0x42002000
0x42001C00
0x42003000
Reserved
0x40FFFFFF
0x42002400
0x42002800
0x42002C00
DMAC
MTB
0x41004800
0x41005000
0x41006000
Reserved
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6. Processor And Architecture
6.1 Cortex M0+ Processor
The Atmel SAM D09 implements the ARM® Cortex™-M0+ processor, which is based on the ARMv6 Architecture and
Thumb®-2 ISA. The Cortex M0+ is 100% instruction set compatible with its predecessor, the Cortex-M0 processor,
and upward compatible to Cortex-M3 and M4 processors.
For more information refer to www.arm.com.
6.1.1 Cortex M0+ Configuration
Note: 1. All software run in privileged mode only
The ARM Cortex-M0+ core has two bus interfaces:
zSingle 32-bit AMBA®-3 AHB-Lite™ system interface that provides connections to peripherals and all
system memory, including flash and RAM
zSingle 32-bit I/O port bus interfacing to the PORT with one-cycle loads and stores
Features Configuration option Atmel SAM D09 configuration
Interrupts External interrupts 0-32 32
Data endianness Little-endian or big-endian Little-endian
SysTick timer Present or absent Present
Number of watchpoint comparators 0, 1, 2 2
Number of breakpoint comparators 0, 1, 2, 3, 4 4
Halting debug support Present or absent Present
Multiplier Fast or small Fast (single cycle)
Single-cycle I/O port Present or absent Present
Wake-up interrupt controller Supported or not supported Not supported
Vector Table Offset Register Present or absent Present
Unprivileged/Privileged support Present or absent Absent(1)
Memory Protection Unit Not present or 8-region Not present
Reset all registers Present or absent Absent
Instruction fetch width 16-bit only or mostly 32-bit 32-bit
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7. Packaging Information
7.1 Thermal Considerations
7.1.1 Thermal Resistance Data
Table 6-1 on page 13 summarizes the thermal resistance data depending on the package.
Table 7-1. Thermal Resistance Data
7.1.2 Junction Temperature
The average chip-junction temperature, TJ, in °C can be obtained from the following:
Equation 1
Equation 2
where:
zθJA = package thermal resistance, Junction-to-ambient (°C/W), provided in Table 6-1 on page 13.
zθJC = package thermal resistance, Junction-to-case thermal resistance (°C/W), provided in Table 6-1 on page
13.
zθHEATSINK = cooling device thermal resistance (°C/W), provided in the device datasheet.
zPD = device power consumption (W).
zTA = ambient temperature (°C).
From the Equation 1, the user can derive the estimated lifetime of the chip and decide if a cooling device is necessary
or not. If a cooling device is to be fitted on the chip, the second equation should be used to compute the resulting
average chip-junction temperature TJ in °C.
Package Type θJA θJC Units
24-pin QFN 61.7 25.4 °C/W
14-pin SOIC 58.5 26.3 °C/W
TJTAPDθJA
×()+=
TJTAPDθHEATSINK θJC
+()×()+=
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Atmel | SMART SAM D09 [DATASHEET SUMMARY]
Atmel-42414GS-SAM-D09-Summary_09/2016
7.2 Package Drawings
7.2.1 24-pin QFN
Table 7-2. Device and Package Maximum Weight
Table 7-3. Package Characteristics
Table 7-4. Package Reference
44 mg
Moisture Sensitivity Level MSL3
JEDEC Drawing Reference MO-220
JESD97 Classification E3
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Atmel | SMART SAM D09 [DATASHEET SUMMARY]
Atmel-42414GS-SAM-D09-Summary_09/2016
Table 7-5.
7.2.2 14-pin SOIC
Table 7-6. Device and Package Maximum Weight
Table 7-7. Package Characteristics
Table 7-8. Package Reference
230 mg
Moisture Sensitivity Level MSL3
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JEDEC Drawing Reference MS-012
JESD97 Classification E3
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7.3 Soldering Profile
The following table gives the recommended soldering profile from J-STD-20.
A maximum of three reflow passes is allowed per component.
___REV___383142
Profile Feature Green Package
Average Ramp-up Rate (217°C to peak) 3°C/s max
Preheat Temperature 175°C +/-25°C 150-200°C
Time Maintained Above 217°C 60-150s
Time within 5°C of Actual Peak Temperature 30s
Peak Temperature Range 260°C
Ramp-down Rate 6°C/s max
Time 25°C to Peak Temperature 8 minutes max
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Table of Contents
Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1. Configuration Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 SAM D09C – 14-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 SAM D09D – 24-pin QFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Device Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 SAM D09C 14-pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 SAM D09D 24-pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5. Product Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
6. Processor And Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1 Cortex M0+ Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7. Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.1 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.2 Package Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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