Analog Devices Inc. 的 DC1417A Quick Start Guide 规格书

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LT6230, LT6230
-
10, LTC6240
1
DESCRIPTION
Demonstration Circuit 1417 is a Low Noise Tran-
sipedance Amplifier. It utilizes the low voltage noise
LT6230 and LT6230-10 opamps, and the low current
noise LTC6240 opamp, along w ith the discrete NXP JFET
BF862, allow ing the user to take advantage of each com-
ponent’s particular optimization. These components are
arranged w ith jumpers allow ing various composite con-
figurations. A socketed photodiode, OSRAM SFH213, is
also provided.
Design files for this circuit board are available. Call the
LTC factory.
L
, LT, are registered trademarks of Linear Technology Corporation. Other product names
may be trademarks of the companies that manufacture the products.
PERF ORM ANCE SU M M ARY
Specifications are typical at T
A
= 25°C, Vs = +/-5V
SYM BOL PARAM ETER CONDITIONS, COM M ENTS TYP UNITS
Supply Voltage Nominal
+/-5V V
Supply Voltage Range Source Follow er
+/-2V to +/-6V V
V
S
Supply Voltage JFET in Gain
+/-3V to +/-6V V
A
Z
TIA Gain R1 + R2 1M
Ω
V
OS
Input Offset Voltage LTC6240 (Vos + Ibias*10M )
70 µV
dV
OS
/dT
Input Offset Voltage Drift LTC6240 (dVos/dT +dIbias/dT *10M )
2 µV/C
I
BIAS
Input Bias Current LTC6240 + BF862
3.5 pA
en Input Voltage Noise Density f=100kHz, JFET in gain configuration 1 nV/
√
Hz
en Input Voltage Noise Density f=100kHz, Source Follow er configuration 1.5 nV/
√
Hz
Cin Input Capacitance f=10kHz, Source Follow er configuration 2 pF
Cin Input Capacitance f=10kHz, JFET in gain configuration 8 pF
GBW
Gain Bandw idth Product JP8 at 1,2 (LT6230)
70 M Hz
GBW
Gain Bandw idth Product JP8 at 2,3 (LT6230-10)
190 M Hz
Source Follow er, JP8 at 1,2 (LT6230)
2.6 M Hz BW
-3dB Bandw idth, SFH213 and 1M
Ω
Gain
Source Follow er, JP8 at 2,3 (LT6230-10)
(add24pF in parallel w ith photodiode)
3.3 M Hz
V
OUT
Output Voltage Swing Cathode input, Integrator in 0 to 4.9V V
V
OUT
Output Voltage Swing Cathode input, Integrator out -0.4 to 4.9 V
V
OUT
Output Voltage Swing Anode input, Integrator in 0 to -4.9V V
V
OUT
Output Voltage Swing Anode input, Integrator out -0.4 to -4.9V V
I
CC
Supply Current Vs = +/-5V 12 mA
DEMO
C IR C U IT
1 4 1 7
Q U IC K S TA R T G U IDE
L T 6 2 3 0 , L T 6 2 3 0 -1 0 , L T C 6 2 4 0
L o w N o ise + / -5 V Tra n sim p e d a n c e A m p lifie r
LT6230, LT6230—10, LT06240 2 L7LJIJN§QB
LT6230, LT6230
-
10, LTC6240
2
OPERATING PRINCIPL ES
Composite amplifiers using single JFET inputs can be
classified into tw o groups: common drain (or “source
follow er”) and common source (or “JFET in gain”). The
standard jumper configuration of this board, as shipped
and as indicated on the silkscreen, has the JFET as a
source follow er.
Another classification is DC accuracy. The LTC6240 has
been provided on board as an integrator to provide DC
accuracy, overiding the high 400mV or so Vgs of the
JFET. The standard jumper configuration is “Integrator
In”, so the TIA w ill be DC accurate to w ithin the Vos of
the LTC6240 (250uV max, plus 10uV due to Ibias). W ith
the integrator removed from the circuit, the DC error
rises to 400mV or so.
The feedback resistor, w hich sets the TIA gain, is formed
by R1 and R2 in series and is set to 1M
Ω
. So the output
responds at 1V per micropamp of photocurrent. R 1 and
R2 can be changed to achieve other transimpedance
gains.
Q U ICK START PROCEDU RE
Demonstration circuit 1417 is shipped w ith the jumpers
set for Source Follow er operation w ith the Integrator In.
If the jumpers have been changed, restore them to the
positions show n in the schematic. Refer to Figure 1 for
proper measurement equipment setup and follow the
procedure below :
1.
W ith pow er off, connect the +5V, -5V, and Com leads
from the pow er supply to the V+, V-, and Gnd termi-
nals of the demo circuit, as show n in Figure 1.
2.
W ith pow er off, connect the V
OUT
of the demo circuit
to an oscilloscope or DM M . You can use either the
gold SM A connector or the turrets provided on board,
or both. Set a high range such as 2V/DIV on the oscil-
loscope, or Vdc on the DM M .
3.
Turn on the pow er supply.
4.
You should now be able to w ave your hand over the
clear Photodiode provided on the board (upper left of
Figure 1) and see the effect in both DC signal and
noise. W ith the photodiode in darkness, or removed
from its socket, the output should sit near ground.
5.
You can now connect an optical source to excite the
photodiode in a more controlled manner. The easiest
w ay is to drive an LED directly from a function genera-
tor, w ith the function generator’s internal 50 Ohm
source impedance as a current limiter. Any standard
color or IR LED can be used, as the Photodiode pro-
vided has a w ide sensitivity. Be careful not to over-
drive sensitive devices such as small lasers.
6.
You can now decide w hether to play w ith other con-
figurations (LT6230-10, or JFET in gain, Integrator
Out, etc), or to replace the provided Photodiode w ith
the one you intend to use.
mwa‘ LT6230, LT6230-10, LTC624O maecwm :7 ow wrss wammoas Y-A (WWI 19"” m m-uzm o DIODE vow m ‘ Q Output can It be taken at turrets or ' SMA Pol! POWER SUPPLV L7H11N§GB
LT6230, LT6230
-
10, LTC6240
3
Figure 1.
Proper Supply Connections. Board is show n configured for Source Follow er w ith Integrator In. All jum pers (except JP7) have
have the shunt in position “1”. (JP7 is open.) To replace the LT6230 w ith the faster LT6230-10, m ove JP8 dow n.
Table 1: Jum per settings for various configurations. Refer to Figures 2 and 3 for qualitative descriptions of the configurations, and to Figure 4 for the
com plete schem atic.
JUM PER TYPE CIRCUIT
SOU RCE FOLLOW ER
INTEGRATOR IN
SOU RCE FOLLOW ER
INTEGRATOR OUT
JFET IN GAIN
INTGRTR IN
JFET IN GAIN
INTGRTR OUT
JP1
1x3 JFET drain 1,2 1,2
2,3
2,3
JP2
2x3 JFET source 1,2 1,2
5,6
3,4
JP3
1x3 LT1222 -input 1,2 1,2
2,3
2,3
JP4
1x3 photodiode bias 1,2 1,2
1,2
1,2
JP5
1x3 Integrator output 1,2 out
2,3
out
JP6 1x3 Integrator Input 1,2 2,3
1,2
2,3
JP7 1x2 LT1222 +input, Gnd out in out
out
JP8 1x3 LT6230 vs LT6230-10 1,2 or 2,3 1,2 or 2,3 1,2 (Note 1)
1,2 (Note 1)
Note 1: W ith standard 1M TIA gain and small photodiode, JFET in Gain is not compatible w ith LT6230-10, as it oscillates.
‘LT6230, LT6230—10, LT06240 +5V R1 R1 I 1Meg +5|V 1Meg ‘N. Vnul -5V ' Source Follower JFET In Galn \ R LTC524D Source Follower wlth lnregrator JFET In Galn wlth Integrator 4 L7LJEEAD
LT6230, LT6230
-
10, LTC6240
4
Figure 2.
The tw o basic types of JFET configuration. The left show s the JFET as a source follow er, sim ply buffering the feedback resistor
to the opam p’s inverting input. The right show s the JFET in gain, w ith source grounded. Because the JFET inverts, the feedback is now
applied to the opam p’s non-inverting input. In both cases, the effective input offset voltage is one JFET Vgs (about -400m V). The source
follow er configuration is the sim plest and m ost versatile, but the JFET in G ain configuration offers the highest achievable gain-bandw idth
product and the low est voltage noise. O utput noise at low and m edium frequencies (10kH z to 100kH z) is 130nV/rtH z, dom inated entirely
by the feedback resistor.
Figure 3.
The tw o basic types of JFET configuration again, but show n w ith LTC6240 integrators w hich zero out the overall input offset volt-
age. O n the left, the JFET Vgs is forced to the LT6230 non-inverting input. On the right, the integrator puts the JFET Vgs at the source di-
rectly. In both cases, the 10M sensing resistor R11 injects 40fA/
√
√√
√
Hz of current noise, w hich is discernible but reltively sm all com pared to
the 130fA/
√
√√
√
Hz of the 1M feedback resistor. The output noise at low to m edium frequencies is about 136nV/
√
√√
√
Hz.
LT6230, LT6230-10, LT06240 u m u 1.. m m m m :n LgK ‘ mm: . :: mm m. “—4913 :3 Hams m m . m a} m m m L7H£1§QB
LT6230, LT6230
-
10, LTC6240
5