STMicroelectronics 的 STSPIN220 规格书

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KyIW, vrqrpu : x a x m (mum)

Features

• Operating voltage: from 1.8 to 10 V

• Maximum output current: 1.3 Arms

• RDS(ON) HS + LS = 0.4 Ω typ.

• Microstepping up to 1/256th of a step

• Current control with programmable off-time

• Full protection set

– Non-dissipative overcurrent protection

– Short-circuit protection

– Thermal shutdown

• Energy saving and long battery life with standby consumption less than 80 nA

Applications

Battery-powered stepper motor applications such as:

• Pop-up camera control for smartphones

• Point of sale (POS) devices

• Portable printers

• PC peripherals and accessories

• Robotics

• Toys

• Reflex cameras

Description

The STSPIN220 is a stepper motor driver which integrates, in a small VFQFPN 3 x 3

x 1.0 mm package, both control logic and a low RDS (on) power stage.

The integrated controller implements PWM current control with fixed OFF time and a

microstepping resolution up to 1/256th of a step.

The device is designed to operate in battery-powered scenarios and can be forced

into a zero-consumption state, allowing a significant increase in battery life.

The device offers a complete set of protection features including overcurrent,

overtemperature and short-circuit protection.

Product status link

STSPIN220

Product summary

Order code STSPIN220

Package VFQFPN 3x3x1.0

16L

Packing Tape & reel

Low voltage stepper motor driver

STSPIN220

Datasheet

DS11633 - Rev 4 - March 2019

For further information contact your local STMicroelectronics sales office.

www.st.com

.IH S‘epper m0|or

1Block diagram

Figure 2. Block diagram

Stepper

motor

VBAT

DAC

REF

STBY\RESET

Vrelease +

Control logic

Oscillator

OVT

GND

EN\FAULT

STCK\MODE3

DIR\MODE4

MODE1

TOFF

OUTA2

OUTA1

SENSEA

OC\SC

OUTB2

OUTB1

SENSEB

MODE2

AM040026

OC\SC

STSPIN220

Block diagram

DS11633 - Rev 4 page 2/27

2Electrical data

2.1 Absolute maximum ratings

Table 1. Absolute maximum ratings

Symbol Parameter Test condition Value Unit

VSSupply voltage -0.3 to 11 V

VIN Logic input voltage -0.3 to 5.5 V

VOUT - VSENSE Output-to-sense voltage drop Up to 12 V

VS - VOUT Supply-to-output voltage drop Up to 12 V

VSENSE Sense pin voltage -1 to 1 V

VREF Reference voltage input -0.3 to 1 V

IOUT,RMS Continuous power stage output current (each bridge) 1.3 Arms

Tj,OP Operative junction temperature -40 to 150 °C

Tj,STG Storage junction temperature -55 to 150 °C

2.2 Recommended operating conditions

Table 2. Recommended operating conditions

Symbol Parameter Test condition Min Typ Max Unit

VSSupply voltage 1.8 10 V

VIN Logic input voltage 0 5 V

VREF Reference voltage input 0.1 0.5 V

tINw Logic inputs positive/negative pulse width 300 ns

2.3 Thermal data

Table 3. Thermal data

Symbol Parameter Conditions Value Unit

Rth (JA) Junction to ambient thermal

resistance Natural convection, according to JESD51-2a (1) 57.1 °C/W

RthJCtop Junction to case thermal resistance

(top side) Simulation with cold plate on package top 67.3 °C/W

RthJCbot Junction to case thermal resistance

(bottom side) Simulation with cold plate on exposed pad 9.1 °C/W

RthJB Junction to board thermal resistance According to JESD51-8(1) 23.3 °C/W

ψJT Junction to top characterization According to JESD51-2a(1) 3.3 °C/W

ψJB Junction to board characterization According to JESD51-2a(1) 22.6 °C/W

1. Simulated on a 21.2x21.2 mm board, 2s2p 1 Oz copper and four 300 µm vias below exposed pad.

STSPIN220

DS11633 - Rev 4 page 3/27

2.4 ESD protection

Table 4. ESD protection ratings

Symbol Parameter Test condition Class Value Unit

HBM Human body model Conforming to ANSI/ESDA/JEDEC

JS-001-2014 H2 2 kV

CDM Charge device model Conforming to ANSI/ESDA/JEDEC

JS-002-2014 C2a 500 V

STSPIN220

ESD protection

DS11633 - Rev 4 page 4/27

3Electrical characteristics

Test conditions: VS = 5 V, Tj = 25 °C unless otherwise specified.

Table 5. Electrical characteristics

Symbol Parameter Test condition Min Typ Max Unit

Supply

VSth (ON) VS turn-on voltage VS rising from 0 V 1.45 1.65 1.79 V

VSth

(OFF)

VS turn-off voltage VS falling from 5 V 1.3 1.45 1.65 V

VSth

(HYS)

VS hysteresis voltage 180 mV

ISVS supply current

No commutations

EN = ‘0’

ROFF = 160 kΩ

960 1300 μA

No commutations

EN = ‘1’

ROFF = 160 kΩ

1500 1950 μA

IS,STBY VS standby current STBY = 0 V 10 80 nA

VSTBYL Standby low logic level input

voltage 0.9 V

VSTBYH Standby high logic level input

voltage 1.48 V

Power stage

RDS (ON)

HS+LS

Total ON resistance HS + LS

VS = 10 V,

IOUT = 1.3 A 0.4 0.65

Ω

VS = 10 V,

IOUT = 1.3 A,

Tj = 125 °C (1)

0.53 0.87

VS = 3 V,

IOUT = 0.4 A 0.53 0.8

IDSS Leakage current

OUTx = VS1

µA

OUTx = GND - 1

VDF Freewheeling diode forward

voltage ID = 1.3 A 0.9 V

trise Rise time

VS = 10 V;

unloaded outputs

10 ns

tfall Fall time

VS = 10 V;

unloaded outputs

10 ns

tDT Dead time 50 ns

Current control

STSPIN220

Electrical characteristics

DS11633 - Rev 4 page 5/27

Symbol Parameter Test condition Min Typ Max Unit

VSNS,OF

FSET

Sensing offset

VREF = 0.5 V;

Internal reference 20% VREF

-15 +15 mV

tOFF Total OFF time

ROFF = 10 kΩ 9 µs

ROFF = 160 kΩ 125 µs

ΔfOSC

Internal oscillator precision

(fOSC/fOSC,ID)ROFF = 20 kΩ -20% +20%

tOFF,jitter Total OFF time jittering ROFF = 10 kΩ 2%

tOFF,SLO

Slow decay time 5/8 ×

tOFF µs

tOFF,FAS

Fast decay time 3/8 ×

tOFF µs

Logic IOs

VIH High logic level input voltage 1.6 V

VIL Low logic level input voltage 0.6 V

VRELEAS

FAULT open drain release

voltage 0.4 V

VOL EN Low logic level output

voltage IEN = 4 mA 0.4 V

RSTBY STBY pull-down resistance 36 kΩ

IPDEN EN pull-down current 10.5 µA

tENd EN input propagation delay From EN falling edge to OUT high

impedance 55 ns

tMODEho MODEx input hold time From STBY edge, see Figure 6 100 µs

tMODEsu MODEx input setup time From STBY edge, see Figure 6 1 µs

tDIRh DIR input hold time From STCK rising edge, see Figure 5 100 ns

tDIRsu DIR input setup time From STCK rising edge, see Figure 5 100 ns

tSTCKH STCK high time See Figure 5 100 ns

tSTCKL STCK low time See Figure 5 100 ns

fSTCK STCK inputs frequency See Figure 5 1 MHz

Protections

TjSD Thermal shutdown threshold 160 °C

TjSD,Hyst Thermal shutdown hysteresis 40 °C

IOC Overcurrent threshold See Figure 15. Power stage resistance

versus temperature 2 A

1. Based on characterization data on a limited number of samples, not tested during production.

STSPIN220

Electrical characteristics

DS11633 - Rev 4 page 6/27

4Pin description

Figure 3. Pin connection (top view)

DIR\MODE4

STCK\MODE3

OUTA1

SENSEA

TOFF

REF

OUTB1

SENSEB

5 6 87

OUTA2 VS OUTB2GND

EPAD

15 1314

MODE1 MODE2 EN\FAULT

STBY\

RESET

Note: The exposed pad must be connected to ground.

Table 6. Pin description

N. Name Type Function

1 DIR\MODE4 Logic input Direction input, Step mode selection input 4.

2 STCK\MODE3 Logic input Step clock input, Step mode selection input 3.

3 OUTA1 Power output Power bridge output side A1.

4 SENSEA Power output Sense output of the bridge A.

5 OUTA2 Power output Power bridge output side A2.

6 VS Supply Device supply voltage.

7, EPAD GND Ground Device ground.

8 OUTB2 Power output Power bridge output side B2.

9 SENSEB Power output Sense output of the bridge B.

10 OUTB1 Power output Power bridge output side B1.

11 REF Analog input Reference voltage for the PWM current control circuitry.

12 TOFF Analog input Internal oscillator frequency adjustment.

13 EN\FAULT Logic input\Open drain

output

This is the power stage enable (when low, the power stage is turned off)

and is forced low through the integrated open-drain MOSFET when a

failure occurs.

14 STBY\RESET Logic input When forced low, the device is forced into low consumption mode.

15 MODE2 Logic input Step mode selection input 2.

16 MODE1 Logic input Step mode selection input 1.

STSPIN220

Pin description

DS11633 - Rev 4 page 7/27

5Typical application

Table 7. Typical application values

Name Value

CS2.2 µF / 16V

CSPOL 22 µF / 16V

RSNSA, RSNSB 330 mΩ / 1W

CEN 10 nF / 6.3V

REN 18 kΩ

CSTBY 1 nF / 6.3V

RSTBY 18 kΩ

COFF 22 nF

RCOFF 1 kΩ

ROFF 47 kΩ (tOFF ≅ 37 µs)

Figure 4. Typical application schematic

STSPIN220

STBY

EN\FAULT

STCK\MODE3

DIR\MODE4

MODE1

PWM

MODE2

REF

TOFF

GND

OUTA1

OUTA2

OUTB1

SENSEA

SENSEB

OUTB2

Stepper

motor

CSPOL

CSTBY

CEN

SNSA

STBY

CRCOFF

RCOFF

SNSB

OFF

STSPIN220

Typical application

DS11633 - Rev 4 page 8/27

6Functional description

The STSPIN220 is a stepper motor driver integrating a microstepping sequencer (up to 1/256th of a step), two

PWM current controllers and a power stage composed of two fully-protected full-bridges.

6.1 Standby and power-up

The device provides a low consumption mode which is set forcing the STBY\RESET input below the VSTBYL

threshold.

When the device is in standby status, the power stage is disabled (outputs are in high impedance) and the supply

to the integrated control circuitry is cut off. When the device exits the standby status, all of the control circuitry is

reset to power-up condition.

At power-up, power-down and when leaving the standby condition, the EN/FAULT pin is forced low until the

internal circuitry stabilize.

6.2 Microstepping sequencer

The value of the MODEx inputs is latched at power-up and when the device exits the STBY condition. After this,

the input value is unimportant and the MODE3 and MODE4 inputs start operating as step-clock and direction

input.

The only exception is the MODE1 = MODE2 = LOW condition; in this case the system is forced into full-step

mode. The previous condition is restored as soon as the MODE1 and MODE2 inputs switch to a different

combination.

An example of mode selection is shown in Figure 5. STCK and DIR timing.

At each STCK rising edge, the sequencer of the device is increased (DIR input high) or decreased (DIR input low)

of a module selected through the MODEx inputs as listed in Table 8. Step mode selection through MODEx inputs.

The sequencer is a 10-bit counter that sets the reference value of the PWM current controller and the direction of

the current for both of the H bridges.

Table 8. Step mode selection through MODEx inputs

MODE3

(STCK)

MODE4

(DIR) MODE1 MODE2 Step mode

0 0 0 0 Full-step

0 0 0 1 1/32nd step

0 0 1 0 1/128th step

0 0 1 1 1/256th step

0 1 0 0 Full-step - 1/32nd step (1)

0 1 0 1 1/4th step

0 1 1 0 1/256th step

0 1 1 1 1/64th step

1 0 0 0 Full-step - 1/128nd step (1)

1 0 0 1 1/256th step

1 0 1 0 1/2 step

1 0 1 1 1/8th step

1 1 0 0 Full-step - 1/256th step (1)

1 1 0 1 1/64th step

STSPIN220

Functional description

DS11633 - Rev 4 page 9/27

mlww sum mm MODLI mom; menu mm MOLM (DIR) Sm mg stn‘" sky nmdc

MODE3

(STCK)

MODE4

(DIR) MODE1 MODE2 Step mode

1 1 1 0 1/8th step

1 1 1 1 1/16th step

1. This driving mode is automatically bypassed by the MODE1 = MODE2 = 0 if it is kept after the device quit the standby

condition.

Figure 5. STCK and DIR timing

DIR

tDIR,su tDIR,ho

tSTCKH tSTCKL

1/fSTCK

STCK

Figure 6. Mode selection example

Sth(ON)

STBY\

RESET

MODE1

MODE2

Stepping

mode Undeterminated UndeterminatedFull-step1/256 t h step 1/256th step 1/16 th step

tMODEsu tMODEh

MODE3

(STCK)

MODE4

(DIR)

When the full-step mode is set, the reference value of the PWM current controller and the direction of the current

for both H bridges as listed in Table 8. Step mode selection through MODEx inputs.

STSPIN220

Microstepping sequencer

DS11633 - Rev 4 page 10/27

Table 9. Target reference and current direction according to sequencer value (full-step mode)

Sequencer value

Phase A Phase B

Reference voltage Current direction Reference

voltage

Current

direction

0 0 X X X X X X X X 100% × VREF A1 → A2 100% × VREF B1 → B2

0 1 X X X X X X X X 100% × VREF A1 → A2 100% × VREF B1 ← B2

1 0 X X X X X X X X 100% × VREF A1 ← A2 100% × VREF B1 ← B2

1 1 X X X X X X X X 100% × VREF A1 ← A2 100% × VREF B1 → B2

When the step mode is different from the full-step mode the values listed in Table 10. Target reference and current

direction according to sequencer value (not full-step mode) are used.

Table 10. Target reference and current direction according to sequencer value (not full-step mode)

Sequencer value

Phase A Phase B

Reference voltage Current

direction Reference voltage Current

direction

0 0 0 0 0 0 0 0 0 0 Zero

(power bridge disabled) -100% × VREF B1 → B2

0 0 N Sin(N/256 × π/2) × VREF A1 → A2 Cos(N/256 × π/2) × VREF B1 → B2

0 1 0 0 0 0 0 0 0 0 100% × VREF A1 → A2 Zero

(power bridge disabled) -

0 1 N Sin(π/2 + N/256 × π/2) ×

VREF A1 → A2 Cos(π/2 + N/256 × π/2) ×

VREF B1 ← B2

1 0 0 0 0 0 0 0 0 0 Zero

(power bridge disabled) -100% × VREF B1 ← B2

1 0 N Sin(N/256 × π/2) × VREF A1 ← A2 Cos(N/256 × π/2) × VREF B1 ← B2

1 1 0 0 0 0 0 0 0 0 100% × VREF A1 ← A2 Zero

(power bridge disabled) -

1 1 N Sin(π/2 + N/256 × π/2) ×

VREF A1 ← A2 Cos(π/2 + N/256 × π/2) ×

VREF B1 → B2

The following table shows the target reference and sequencer values for 1/2-, 1/4- and 1/8-step operation. Higher

microstepping resolutions follow the same pattern. The reset state (home state) for all stepping mode is entered

at power-up or when the device exits the standby status.

Table 11. Example

1/2 step 1/4 step 1/8 step VREF phase A VREF phase B Sequencer value

1 1 1 0% 100% 0000000000

home state

2 19.509% 98.079% 0000100000

2 3 38.268% 92.388% 0001000000

4 55.557% 83.147% 0001100000

STSPIN220

Microstepping sequencer

DS11633 - Rev 4 page 11/27

1/2 step 1/4 step 1/8 step VREF phase A VREF phase B Sequencer value

2 3 5 70.711% 70.711% 0010000000

6 83.147% 55.557% 0010100000

4 7 92.388% 19.509% 0011100000

8 98.079% 19.509% 0011100000

3 5 9 100% 0% 0100000000

10 98.079% -19.509% 0100100000

6 11 92.388% -38.268% 0101000000

12 83.147% -55.557% 0101100000

4 7 13 70.711% -70.711% 0110000000

14 55.557% -83.147% 0110100000

8 15 38.268% -92.388% 0111000000

16 19.509% -98.079% 1000100000

5 9 17 0% 100% 1000000000

18 -19.509% -98.079% 1000100000

10 19 -38.268% -92.388% 1001000000

20 -55.557% -83.147% 1001100000

6 11 21 -70.711% -70.711% 1010000000

22 -83.147% -55.557% 1010100000

12 23 -92.388% -38.268% 1011000000

24 -98.079% -19.509% 1011100000

7 13 25 -100% 0% 1100000000

26 -98.079% 19.509% 1100100000

14 27 -92.388% 38.268% 1101000000

28 -83.147% 55.557% 1101100000

8 15 29 -70.711% 70.711% 1110000000

30 -55.557% 83.147% 1110100000

16 31 -38.268% 92.388% 1111000000

32 -19.509% 98.079% 1111100000

Note: The positive number means that the output current is flowing from OUTx1 to OUTx2, vice versa for a negative

value.

6.3 PWM current control

The device implements two independent PWM current controllers, one for each full bridge.

The voltage of the sense pins (VSENSEA and VSENSEB) is compared to the respective internal reference generated

based on the sequencer value (see Table 9. Target reference and current direction according to sequencer value

(full-step mode) and Table 10. Target reference and current direction according to sequencer value (not full-step

mode)).

When VSENSEX > VREFX, the integrated comparator is triggered, the OFF time counter is started and the decay

sequence is performed.

The decay sequence starts turning on both the low sides of the full bridge. When 5/8ths of the programmed OFF

time (tOFF,SLOW) has expired, the decay sequence performs a quasi-synchronous fast decay.

STSPIN220

PWM current control

DS11633 - Rev 4 page 12/27

VREF = RSNSx ' lLoAD,peuk

Table 12. ON, slow decay and fast decay states

Current direction(1) ON Slow decay Fast decay (quasi-synch)

Zero (power bridge disabled)

HSX1 = OFF

LSX1 = OFF

HSX2 = OFF

LSX2 = OFF

HSX1 = OFF

LSX1 = OFF

HSX2 = OFF

LSX2 = OFF

HSX1 = OFF

LSX1 = OFF

HSX2 = OFF

LSX2 = OFF

X1 → X2

HSX1 = ON

LSX1 = OFF

HSX2 = OFF

LSX2 = ON

HSX1 = OFF

LSX1 = ON

HSX2 = OFF

LSX2 = ON

HSX1 = OFF

LSX1 = ON

HSX2 = OFF

LSX2 = OFF

X1 ← X2

HSX1 = OFF

LSX1 = ON

HSX2 = ON

LSX2 = OFF

HSX1 = OFF

LSX1 = ON

HSX2 = OFF

LSX2 = ON

HSX1 = OFF

LSX1 = OFF

HSX2 = OFF

LSX2 = ON

1. The current direction is set according toTable 9. Table 9 and Table 9. Target reference and current direction according to

sequencer value (full-step mode)Table 10. Target reference and current direction according to sequencer value (not full-step

mode) .

The reference voltage value, VREF, must be selected according to the load current target value (peak value) and

sense resistor value.

Equation 1

In choosing the sense resistor value, two main issues must be taken into account:

• The sense resistor dissipates energy and provides dangerous negative voltages on the SENSE pins during

current recirculation. For this reason the resistance of this component should be kept low (using multiple

resistors in parallel will help to obtain the required power rating with standard resistors).

• The lower the RSNSx value, the higher the peak current error due to noise on the VREF pin and the input

offset of the current sense comparator. Values of RSNSx that are too low must be avoided.

STSPIN220

PWM current control

DS11633 - Rev 4 page 13/27

III—

Figure 7. PWM current control sequence

SENSEX

OUTX1 OUTX2

SENSE

SENSEX

OUTX1 OUTX2

SENSE

SENSEX

OUTX1 OUTX2

SENSE

SENSEX

OUTX1 OUTX2

SENSE

SENSEX

OUTX1 OUTX2

SENSE

Iphase

tOFF

tOFF,SLOW

tDT

tOFF,FAST

SENSEX

REFX

SENSE

6.3.1 OFF time adjustment

The total OFF time (slow decay + fast decay) is adjusted through an external resistor connected between the

TOFF pin and ground, as shown in Figure 7. PWM current control sequence. A small RC series must be inserted

in parallel with the regulator resistor in order to increase the stability of the regulation circuit according to

Table 12. ON, slow decay and fast decay states indications.

Figure 8. OFF time regulation circuit

TOFF

OFF

CRCOFF

RCOFF

STSPIN220

PWM current control

DS11633 - Rev 4 page 14/27

The relationship between the OFF time and the external resistor value is shown in Figure 8. OFF time regulation

circuit. The value typically ranges from 10 µs to 150 µs.

Table 13. Recommended R RCOFF and C RCOFF values according to R OFF

ROFF RRCOFF CRCOFF

10 kΩ ≤ ROFF < 82 kΩ 1 kΩ 22 nF

82 kΩ ≤ ROFF ≤ 160 kΩ 2.2 kΩ 22 nF

Figure 9. OFF time vs. ROFF value

100

120

140

0 50 100 150 200

Off time [us]

Off resistor [kohm]

6.4 Overcurrent and short-circuit protection

The device embeds circuitry protecting each power output against the overload and short circuit conditions (short-

circuit to ground, short-circuit to VS and short-circuit between outputs).

When the overcurrent or short-circuit protection is triggered, the power stage is disabled and the EN\FAULT input

is forced low through the integrated open-drain MOSFET discharging the external CEN capacitor (refer to

Figure 10. Overcurrent and short-circuit protection management).

The power stage is kept disabled and the open-drain MOSFET is kept ON until the EN\FAULT input falls below

the VRELEASE threshold, then the CEN capacitor is charged through the external REN resistor.

STSPIN220

Overcurrent and short-circuit protection

DS11633 - Rev 4 page 15/27

mummy tum- : tdischarge + trhurge t = R .5 MW DIS EN EN (VDD — REN ' IPDEN) — VIH

Figure 10. Overcurrent and short-circuit protection management

Power

stage

FAULT

RELEASE

Overcurrent

protection

ENABLED DISABLED ENABLED

tOCSD

tDIS

tdischa rge tcha rge

RELEASE

EN\FAULT

FAULT_MCU

MCU DEVICE

EN_MCU

RELEASE

OC\SC

THSD

FAULT

CEN IPDEN

The total disable time after an overcurrent event can be set sizing properly the external network connected to the

EN\FAULT pin (refer to Figure 10. Overcurrent and short-circuit protection management):

Equation 2

But tcharge is normally much higher than tdischarge, thus we can consider the following:

Equation 3

where VDD is the pull-up voltage of the REN resistor.

STSPIN220

Overcurrent and short-circuit protection

DS11633 - Rev 4 page 16/27

Figure 11. Disable time versus REN and CEN values (VDD = 3.3 V)

100

1000

0 10 20 30 40 50 60 70 80 90 100

Disable time [µs]

CEN [nF]

REN = 3.3 kΩ

REN = 4.7 kΩ

REN = 2.2 kΩ

REN = 6.8 kΩ

REN = 10 kΩ

REN = 18 kΩ

Figure 12. Disable time versus REN and CEN values (VDD = 1.8 V)

100

1000

0 10 20 30 40 50 60 70 80 90 100

Disable time [µs]

CEN [nF]

REN = 3.3 kΩ

REN = 4.7 kΩ

REN = 2.2 kΩ

REN = 6.8 kΩ

REN = 10 kΩ

REN = 18 kΩ

6.5 Thermal shutdown

The device embeds circuitry protecting it from the overtemperature conditions.

STSPIN220

Thermal shutdown

DS11633 - Rev 4 page 17/27

When the thermal shutdown temperature is reached, the power stage is disabled and the EN\FAULT input is

forced low through the integrated open-drain MOSFET (refer to Figure 13. Thermal shutdown management).

The protection and the EN\FAULT output are released when the IC temperature returns below a safe operating

value (TjSD - TjSD,Hyst).

Figure 13. Thermal shutdown management

FAULT

RELEASE

jSD

jSD,hyst

Thermal

shutdown

RELEASE

EN\FAULT

FAULT_MCU

MCU DEVICE

EN_MCU

RELEASE

OC\SC

THSD

FAULT

CEN

Power

stage ENABLED DISABLED DISABLED ENABLED

tTHSD

IPDEN

STSPIN220

Thermal shutdown

DS11633 - Rev 4 page 18/27

"am-Hired u v, z w v N mum N5 us v; M

7Graphs

Figure 14. Power stage resistance versus supply voltage

Figure 15. Power stage resistance versus temperature

0.8

0.9

1.1

1.2

1.3

1.4

-50 0 50 100 150

R HS+LS normalized at 25

DS(ON) °C

Temperature [°C]

= 1. 8 V

= 3 V

= 10 V

STSPIN220

Graphs

DS11633 - Rev 4 page 19/27

a >T,>..E.__E§;_2!Eo

Figure 16. Overcurrent threshold versus supply voltage

STSPIN220

Graphs

DS11633 - Rev 4 page 20/27

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8Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,

depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product

status are available at: www.st.com. ECOPACK is an ST trademark.

8.1 VFQFPN 3x3x1.0 16L package information

Figure 17. VFQFPN 3x3x1.0 16L package outline

STSPIN220

Package information

DS11633 - Rev 4 page 21/27

3,40 M6 6 nm; ﬁg QVM;

Table 14. VFQFPN 3x3x1.0 16L package mechanical data

Symbol

Dimensions

(mm)

Min. Typ. Max. Notes

A 0.80 0.90 1.00 (1) (2)

A1 0.02 0.05

A3 0.20

b 0.18 0.25 0.30

D 2.9 3.00 3.1

D1 1.50

D2 1.70 1.80 1.90

E 2.9 3.00 3.1

E1 1.50

E2 1.70 1.80 1.90

e 0.45 0.50 0.55

L 0.30 0.40 0.50

ddd 0.08

1. VFQFPN stands for "thermally-enhanced very thin fine pitch quad package, no lead". Very thin: 0.80 < A ≤ 1.00 mm / Fine

pitch: e < 1.00 mm. The pin 1 identifier must be present on the top surface of the package as an indentation mark or other

feature of the package body.

2. The chamfer of lead n 1,4,5,8,9,12,13,16 is 0.042 mm in both, x and y direction, with 45°.s

Figure 18. VFQFPN 3x3x1.0 16L recommended footprint

STSPIN220

VFQFPN 3x3x1.0 16L package information

DS11633 - Rev 4 page 22/27

Revision history

Table 15. Document revision history

Date Version Changes

06-May-2016 1 Initial release.

30-Jun-2016 2

- Updated document status to Datasheet - production data on page 1.

- Updated Table 1 (changed Max. value of VS from 12 to 11) and Table 7 (changed tOFF

value from ≅47 µs to ≅37 µs).

28-Nov-2016 3

- Updated Figure 1 in Section 1 Block diagram (replaced by new figure).

- Updated Table 2 in Section 2.2 Recommended operating conditions (added tINw

symbol).

- Updated Table 3 in Section 2.3 Thermal data(replaced by new table).

- Updated Table 8 in Section 6.2 Microstepping sequencer [removed "Sequencer module

(binary)" column].

- Added Table 11 in Section 6.2 Microstepping sequencer.

- Updated Table 13 in (updated title).

- Updated Figure 13 in (replaced by new figure).

- Minor modifications throughout document.

21-Mar-2019 4 Updated Section 8.1 VFQFPN 3x3x1.0 16L package information

STSPIN220

DS11633 - Rev 4 page 23/27

Contents

1Block diagram .....................................................................2

2Electrical data .....................................................................3

2.1 Absolute maximum ratings.......................................................3

2.2 Recommended operating conditions ..............................................3

2.3 Thermal data ..................................................................3

2.4 ESD protection ................................................................3

3Electrical characteristics...........................................................5

4Pin description ....................................................................7

5Typical application.................................................................8

6Functional description .............................................................9

6.1 Standby and power-up ..........................................................9

6.2 Microstepping sequencer ........................................................9

6.3 PWM current control ...........................................................12

6.3.1 OFF time adjustment.....................................................14

6.4 Overcurrent and short-circuit protection ...........................................15

6.5 Thermal shutdown.............................................................17

7Graphs ...........................................................................19

8Package information..............................................................21

8.1 VFQFPN 3x3x1.0 16L package information........................................21

Revision history .......................................................................23

Contents ..............................................................................24

List of tables ..........................................................................25

List of figures..........................................................................26

STSPIN220

Contents

DS11633 - Rev 4 page 24/27

List of tables

Table 1. Absolute maximum ratings .............................................................3

Table 2. Recommended operating conditions.......................................................3

Table 3. Thermal data.......................................................................3

Table 4. ESD protection ratings ................................................................4

Table 5. Electrical characteristics ...............................................................5

Table 6. Pin description......................................................................7

Table 7. Typical application values ..............................................................8

Table 8. Step mode selection through MODEx inputs .................................................9

Table 9. Target reference and current direction according to sequencer value (full-step mode) .................... 11

Table 10. Target reference and current direction according to sequencer value (not full-step mode) ................. 11

Table 11. Example ......................................................................... 11

Table 12. ON, slow decay and fast decay states .................................................... 13

Table 13. Recommended R RCOFF and C RCOFF values according to R OFF .................................... 15

Table 14. VFQFPN 3x3x1.0 16L package mechanical data ............................................. 22

Table 15. Document revision history ............................................................. 23

STSPIN220

List of tables

DS11633 - Rev 4 page 25/27

List of figures

Figure 2. Block diagram ....................................................................2

Figure 3. Pin connection (top view) .............................................................7

Figure 4. Typical application schematic ..........................................................8

Figure 5. STCK and DIR timing .............................................................. 10

Figure 6. Mode selection example ............................................................ 10

Figure 7. PWM current control sequence ........................................................ 14

Figure 8. OFF time regulation circuit ........................................................... 14

Figure 9. OFF time vs. ROFF value ............................................................ 15

Figure 10. Overcurrent and short-circuit protection management ........................................ 16

Figure 11. Disable time versus REN and CEN values (VDD = 3.3 V) ....................................... 17

Figure 12. Disable time versus REN and CEN values (VDD = 1.8 V) ....................................... 17

Figure 13. Thermal shutdown management ....................................................... 18

Figure 14. Power stage resistance versus supply voltage ............................................. 19

Figure 15. Power stage resistance versus temperature ............................................... 19

Figure 16. Overcurrent threshold versus supply voltage .............................................. 20

Figure 17. VFQFPN 3x3x1.0 16L package outline .................................................. 21

Figure 18. VFQFPN 3x3x1.0 16L recommended footprint ............................................. 22

STSPIN220

List of figures

DS11633 - Rev 4 page 26/27

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST

products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST

products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of

Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service

names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

STSPIN220

DS11633 - Rev 4 page 27/27

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