ABLIC Inc. 的 S-35192A 规格书

O ABLIC ABLIC Inc.
S-35192A
www.ablic.com
3-WIRE REAL-TIME CLOCK
© ABLIC Inc., 2006-2018 Rev.3.2_04
1
The S-35192A is a CMOS 3-wire real-time clock IC which operates with the very low current consumption in the wide range of
operation voltage. The operation voltage is 1.3 V to 5.5 V so that the S-35192A can be used for various power supplies from
main supply to backup battery. Due to the 0.45 A current consumption and wide range of power supply voltage at time
keeping, the S-35192A makes the battery life longer. In the system which operates with a backup battery, the included free
registers can be used as the function for user's backup memory. Users always can take back the information in the registers
which is stored before power-off the main power supply, after the voltage is restored.
The S-35192A has the function to correct advance / delay of the clock data speed, in the wide range, which is caused by the
crystal oscillation circuit's frequency deviation. Correcting according to the temperature change by combining this function
and a temperature sensor, it is possible to make a high precise clock function which is not affected by the ambient
temperature.
Features
Low current consumption: 0.45 A typ. (VDD = 3.0 V, Ta = 25C)
Constant output of 32.768 kHz clock pulse (Nch open-drain output)
Wide range of operating voltage: 1.3 V to 5.5 V
Built-in clock correction function
Built-in free user register
3-wire (MICROWIRE) CPU interface
Built-in alarm function
Built-in flag generator during detection of low power voltage or at power-on
Auto calendar up to the year 2099, automatic leap year calculation function
Built-in constant voltage circuit
Built-in 32.768 kHz crystal oscillation circuit (built-in Cd, external Cg)
Lead-free (Sn 100%), halogen-free
Applications
Mobile game device
Mobile AV device
Digital still camera
Digital video camera
Electronic power meter
DVD recorder
TV, VCR
Mobile phone, PHS
Package
SNT-8A
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3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
2
Block Diagram
Real-time data register
Status register 1
Oscillatoion
circuit
SCK
SIO
Low power supply
voltage detector
VDD
VSS
Comparator 1
Shift register Serial
interface
XIN
XOUT
Comparator 2
Clock correction register
INT
controller 1
Divider,
timing generator
Constant-voltage
circuit
Status register 2
Power-on
detection circuit
Free register
CS
32KO
INT register 1
INT register 2 INT
controller 2
Day Month Year
Day of
the week
Minute
Hour
Second
Figure 1
S-35192A l8T1 U ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
3
Product Name Structure
1. Product name
S-35192A - I8T1 U
Package name (abbreviation) and IC packing specification*1
I8T1: SNT-8A, Tape
Product name
Environmental code
U: Lead-free (Sn 100%), halogen-free
*1. Refer to the tape drawing.
2. Package
Table 1 Package Drawing Codes
Package Name Dimension Tape Reel Land
SNT-8A PH008-A-P-SD PH008-A-C-SD PH008-A-R-SD PH008-A-L-SD
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
4
Pin Configuration
1. SNT-8A
7
6
5
8
2
3
4
1
Top view
Figure 2 S-35192A-I8T1U
Table 2 List of Pins
Pin No. Symbol Description I/O Configuration
1 32KO
Pin for constant
output of
32.768 kHz
Output Nch open-drain output
(no protective diode at VDD)
2 XOUT Connection pins
for quartz
crystal
3 XIN
4 VSS GND pin
5 CS Input pin for
chip select Input
CMOS input
(built-in pull-down resistor.
no protective diode at VDD)
6 SCK Input pin for
serial clock Input CMOS input
(no protective diode at VDD)
7 SIO I/O pin for
serial data Bi-directional
Nch open-drain output
(no protective diode at VDD)
CMOS input
8 VDD Pin for positive
power supply
IIIIIIIII
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
5
Pin Functions
1. CS (input for chip select) pin
This pin is to input chip select, has a pull-down resistor. Communication is available when this pin is in "H". If not using
communication, set this pin "L" or open.
2. SCK (input for serial clock) pin
This pin is to input a clock pulse for serial interface. When the CS pin is in "H", the SIO pin inputs / outputs data by
synchronizing with the clock pulse. When the CS pin is in "L" or open, the SCK pin does not accept inputting a clock
pulse.
3. SIO (I/O for serial data) pin
This pin is a data input / output pin of serial interface. When the CS pin is in "H", the SIO pin inputs / outputs data by
synchronizing with a clock pulse from the SCK pin. The status is in "High-Z" when the CS pin is in "L" or open, so
that the S-35192A does not transmit data. Setting the CS pin to "H" from "L" or open, this SIO pin goes in the input
status so that it receives the command data. This pin has CMOS input and Nch open drain output.
4. XIN, XOUT (quartz crystal connect) pins
Connect a quartz crystal between XIN and XOUT.
5. 32KO (constant output of 32.768 kHz) pin
This is an output pin for 32.768 kHz. This pin constantly outputs a clock pulse after power-on.
6. VDD (positive power supply) pin
Connect this VDD pin with a positive power supply. Regarding the values of voltage to be applied, refer to
" Recommended Operation Conditions".
7. VSS pin
Connect this VSS pin to GND.
Equivalent Circuits of Pins
SCK
Figure 3 SCK pin
SIO
Figure 4 SIO pin
CS
Figure 5 CS pin
32KO
Figure 6 32KO pin
Vss ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
6
Absolute Maximum Ratings
Table 3
Item Symbol Applied Pin Absolute Maximum Rating Unit
Power supply voltage VDD V
SS 0.3 to VSS 6.5 V
Input voltage VIN CS, SCK , SIO VSS 0.3 to VSS 6.5 V
Output voltage VOUT SIO, 32KO VSS 0.3 to VSS 6.5 V
Operating ambient
temperature*1 Topr 40 to 85 C
Storage temperature Tst
g
55 to 125 C
*1. Conditions with no condensation or frost. Condensation or frost causes short-circuiting between pins, resulting in a
malfunction.
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Recommended Operation Conditions
Table 4
(VSS = 0 V)
Item Symbol Condition Min. Typ. Max. Unit
Power supply voltage*1 VDD Ta = 40C to 85C 1.3 3.0 5.5 V
Time keeping power
supply voltage*2
VDDT Ta = 40C to 85C VDET 0.15 5.5 V
Quartz crystal CL value CL 6 7 pF
*1. The power supply voltage that allows communication under the conditions shown in Table 9 of " AC Electrical
Characteristics"
*2. The power supply voltage that allows time keeping. For the relationship with VDET (low power supply voltage detection
voltage), refer to " Characteristics (Typical Data)".
Oscillation Characteristics
Table 5
(Ta =
25
C, V
DD
= 3.0 V, V
SS
= 0 V, VT-200 quartz crystal (C
L
= 6 pF, 32.768 kHz) manufactured by Seiko Instruments Inc.)
Item Symbol Condition Min. Typ. Max. Unit
Oscillation start voltage VSTA Within 10 seconds 1.1 5.5 V
Oscillation start time tSTA 1 s
IC-to-IC frequency deviation*1 IC 10 10 ppm
Frequency voltage deviation V VDD = 1.3 V to 5.5 V 3 3 ppm/V
External capacitance C
g
Applied to XIN pin 9.1 pF
Internal oscillation capacitance Cd Applied to XOUT pin 8 pF
*1. Reference value
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
7
DC Electrical Characteristics
Table 6 DC Characteristics (VDD = 3.0 V)
(Ta
40
C to

85
C, V
SS
= 0 V, VT-200
quartz crystal
(C
L
= 6 pF, 32.768 kHz, C
g
= 9.1 pF) manufactured by Seiko Instruments Inc.)
Item Symbol Applied Pin Condition Min. Typ. Max. Unit
Current consumption 1 IDD1 Out of communication 0.45 1.13
A
Current consumption 2 IDD2 During communication
(SCK = 100 kHz) 3.3 8 A
Input current leakage 1 IIZH SCK , SIO VIN = VDD 0.5 0.5 A
Input current leakage 2 IIZL SCK , SIO VIN = VSS 0.5 0.5 A
Input current 1 IIH1 CS VIN = VDD 2 6 16 A
Input current 2 IIH2 CS VIN = 0.4 V 40 100 300 A
Input current 3 IIH3 CS VIN = 1.0 V 215 A
Output current leakage 1 IOZH SIO, 32KO VOUT = VDD 0.5 0.5 A
Output current leakage 2 IOZL SIO, 32KO VOUT = VSS 0.5 0.5 A
Input voltage 1 VIH CS, SCK , SIO 0.8 VDD V
SS 5.5 V
Input voltage 2 VIL CS, SCK , SIO V
SS 0.3 0.2 VDD V
Output current 1 IOL1 32KO VOUT = 0.4 V 3 5 mA
Output current 2 IOL2 SIO VOUT = 0.4 V 5 10 mA
Power supply voltage
detection voltage VDET 0.65 1 1.35 V
Table 7 DC Characteristics (VDD = 5.0 V)
(Ta =
40
C to
85
C, V
SS
= 0 V, VT-200
quartz crystal
(C
L
= 6 pF, 32.768 kHz, C
g
= 9.1 pF) manufactured by Seiko Instruments Inc.)
Item Symbol Applied Pin Condition Min. Typ. Max. Unit
Current consumption 1 IDD1 Out of communication 0.6 1.4
A
Current consumption 2 IDD2 During communication
(SCK = 100 kHz) 6 14 A
Input current leakage 1 IIZH SCK , SIO VIN = VDD 0.5 0.5 A
Input current leakage 2 IIZL SCK , SIO VIN = VSS 0.5 0.5 A
Input current 1 IIH1 CS VIN = VDD 8 16 50 A
Input current 2 IIH2 CS VIN = 0.4 V 40 150 350 A
Input current 3 IIH3 CS VIN = 2.0V 610 A
Output current leakage 1 IOZH SIO, 32KO VOUT = VDD 0.5 0.5 A
Output current leakage 2 IOZL SIO, 32KO VOUT = VSS 0.5 0.5 A
Input voltage 1 VIH CS, SCK , SIO 0.8 VDD V
SS 5.5 V
Input voltage 2 VIL CS, SCK , SIO V
SS 0.3 0.2 VDD V
Output current 1 IOL1 32KO VOUT = 0.4 V 5 8 mA
Output current 2 IOL2 SIO VOUT = 0.4 V 6 13 mA
Power supply voltage
detection voltage VDET 0.65 1 1.35 V
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
8
AC Electrical Characteristics
Table 8 Measurement Conditions
SIO
C = 80 pF
V
DD
R = 10 k
Input pulse voltage VIH = 0.8 VDD, VIL = 0.2 VDD
Input pulse rise / fall time 20 ns
Output determination voltage VOH = 0.8 VDD, VOL = 0.2 VDD
Output load 80 pF pull-up resistor 10 k
Remark The power supplies of the IC
and load have the same
electrical potential.
Figure 7 Output Load Circuit
Table 9 AC Electrical Characteristics
(Ta = 40C to 85C)
Item Symbol
VDD*2 1.3 V VDD*2 3.0 V Unit
Min. Typ. Max. Min. Typ. Max.
Clock pulse width tSCK 5 250000 1 250000 s
Setup time before CS rise tDS 1
0.2 s
Hold time after CS rise tCSH 1 0.2 s
Input data setup time tISU 1 0.2 s
Input data hold time tIHO 1 0.2 s
Output data definition time*1 tACC 3.5 1 s
Setup time before CS fall tCSS 1 0.2 s
Hold time after CS fall tDH 1 0.2 s
Input rise / fall time tR, tF 0.1 0.05 s
*1. Since the output format of the SIO pin is Nch open-drain output, output data definition time is determined by the
values of the load resistance (RL) and load capacity (CL) outside the IC. Therefore, use this value only as a reference
value.
*2. Regarding the power supply voltage, refer to " Recommended Operation Conditions".
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
9
SIO
t
DS
t
CSH
t
DS
SCK
t
DH
t
CSS
t
DH
CS
Figure 8 Timing Diagram 1 during 3-wire Communication
Input data
80%
20%
t
F
t
R
t
ISU
t
IHO
20%20%
80%80%
80%
20%
SCK
Figure 9 Timing Diagram 2 during 3-wire Communication
Output data
80%
20%
50% 50% 50%
t
SCK
t
SCK
t
ACC
20%
80%
20%
SCK
Figure 10 Timing Diagram 3 during 3-wire Communication
C1 82 ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
10
Configuration of Data Communication
1. Data communication
After setting the CS pin "H", transmit the 4-bit fixed code "0110", after that, transmit a 3-bit command and 1-bit read /
write command. Next, data is output or input from B7. Regarding details, refer to " Serial Interface".
Command
0 1 1 0 C2 C1 C0 R / W
Fixed code
Read / write bit
B7 B6 B5 B4 B3 B2 B1 B0
1-byte data
Figure 11 Data Communication
RESET“ ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
11
2. Configuration of command
8 types of command are available for the S-35192A. The S-35192A reads / writes the various registers by inputting
these fixed codes and commands. The S-35192A does not perform any operation with any codes and commands other
than those below. However, in case that the fixed codes or the commands are failed to be recognized in the 1st byte but
are successfully recognized in the 2nd and higher bytes, the commands are executed.
Table 10 List of Commands
Fixed
Code
Command Data
C2 C1 C0 Description B7 B6 B5 B4 B3 B2 B1 B0
0110
0 0 0
Status register 1 access
RESET*1 24 / 12 SC0*2 SC1*2 INT1*3 INT2*3 BLD*4 POC*4
0 0 1
Status register 2 access
INT1FE INT1ME INT1AE SC2*2 SC3*2 SC4*2 INT2AE TEST*5
0 1 0
Real-time data 1 access
(year data to)
Y1
M1
D1
W1
H1
m1
s1
Y2
M2
D2
W2
H2
m2
s2
Y4
M4
D4
W4
H4
m4
s4
Y8
M8
D8
*6
H8
m8
s8
Y10
M10
D10
*6
H10
m10
s10
Y20
*6
D20
*6
H20
m20
s20
Y40
*6
*6
*6
PM / AM
m40
s40
Y80
*6
*6
*6
*6
*6
*6
0 1 1
Real-time data 2 access
(hour data to)
H1
m1
s1
H2
m2
s2
H4
m4
s4
H8
m8
s8
H10
m10
s10
H20
m20
s20
PM / AM
m40
s40
*6
*6
*6
1 0 0
INT register 1 access
(alarm time 1: week / hour / minute)
(INT1AE = 1, INT1ME = 0,
INT1FE = 0)
W1
H1
m1
W2
H2
m2
W4
H4
m4
*6
H8
m8
*6
H10
m10
*6
H20
m20
*6
PM / AM
m40
A1WE
A1HE
A1mE
INT register 1 access
(free register function)
(settings other than alarm time 1)
SC5*2 SC6*2 SC7*2 SC8*2 SC9*2 SC10*2 SC11*2 SC12*2
1 0 1
INT register 2 access
(alarm time 2: week / hour / minute)
(INT2AE = 1)
W1
H1
m1
W2
H2
m2
W4
H4
m4
*6
H8
m8
*6
H10
m10
*6
H20
m20
*6
PM / AM
m40
A2WE
A2HE
A2mE
1 1 0
Clock correction register access
V0 V1 V2 V3 V4 V5 V6 V7
1 1 1
Free register access
F0 F1 F2 F3 F4 F5 F6 F7
*1. Write-only flag. The S-35192A initializes by writing "1" in this register.
*2. Scratch bit. This is a register which is available for read / write operations and can be used by users freely.
*3. Read-only flag. Valid only when using the alarm function. When the alarm time matches, this flag is set to "1", and it is
cleared to "0" when reading.
*4. Read-only flag. "POC" is set to "1" when power is applied. It is cleared to "0" when reading. Regarding "BLD", refer to
" Low Power Supply Voltage Detection Circuit".
*5. Test bit for ABLIC Inc. Be sure to set to "0" in use.
*6. No effect when writing. It is "0" when reading.
12 Y1 Y2 Y4 V8 Y10 Y20 Y40 V80 B7 B0 M1 M2 M4 M8 M10 0 0 0 B7 B0 D1 D2 D4 D8 D10 D20 0 0 B7 B0 W1 W2 W4 0 0 0 0 0 B7 B0 H1 H2 H4 H8 H10 H20 W1 PM 0 B7 B0 m1 m2 m4 m8 m10 mZO m40 0 B7 B0 51 52 s4 58 510 520 540 ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
12
Configuration of Registers
1. Real-time data register
The real-time data register is a 7-byte register that stores the data of year, month, day, day of the week, hour, minute,
and second in the BCD code. To write / read real-time data 1 access, transmit / receive the data of year in B7, month,
day, day of the week, hour, minute, second in B0, in 7-byte. When you skip the procedure to access the data of year,
month, day, day of the week, read / write real-time data 2 access. In this case, transmit / receive the data of hour in B7,
minute, second in B0, in 3-byte.
The S-35192A transfers a set of data of time to the real-time data register when it recognizes a reading instruction.
Therefore, the S-35192A keeps precise time even if time-carry occurs during the reading operation of the real-time data
register.
Y1 Y2 Y4 Y8 Y10 Y20 Y40 Y80
B7 B0
Month data (01 to 12)
Year data (00 to 99)
Start bit of real-time data 1 data access
M1 M2 M4 M8 M10 0 0 0
B7 B0
Day data (01 to 31)
D1 D2 D4 D8 D10 D20 0 0
B7 B0
Day of the week data (00 to 06)
W1 W2 W4 0 0 0 0 0
B7 B0
H1 H2 H4 H8 H10 H20
AM / PM
0
B7 B0
Minute data (00 to 59)
Hour data (00 to 23 or 00 to 11)
Start bit of real-time data 2 data access
m1 m2 m4 m8 m10 m20 m40 0
B7 B0
Second data (00 to 59)
s1 s2 s4 s8 s10 s20 s40 0
B7 B0
Figure 12 Real-time Data Register
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
13
Year data (00 to 99): Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80
Sets the lower two digits of the Western calendar year (00 to 99) and links together with the auto calendar
function until 2099.
Example: 2053 (Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80) = (1, 1, 0, 0, 1, 0, 1, 0)
Month data (01 to 12): M1, M2, M4, M8, M10
Example: December (M1, M2, M4, M8, M10, 0, 0, 0) = (0, 1, 0, 0, 1, 0 ,0 ,0)
Day data (01 to 31): D1, D2, D4, D8, D10, D20
The count value is automatically changed by the auto calendar function.
1 to 31: Jan., Mar., May, July, Aug., Oct., Dec., 1 to 30: April, June, Sep., Nov.
1 to 29: Feb. (leap year), 1 to 28: Feb. (non-leap year)
Example: 29 (D1, D2, D4, D8, D10, D20, 0, 0) = (1, 0, 0, 1, 0, 1, 0, 0)
Day of the week data (00 to 06): W1, W2, W4
A septenary up counter. Day of the week is counted in the order of 00, 01, 02, …, 06, and 00. Set up day of the
week and the count value.
Hour data (00 to 23 or 00 to 11): H1, H2, H4, H8, H10, H20, AM / PM
In 12-hour mode, write 0; AM, 1; PM in the PM/AM bit. In 24-hour mode, users can write either 0 or 1. 0 is
read when the hour data is from 00 to 11, and 1 is read when from 12 to 23.
Example (12-hour mode): 11 p.m. (H1, H2, H4, H8, H10, H20, PM/AM , 0) = (1, 0, 0, 0, 1, 0, 1, 0)
Example (24-hour mode): 22 (H1, H2, H4, H8, H10, H20, PM/AM , 0) = (0, 1, 0, 0, 0, 1, 1, 0)
Minute data (00 to 59): m1, m2, m4, m8, m10, m20, m40
Example: 32 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (0, 1, 0, 0, 1, 1, 0, 0)
Example: 55 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (1, 0, 1, 0, 1, 0, 1, 0)
Second data (00 to 59): s1, s2, s4, s8, s10, s20, s40
Example: 19 seconds (s1, s2, s4, s8, s10, s20, s40, 0) = (1, 0, 0, 1, 1, 0, 0, 0)
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
14
2. Status register 1
Status register 1 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below.
B7
RESET 12 / 24
R
R
R
R / W R / W
SC1
B6 B5 B4 B3 B2 B1 B0
BLD INT2 POC INT1
SC0
R
R / W
W
R: Read
W: Write
R / W: Read / write
Figure 13 Status Register 1
B0: POC
This flag is used to confirm whether the power is on. The power-on detection circuit operates at power-on and B0 is
set to "1". This flag is Read-only. Once it is read, it is automatically set to "0". When this flag is "1", be sure to initialize.
Regarding the operation after power-on, refer to " Power-on Detection Circuit and Register Status".
B1: BLD
This flag is set to "1" when the power supply voltage decreases to the level of detection voltage (VDET) or less. Users
can detect a drop in the power supply voltage. Once this flag is set to "1", it is not set to "0" again even if the power
supply increases to the level of detection voltage (VDET) or more. This flag is read-only. When this flag is "1", be sure
to initialize. Regarding the operation of the power supply voltage detection circuit, refer to " Low Power Supply
Voltage Detection Circuit".
B2: INT2, B3: INT1
This flag indicates the time set by alarm and when the time has reached it. This flag is set to "1" when the time that
users set by using the alarm function has come. The INT1 flag in the alarm 1 function and the INT2 flag in the alarm
2 function are set to "1". Set "0" in INT1AE (B5 in the status register 2) or in INT2AE (B1 in the status register 2) after
reading "1" in the INT1 flag or in the INT2 flag. This flag is read-only. Once this flag is read, it is set to "0"
automatically.
B4: SC1, B5: SC0
These are SRAM type registers, they are 2 bits as a whole, can be freely set by users.
B6: 24 / 12
This flag is used to set 12-hour or 24-hour mode. Set the flag ahead of write operation of the real-time data register in
case of 24-hour mode.
0: 12-hour mode
1: 24-hour mode
B7: RESET
The internal IC is initialized by setting this bit to "1". This bit is write-only. It is always "0" when reading. When
applying the power supply voltage to the IC, be sure to write "1" to this bit to initialize the circuit. Regarding each
status of registers after initialization, refer to " Register Status After Initialization".
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
15
3. Status register 2
Status register 2 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below.
B7
INT1FE INT1ME
R / W R / W
SC2
B6 B5 B4 B3 B2 B1 B0
SC4 SC3
INT1AE
R / W R / W R / W R / W R / W R / W
INT2AE TEST
R / W: Read / write
Figure 14 Status Register 2
B0: TEST
This is a test flag for ABLIC Inc. Be sure to set this flag to "0" in use. If this flag is set to "1", be sure to initialize to set
"0".
B1: INT2AE
To use the alarm 2 function, access the INT register 2 after setting this flag enable. Disable when this flag is in "0",
enable when this flag is in "1".
B2: SC4, B3: SC3, B4: SC2
These flags are SRAM type registers, they are 3 bits as a whole, can be freely set by users.
B5: INT1AE, B6: INT1ME, B7: INT1FE
To use the alarm 1 function, access the INT register 1 after setting INTA1AE = "1", INT1ME = "0", and INT1FE = "0".
In other settings than this, these flags are disable for setting the alarm time (free registers).
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
16
4. INT register 1 and INT register 2
The INT register 1 and the INT register 2 are to set up the alarm time. The alarm output mode gets enable by using the
status register 2, these registers work as data registers for alarm time. When disable, the INT register 1 works as a
1-byte free register. Users are able to make sure the alarm output by reading the INT1 / INT2 flag (B3 or B2 in the status
register 1).
4. 1 Alarm function
Users can set the alarm time (the data of day of the week, hour, minute) by using the INT register 1 and 2 which are
3-byte data registers. The configuration of register is as well as the data register of day of the week, hour, minute, in
the real-time data register; is expressed by the BCD code. Do not set a nonexistent day. Users are necessary to set
up the alarm-time data according to the 12 / 24 hour mode that they set by using the status register 1.
INT register 1 INT register 2
H8 H4 H2
H1
A1mE
m8
m4
m2
m1
H20
H10
m10 m20 m40
H8
H4
H2
H1
A2mE
m8
m4
m2
m1
H20
H10
m10 m20 m40
AM /
PM
A1WE
0
0
W4
W2 W1
B7 B0
0 00
0
W4
W2
W1 0
0
A2WE
A1HE A2HE
AM /
PM
B7 B0
B7 B0
B7 B0
B7 B0
B7 B0
Figure 15 INT Register 1 and INT Register 2 (Alarm-Time Data)
The INT register 1 has A1WE, A1HE, A1mE at B0 in each byte. It is possible to make data valid; the data of day of
the week, hour, minute which are in the corresponding byte; by setting these bits to "1". This is as well in A2WE,
A2HE, A2mE in the INT register 2.
Setting example: alarm time "7:00 pm" in the INT register 1
(1) 12-hour mode (status register 1 B6 = 0)
set up 7:00 PM
Data written to INT register 1
Day of the week *1 *1 *1 *1 *1 *1 *1 0
Hour 1 1 1 0 0 0 1 1
Minute 0 0 0 0 0 0 0 1
B7 B0
*1. Don't care (both of 0 and 1 are acceptable).
(2) 24-hour mode (status register 1 B6 = 1)
set up 19:00 PM
Data written to INT register 1
Day of the week *1 *1 *1 *1 *1 *1 *1 0
Hour 1 0 0 1 1 0
1*2 1
Minute 0 0 0 0 0 0 0 1
B7 B0
*1. Don't care (both of 0 and 1 are acceptable).
*2. Set up PM/AM flag along with the time setting.
;\ ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
17
4. 2 Free register
The INT register 1 is a 1-byte SRAM type register that can be set freely by users.
B7
R / W R / W
SC8
B6 B5 B4 B3 B2 B1 B0
SC10 SC9
SC7
R / W R / W R / W R / W R / W R / W
SC11 SC12
SC6 SC5
R / W: Read / write
Figure 16 INT Register 1 (Free register)
5. Clock correction register
The clock correction register is a 1-byte register that is used to correct advance / delay of the clock. When not using this
function, set this register to "00h". Regarding the register values, refer to " Function of Clock Correction".
B7
R / W R / W
V3
B6 B5 B4 B3 B2 B1 B0
V5 V4
V2
R / W R / W R / W R / W R / W R / W
V6 V7
V1 V0
R / W: Read / write
Figure 17 Clock Correction Register
6. Free register
The free register is a 1-byte SRAM type register that can be set freely by users.
B7
R / W R / W
F3
B6 B5 B4 B3 B2 B1 B0
F5 F4
F2
R / W R / W R / W R / W R / W R / W
F6 F7
F1 F0
R / W: Read / write
Figure 18 Free Register
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
18
Power-on Detection Circuit and Register Status
The power-on detection circuit operates by power-on the S-35192A, as a result each register is cleared; each register is
set as follows.
Real-time data register: 00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S)
Status register 1: "01h"
Status register 2: "80h"
INT register 1: "80h"
INT register 2: "00h"
Clock correction register: "00h"
Free register: "00h"
"1" is set in the POC flag (B0 in the status register 1) to indicate that power has been applied. In this case, be sure to
initialize. The POC flag is set to "0" due to initialization. (Refer to " Register Status After Initialization".)
For the regular operation of power-on detection circuit, as seen in Figure 19, the period to power-up the S-35192A is that
the voltage reaches 1.3 V within 10 ms after setting the IC’s power supply voltage at 0 V. When the power-on detection
circuit is not working normally is; the POC flag (B0 in the status register 1) is not in "1", or 1 Hz is not output from the INT
pin. In this case, power-on the S-35192A once again because the internal data may be in the indefinite status.
Moreover, regarding the processing right after power-on, refer to " Flowchart of Initialization and Example of
Real-time Data Set-up".
Within 10 ms
1.3 V
0 V
*1
*1. 0 V indicates that there are no potential differences between the VDD
pin and VSS pin of the S-35192A.
Figure 19 How to Raise the Power Supply Voltage
'j _ —JMflHflflHHflHflflHflJ_flWMW1HflWW 40 L W — ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
19
Register Status After Initialization
The status of each register after initialization is as follows.
Real-time data register: 00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S)
Status register 1: "0 B6 B5 B4 0 0 0 0 b"
(In B6, B5, B4, the data of B6, B5, B6 in the status register 1 at initialization is set.
Refer to Figure 20.)
Status register 2: "00h"
INT register 1: "00h"
INT register 2: "00h"
Clock correction register: "00h"
Free register: "00h"
CS
SC
K
0000
1
0
1
0 0 01 1 0 X
SIO
Fixed code
command
0 0 0000110 01
0
0
0
0
1
00
0
Write to status register 1 Read from status register 1
B5: Not reset
B5
B7
Write "1" to reset flag
and SC0.
Fixed code
command
Figure 20 Status Register 1 Data At Initialization
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
20
Low Power Supply Voltage Detection Circuit
The S-35192A has a low power supply voltage detection circuit, so that users can monitor drops in the power supply
voltage by reading the BLD flag (B1 in the status register 1). There is a hysteresis width of approx. 0.15 V (typ.) between
detection voltage and release voltage (refer to " Characteristics (Typical Data)"). The low power supply voltage
detection circuit does the sampling operation only once in one sec for 15.6 ms.
If the power supply voltage decreases to the level of detection voltage (VDET) or less, "1" is set to the BLD flag so that
sampling operation stops. Once "1" is detected in the BLD flag, no sampling operation is performed even if the power
supply voltage increases to the level of release voltage or more, and "1" is held in the BLD flag.
Furthermore, the S-35192A does not initialize the internal circuit even if "1" is set to the BLD flag. If the BLD flag is "1"
even after the power supply voltage is recovered, the internal circuit may be in the indefinite status. In this case, be sure to
initialize the circuit. Without initializing, if the next BLD flag reading is done after sampling, the BLD flag gets reset to "0". In
this case, be sure to initialize although the BLD flag is in "0" because the internal circuit may be in the indefinite status.
V
DD
BLD flag
Stop Stop Stop
Sampling pulse
Hysteresis width
0.15 V approximatel
y
BLD flag reading
Detection voltage
Release
voltage
15.6 ms
1 s 1 s
Time keeping power
supply voltage (min.)
Figure 21 Timing of Low Power Supply Voltage Detection Circuit
Circuits Power-on and Low Power Supply Voltage Detection
Figure 22 shows the changes of the POC flag and BLD flag due to VDD fluctuation.
V
DD
BLD flag
Status register 1
readin
POC flag
V
SS
Low power supply voltage
detection voltage Low power supply voltage
detection voltage
Figure 22 POC Flag and BLD Flag
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
21
Correction of Nonexistent Data and End-of-Month
When users write the real-time data, the S-35192A checks it. In case that the data is invalid, the S-35192A does the
following procedures.
1. Processing of nonexistent data
Table 11 Processing of Nonexistent Data
Register Normal Data Nonexistent Data Result
Year data 00 to 99 XA to XF, AX to FX 00
Month data 01 to 12 00, 13 to 19, XA to XF 01
Day data 01 to 31 00, 32 to 39, XA to XF 01
Day of the week data 0 to 6 7 0
Hour data*1 24-hour 0 to 23 24 to 29, 3X, XA to XF 00
12-hour 0 to 11 12 to 20, XA to XF 00
Minute data 00 to 59 60 to 79, XA to XF 00
Second data 2 00 to 59 60 to 79, XA to XF 00
*1. In 12-hour mode, write the PM/AM flag (B1 in hour data in the real-time data register).
In 24-hour mode, the PM/AM flag in the real-time data register is omitted. However in the flag of reading, users are
able to read 0; 0 to 11, 1; 12 to 23.
*2. Processing of nonexistent data, regarding second data, is done by a carry pulse which is generated in 1 second, after
writing. At this point the carry pulse is sent to the minute-counter.
2. Correction of end-of-month
A nonexistent day, such as February 30 and April 31, is set to the first day of the next month.
4g mx Hx ¢ —. Mmme Day Real-lime dara W (day of rhe week) Real-rimedara Hh(mr1)m595 HhmmOOs X X: :X X - - I Change by program Change by |NT1AE / INTZAE Alarm rime malches Rea mm flag / |NT2 flag Period when a 22 ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
22
Alarm Function
By this alarm function, the INT1 flag or the INT2 flag (B2 or B3 in the status register1) is set to "H" when the time that
users set has come.
Set up the data of day of the week, hour and minute as alarm time in the INT register 1 / 2. Refer to "4. INT register 1
and INT register 2" in " Configuration of Registers".
1. Alarm setting of "W (day of the week), H (hour), m (minute)"
INT register x alarm enable flag
AxHE = AxmE = AxWE = "1"
INT1 flag / INT2 flag
Status register 2 setting
Alarm 1 function
INT1ME
=
INT1FE = 0
Alarm 2 function
None
mx Hx Wx
INT register 1
INT register 2
Real-time data
Minute
Hour
Second
W (day of the week)
H h (m 1) m 59 s
Change by program Change by program
Read status register 1
H h m m 00 s 01 s 59 s H h (m 1) m 00 s
Real-time data
INT1AE / INT2AE
Period when alarm time matches
Change by program
Alarm time matches
Alarm output to INT1 flag
/
INT2 flag
(B3 or B2 in status register 1)
Day Year Month
Day of
the week
Minute
Hour
Second
Comparator
Figure 23 Output Timing of INT1 Flag and INT2 Flag
mx Hx Wx Dx Mx / Second Mme Hour Day Month Real-time data G Real-timedaoa (H71)h59m595 Hh00m005X01sX:__X5 sXHh01m005)(:"XHh59m59s( __ I __ CIIange by program Change by pro C nge hf yJ \NT1AE / \NTZAE J Read sla R INTW flag / |NT2 Hag ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
23
INT register x alarm enable flag
AxWE = AxmE = "0", AxHE = "1"
Comparator
Real-time data
2. Alarm setting of "H (hour)"
INT register 1
INT register 2
Status register 2 setting
Alarm 1 function
INT1ME = INT1FE = 0
Alarm 2 function
None
Day
Month Year
mx Hx Wx Dx Mx Yx
(H 1) h 59 m 59 s
Change by program Change by program
H h 00 m 00 s 01 s 59 s H h 01 m 00 s
Change by program
Period when alarm time matches
H h 59 m 59 s (H 1) h 00 m 00 s
Change by program
Real-time data
INT1 flag / INT2 flag
INT1AE / INT2AE
Read status register 1 Read status register 1
Alarm output to INT1 flag
/
INT2 flag
(B3 or B2 in status register 1)
Minute
Second
Hour
Day of
the week
Figure 24 Output Timing of INT1 Flag and INT2 Flag
Function of Clock Correction
The function of clock correction is to correct advance / delay of the clock due to the deviation of oscillation frequency, in
order to make a high precise clock. For correction, the S-35192A adjusts the clock pulse by using a certain part of the
dividing circuit, not adjusting the frequency of the quartz crystal. Correction is performed once every 20 seconds (or 60
seconds). The minimum resolution is approx. 3 ppm (or approx. 1 ppm) and the S-35192A corrects in the range of 195.3
ppm to +192.2 ppm (or of 65.1 ppm to +64.1 ppm). (Refer to Table 12.) Users can set up this function by using the clock
correction register. Regarding how to calculate the setting data, refer to "1. How to calculate". When not using this
function, be sure to set "00h".
Table 12 Function of Clock Correction
Item B0 = 0 B0 = 1
Correction Every 20 seconds Every 60 seconds
Minimum resolution 3.052 ppm 1.017 ppm
Correction range 195.3 ppm to 192.2 ppm 65.1 ppm to 64.1 ppm
3.0 pm H—F—W on 05 pp ( ( ) ( ) ( ‘0' ) on 01 pp ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
24
1. How to calculate
1. 1 If current oscillation frequency > target frequency (in case the clock is fast)
Correction value
*1
= 128 Integral value (Current oscillation frequency
actual measurement value
*2
) (Minimum resolution
*4
)
(Current oscillation frequency
actual measurement value
*2
) (Target oscillation frequency
*3
)
Caution The figure range which can be corrected is that the calculated value is from 0 to 64.
*1. Convert this value to be set in the clock correction register. For how to convert, refer to "(1) Calculation
example 1".
*2. Measurement value of a clock pulse output from the 32KO pin.
*3. Target value of average frequency when the clock correction function is used.
*4. Refer to "Table 12 Function of Clock Correction".
(1) Calculation example 1
In case of current oscillation frequency actual measurement value = 32.771 [kHz], target oscillation frequency =
32.768 [kHz], B0 = 0 (Minimum resolution = 3.052 ppm)
Correction value = 128 Integral value
()
32771 ()
32768
()
32771 ()
3.052 106
= 128
Integral value (29.99) = 128 29 = 99
Convert the correction value "99" to 7-bit binary and obtain "01100011 b".
Reverse the correction value "01100011 b" and set it to B7 to B1 of the clock correction register.
Thus, set the clock correction register:
(B7, B6, B5, B4, B3, B2, B1, B0) = (1, 1, 0, 0, 0, 1, 1, 0)
1. 2 If current oscillation frequency < target frequency (in case the clock is slow)
Correction value = Integral value (Current oscillation frequency
actual measurement value) (Minimum resolution)
(Current oscillation frequency
actual measurement value)
(Target oscillation frequency)
1
Caution The figure range which can be corrected is that the calculated value is from 0 to 62.
(1) Calculation example 2
In case of current oscillation frequency actual measurement value = 32.765 [kHz], target oscillation frequency =
32.768 [kHz]. B0 = 0 (Minimum resolution = 3.052 ppm)
Correction value = Integral value
()
32768 ()
32765
()
32765 ()
3.052 10-6 1
= Integral value (30.00) 1 = 30 1 = 31
Thus, set the clock correction register:
(B7, B6, B5, B4, B3, B2, B1, B0) = (1, 1, 1, 1, 1, 0, 0, 0)
(2) Calculation example 3
In case of current oscillation frequency actual measurement value = 32.765 [kHz], target oscillation frequency =
32.768 [kHz], B0 = 1 (Minimum resolution = 1.017 ppm)
Correction value = Integral value
()
32768 ()
32765
()
32765 ()
1.017 10-6 1
= Integral value (90.03) 1
This calculated value exceeds the correctable range 0 to 62.
B0 = "1" (minimum resolution = 1.017 ppm) indicates the correction is impossible.
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
25
2. Setting values for registers and correction values
Table 13 Setting Values for Registers and Correction Values (Minimum Resolution: 3.052 ppm (B0 = 0))
B7 B6 B5 B4 B3 B2 B1 B0 Correction Value
[ppm]
Rate
[s / day]
1 1 1 1 1 1 0 0 192.3 16.61
0 1 1 1 1 1 0 0 189.2 16.35
1 0 1 1 1 1 0 0 186.2 16.09
0 1 0 0 0 0 0 0 6.1 0.53
1 0 0 0 0 0 0 0 3.1 0.26
0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 0 3.1 0.26
0 1 1 1 1 1 1 0 6.1 0.53
1 0 1 1 1 1 1 0 9.2 0.79
0 1 0 0 0 0 1 0 189.2 16.35
1 0 0 0 0 0 1 0 192.3 16.61
0 0 0 0 0 0 1 0 195.3 16.88
Table 14 Setting Values for Registers and Correction Values (Minimum Resolution: 1.017 ppm (B0 = 1))
B7 B6 B5 B4 B3 B2 B1 B0 Correction Value
[ppm]
Rate
[s / day]
1 1 1 1 1 1 0 1 64.1 5.54
0 1 1 1 1 1 0 1 63.1 5.45
1 0 1 1 1 1 0 1 62.0 5.36
0 1 0 0 0 0 0 1 2.0 0.18
1 0 0 0 0 0 0 1 1.0 0.09
0 0 0 0 0 0 0 1 0 0
1 1 1 1 1 1 1 1 1.0 0.09
0 1 1 1 1 1 1 1 2.0 0.18
1 0 1 1 1 1 1 1 3.0 0.26
0 1 0 0 0 0 1 1 63.1 5.45
1 0 0 0 0 0 1 1 64.1 5.54
0 0 0 0 0 0 1 1 65.1 5.62
] | ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
26
Serial Interface
The S-35192A receives various commands via a 3-wire serial interface to read / write data. Regarding transmission is as
follows.
1. Data reading
When data is input from the SIO pin in synchronization with the falling of the SCK clock after setting the CS pin to "H",
the data is loaded internally in synchronization with the next rising of the SCK clock. When W / R bit = "1" is loaded at
the eighth rising of the SCK clock, the status of data reading is entered. Data corresponding to each command is then
output in synchronization with the falling of the subsequent SCK clock input. When the SCK clock is less than 8, the
IC is in the clock-wait status, and no processing is performed.
2. Data writing
When data is input from the SIO pin in synchronization with the falling of the SCK clock after setting the CS pin to "H",
the data is loaded internally in synchronization with the next rising of the SCK clock. When W/R bit = "0" is loaded at
the eighth rising of the SCK clock, the status of data writing is entered. In this status, the data, which is input in
synchronization with the falling of the subsequent SCK clock input, is written to registers according to each command.
In data writing, input a clock pulse which is equivalent to the byte of the register. As well as reading, when the SCK clock
is less than 8, the IC is in the clock-wait status, and no processing is performed.
3. Data access
3. 1 Real-time data 1 access
64
8
1
0 1 0 0 1 1 0 X
When reading: Output mode switching
CS
SCK
SIO
Year data Second data
B0B7
When reading:
Input mode switching
Fixed code
command
R / W
B0 B7
16 56
Figure 25 Real-Time Data 1 Access
— —TummmTFJJJJJJJhJJJJ_IMMUNE {m = — — 1mm ‘f— {fl 1 ‘— ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
27
3. 2 Real-time data 2 access
32
8
1
1 1 0 01 1 0 X
When reading: Output mode switching
CS
SCK
SIO
Hour data Second data
B0
B7
When reading:
Input mode switching
R / W
Minute data
B0
B7 B0
B7
Fixed code
command
16 24
Figure 26 Real-Time Data 2 Access
3. 3 Status register 1 access and status register 2 access
8
1
CS
SCK
*1
00011 0 X
When reading: Output mode switching
SIO
Status data When reading:
Input mode switching
B0
B7
R / W
16
Fixed code
command
*1. 0: Status register 1 selected
1: Status register 2 selected
Figure 27 Status Register 1 Access and Status Register 2 Access
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
28
3. 4 INT register 1 access and INT register 2 access
In read / write the INT register 1, data varies depending on the setting of the status register 2. Be sure to read / write
the INT register 1 after setting the status register 2. When setting the alarm by using the status register 2, these
registers work as 3-byte alarm-time data registers, in other statuses, they work as 1-byte free registers.
Read / write the INT register 2 after setting INT2AE in the status register 2. When INT2AE is in "1", the INT register 2
works as for setting the 3-byte alarm-time data. Regarding details of each data, refer to "4. INT register 1 and INT
register 2" in " Configuration of Register".
Caution Users cannot use both functions of alarm 1 function and the free register data simultaneously.
32
8 1
0 1 0 1 1 0 X
When reading: Output mode switching
CS
SCK
SIO
Day of the
week data
Minute data
B0
B7
When reading:
Input mode switching
*1
R / W
16 24
Hour data
B0
B7 B0
B7
Fixed code
command
*1. 0: INT register 1 selected
1: INT register 2 selected
Figure 28 INT Register 1 Access and INT Register 2 Access
8
1
CS
SCK
001011 0 X
When reading: Output mode switching
SIO
Free register data When reading:
Input mode switching
B0B7
Fixed code
command
R / W
16
Figure 29 INT Register 1 (Free Register Data) Access
WEN—— Tmmuwfiflgfl%— g;— 0: ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
29
3. 5 Clock correction register access
8
1
CS
SCK
0110 1 1 0 X
When reading: Output mode switching
SIO
Clock correction
data When reading:
Input mode switching
B0
B7
R / W
16
Fixed code
command
Figure 30 Clock Correction Register Access
3. 6 Free register access
8
1
CS
SCK
111011 0 X
When reading: Output mode switching
SIO
Free register data When reading: Input
mode switchin
g
B0B7
R / W
16
Fixed code
command
Figure 31 Free Register Access
Initialize (status register 1 B7 : 1) t Read status register 1 Set 247hour/ 127hour mode to status register 1 V Read status register 1 Confirm data in status register 1 Set realitime data 1 t Read realitime data 1‘2 OK ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
30
Flowchart of Initialization and Example of Real-time Data Set-up
Figure 32 is a recommended flowchart when the master device shifts to a normal operation status and initiates
communication with the S-35192A. Regarding how to apply power, refer to " Power-on Detection Circuit and Register
Status". It is unnecessary for users to comply with this flowchart of real-time data strictly. And if using the default data at
initializing, it is also unnecessary to set up again.
Confirm data in status
register 1
OK
Set real-time data 1
Read real-time data 1*2
Wait for 0.5 s*1
Read status re
g
ister 1
POC = 0 NO
YES
BLD = 0
YES
OK
END
Read status re
g
ister 1
Read status re
g
ister 1
NO
NO
YES
START
POC = 1
Set 24-hour / 12-hour mode
to status register 1
Initialize
(status register 1 B7 = 1)
BLD = 0
YES
Read real-time data 1
NG
Confirm data in real-time
data 1
NG
NO
*1. Do not communicate for 0.5 seconds since the power-on detection circuit is in operation.
*2. Reading the real-time data 1 should be completed within 1 second after setting the real-time data 1.
Figure 32 Example of Initialization Flowchart
9 ; _L—VDD L V33 s-35192A SIO T Q XIN XOUT mJ rm 1 Q g T :2 L # m—l ABLIC Inc. 31
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
31
Examples of Application Circuits
V
CC
XOUT
XIN
S-35192A
SIO
VSS
VDD
SCK
VSS
VCC
CPU
32KO
CS
System
power supply
C
g
10 k
10 k
Caution 1. Because the I/O pin has no protective diode on the VDD side, the relation of VCC VDD is possible.
But pay careful attention to the specifications.
2. Start communication under stable condition after power-on the power supply in the system.
Figure 33 Application Circuit 1
VSS
VCC
CPU
XOUT
XIN
S-35192A SIO
VSS
VDD
SCK
32KO
CS
System power
supply
C
g
10 k
10 k
Caution Start communication under stable condition after power-on the power supply in the system.
Figure 34 Application Circuit 2
Caution The above connection diagrams do not guarantee operation. Set the constants after performing
sufficient evaluation using the actual application.
T:Im Quartz cryslal ABLIC Inc. 32
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
32
Adjustment of Oscillation Frequency
1. Configuration of crystal oscillation circuit
Since the crystal oscillation circuit is sensitive to external noise (the clock accuracy is affected), the following measures
are essential for optimizing the configuration.
Place the S-35192A, quartz crystal, and external capacitor (Cg) as close to each other as possible.
Increase the insulation resistance between pins and the substrate wiring patterns of XIN and XOUT.
Do not place any signal or power lines close to the crystal oscillation circuit.
Locating the GND layer immediately below the crystal oscillation circuit is recommended.
Locate the bypass capacitor adjacent to the power supply pin of the S-35192A.
S-35192A
XOUT
XIN
R
f
= 100 M
(typ.)
R
d
= 100 k (typ.)
C
d
= 8 pF (typ.)
C
g
C
d
R
d
R
f
Quartz crystal: 32.768 kHz
C
L
= 6 pF
*1
C
g
= None
*2
to 9.1 pF
Parasitic capacitance
*3
Parasitic capacitance
*3
*1. When setting the value for the quartz crystal's CL as 7 pF, connect Cd externally if necessary.
*2. The crystal oscillation circuit operates even when Cg is not connected. Note that the oscillation frequency is in the
direction that it advances.
*3. Design the board so that the parasitic capacitance is within 5 pF.
Figure 35 Connection Diagram 1
XIN
Quartz crystal
XOUT
VSS
C
g
8
7
6
5
1
2
3
4
S-35192A
Locate the GND layer in the
layer immediately below
Figure 36 Connection Diagram 2
Caution 1. When using the quartz crystal with a CL exceeding the rated value (7 pF) (e.g : CL = 12.5 pF),
oscillation operation may become unstable. Use a quartz crystal with a CL value of 6 pF or 7 pF.
2. Oscillation characteristics are subject to the variation of each component such as substrate
parasitic capacitance, parasitic resistance, quartz crystal, and Cg. When configuring a crystal
oscillaiton circuit, pay sufficient attention for them.
o/c Lg ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
33
2. Measurement of oscillation frequency
When the S-35192A is turned on, a signal of 32.768 Hz is output from the 32KO pin. Turn the power on and measure the
signal with a frequency counter following the circuit configuration shown in Figure 37.
Remark If the error range is 1 ppm in relation to 32.768 kHz, the time is shifted by approximately 2.6 seconds per
month (calculated using the following expression).
10–6 (1 ppm) 60 seconds 60 minutes 24 hours 30 days 2.592 seconds
32KO
SIO
SCK
CS
S-35192A
VDD
XOUT
XIN
VSS
C
g
10 kΩ
10 kΩ
10 kΩ
Frequency
counter
Open
Figure 37 Configuration of Oscillation Frequency Measurement Circuit
Caution Use a high-accuracy frequency counter of 7 digits or more.
IIIIIIIII
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
34
3. Adjustment of oscillation frequency
3. 1 Adjustment by setting Cg
Matching of the quartz crystal with the nominal frequency must be performed with the parasitic capacitance on the
board included. Select a quartz crystal and optimize the Cg value in accordance with the flowchart below.
START
END
YES
NO
YES
NO
NO
YES
NO
YES
Set to center
of variable
capacitance
*3
Select a quartz crystal
*1
Variable
capacitance
Change C
g
Optimal
value
*2
Frequency
C
g
in
specification
Set C
g
Make fine adjustment
of frequency using
variable capacitance
Trimmer capacitor
Fixed capacitor
*1. Request a quartz crystal manufacturer for a matching evaluation between the IC and the quartz crystal. The
recommended quartz crystal characteristic values are, CL value (load capacitance) = 6 pF, R1 value (equivalent
serial resistance) = 50 k max.
*2. The Cg value must be selected on the actual PCB since it is affected by parasitic capacitance. Select the
external Cg value in a range of 0 pF to 9.1 pF.
*3. Adjust the rotation angle of the variable capacitance so that the capacitance value is slightly smaller than the
center, and confirm the oscillation frequency and the center value of the variable capacitance. This is done in
order to make the capacitance of the center value smaller than one half of the actual capacitance value because
a smaller capacitance value increases the frequency variation.
Figure 38 Quartz Crystal Setting Flow
Caution 1. The oscillation frequency varies depending on the ambient temperature and power supply
voltage. Refer to " Characteristics (Typical Data)".
2. The 32.768 kHz quartz crystal operates more slowly at an operating temperature higher or
lower than20C to 25C. Therefore, it is recommended to set the oscillator to operate
slightly faster at normal temperature.
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
35
Precautions
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
DD f ABLIC Inc.
3-WIRE REAL-TIME CLOCK
S-35192A Rev.3.2_04
36
Characteristics (Typical Data)
1. Standby current vs. VDD characteristics 2. Current consumption
vs. Input clock characteristics
Ta = 25C, CL = 6 pF Ta = 25C, CL = 6 pF
0 5 6
1.0
0.8
0.6
0.4
0.2
0
V
DD
[V]
I
DD1
[A]
1 2 3 4
0
30
25
20
15
10
5
0
IDD2
[A]
200 400
600 800 1000
VDD = 5.0 V
VDD = 3.0 V
SCK frequency [kHz]
3. Standby current
vs. Temperature characteristics
4. Standby current vs. Cg characteristics
CL = 6 pF Ta = 25C, CL = 6 pF
－40 75 85
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Ta [C]
I
DD1
[A]
－25 0 25 50
V
DD
= 5.0 V
V
DD
= 3.0 V
0 6 8 10
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
DD1
[A]
24
C
g
[pF]
V
DD
= 5.0 V
V
DD
= 3.0 V
5. Oscillation frequency vs. C
g
characteristics 6. Oscillation frequency vs. VDD characteristics
Ta = 25C, CL = 6 pF Ta = 25C, Cg = 7.5 pF
100
80
60
40
20
0
–20
–40
–60
–80
–100
f/f
[ppm]
0 2 4 6
C
g
[pF]
8 10
V
DD
= 5.0 V
V
DD
= 3.0 V
50
40
30
20
10
0
10
20
30
40
50
f/
f
[ppm]
0 5 6
VDD [V]
1 2 3 4
ABLIC Inc.
3-WIRE REAL-TIME CLOCK
Rev.3.2_04 S-35192A
37
7. Oscillation frequency
vs. Temperature characteristics
8. Oscillation start time vs. Cg characteristics
C
g
= 7.5 pF Ta = 25C
20
0
–20
–40
–60
–80
–100
–120
–140
f/f
[ppm]
–40 75 85
Ta [C]
–25 0 25 50
V
DD
= 5.0 V
V
DD
= 3.0 V
0
500
450
400
350
300
250
200
150
100
50
0
tSTA
[ms]
28 10
4 6
Cg [pF]
VDD = 5.0 V
VDD = 3.0 V
9. Output current characteristics 1 (VOUT vs. IOL1) 10. Output current characteristics 2 (VOUT vs. IOL2)
32KO pin, Ta = 25C SIO pin, Ta = 25C
0
50
40
30
20
10
0
I
OL1
[mA]
1 2 3 4
V
OUT
[V]
V
DD
= 5.0 V
V
DD
= 3.0 V
0
50
40
30
20
10
0
IOL2
[mA]
0.5 1 1.5 2
VOUT [V]
2.5
VDD = 5.0 V
VDD = 3.0 V
11. CS pin input current characteristics 12. BLD detection, release voltage, VDDT (min.)
vs. temperature characteristics
CS pin, Ta = 25C CL = 6 pF
800
700
600
500
400
300
200
100
0
I
IH
[A]
0 5 6
V
IN
[V]
1 23 4
V
DD
= 5.0 V
V
DD
= 3.0 V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
BLD
[V]
40 75 85
25 0 25 50
Ta [ C]
Release voltage
VDDT (min.)
Detection voltage
(01) ‘E 2.23:0.04 2.461003 Lw 2) W
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
1.97±0.03
0.2±0.05
0.48±0.02
0.08
mm
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.1
No. PH008-A-P-SD-2.1
0.5
+0.05
-0.02
123 4
56
78
20 00 ’7‘ g‘ *11 “fig/“G 91’@”’€1}¢ :1 1111111111 1? N0. PHOOS-A—C-SD-ZD
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PH008-A-C-SD-2.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-2.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
N0. PHOOB-A-R—SD-1.0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
mm
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
++<——>¢» X 7DFI\5 JWWEIIEELI<7£§u a="" x="" ‘j‘7'="" v¢911274fm5=""><7£éu 3&3="" we—il="" lea‘fl:="" ml?="" mfilmwa’mmae="" 14’;ch="" (="" fzéu="" meefiimvlly—p}z="" hteweaesy="" fi\5—/§fib\b="" h‘fl-="" l‘l’="" (="" fzéu="" 7zo§hdfi4xtbfidfiei15=""> F/(fi-‘zéfibfl’r < fiéua="" fiflfll:="" "="" li-y‘r-9fsev)$§|%"="" 2853.1?="">< fiélm,="" x="" iiiifififiléfiflgm!="" .="" a="" x="" ifimfilfifié‘fiififfifififii="" 9="" iii="" 1.="" “mehemem‘feedbiqn‘="" fiifl.="" 1v="" efifi‘r="" fifitmlfiflll!="" (mfifilfilfifl)="" week="" 0‘03="" mm="" blt.="" 33‘="" iflmfiflrfiiflfiflfiimsfififiiwfi.="" 4.="" manama:="" "snt="" fifiaqfiflmfi“.="" n0.="" phoos-a-l-sd—4.1="">
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
SNT-8A-A
-Land Recommendation
PH008-A-L-SD-4.1
0.3
0.2
0.52
2.01
0.52
No. PH008-A-L-SD-4.1
Caution 1. Do not do silkscreen printing and solder printing under the mold resin of the package.
2. The thickness of the solder resist on the wire pattern under the package should be 0.03 mm
or less from the land pattern surface.
3. Match the mask aperture size and aperture position with the land pattern.
4. Refer to "SNT Package User's Guide" for details.
1. (0.25 mm min. / 0.30 mm typ.)
2. (1.96 mm ~ 2.06 mm)
1.
2. 0.03 mm
3.
4. SNT
1. Pay attention to the land pattern width (0.25 mm min. / 0.30 mm typ.).
2. Do not widen the land pattern to the center of the package (1.96 mm to 2.06mm).
1
2
1.
2. (1.96 mm ~ 2.06 mm)
(0.25 mm min. / 0.30 mm typ.)
Disclaimers (Handling Precautions)
1. All the information described herein
(product data,
specifications,
figures,
tables,
programs,
algorithms and application
circuit examples,
etc.)
is current as of publishing date of this document and is subject to change without notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not responsible for damages caused by the reasons other than the products described herein
(hereinafter "the products") or infringement of third-party intellectual property right and any other right due to the use
of the information described herein.
3. ABLIC Inc. is not responsible for damages caused by the incorrect information described herein.
4. Be careful to use the products within their specified ranges. Pay special attention to the absolute maximum ratings,
operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not responsible for damages caused by failures and / or accidents, etc. that occur due to the use of the
products outside their specified ranges.
5. When using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products must not be used or provided (exported) for the purposes of the development of weapons of mass
destruction or military use. ABLIC Inc. is not responsible for any provision (export) to those whose purpose is to
develop, manufacture, use or store nuclear, biological or chemical weapons, missiles, or other military use.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses. Do
not apply the products to the above listed devices and equipments without prior written permission by ABLIC Inc.
Especially, the products cannot be used for life support devices, devices implanted in the human body and devices
that directly affect human life, etc.
Prior consultation with our sales office is required when considering the above uses.
ABLIC Inc. is not responsible for damages caused by unauthorized or unspecified use of our products.
9. Semiconductor products may fail or malfunction with some probability.
The user of the products should therefore take responsibility to give thorough consideration to safety design including
redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing injury or
death, fires and social damage, etc. that may ensue from the products' failure or malfunction.
The entire system must be sufficiently evaluated and applied on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc.
The information described herein does not convey any license under any intellectual property rights or any other
rights belonging to ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any
part of this document described herein for the purpose of disclosing it to a third-party without the express permission
of ABLIC Inc. is strictly prohibited.
14. For more details on the information described herein, contact our sales office.
2.2-2018.06
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