EPCOS - TDK Electronics 的 B72862F1050S160 规格书

@TDK
CTVS
Ceramic transient voltage suppressors
SMD multilayer transient voltage suppressors,
ESD/ EMI filters
Series/Type: B72862F1050S160
Date: December 2019
© TDK Electronics AG 2019. Reproduction, publication and dissemination of this publication, enclosures hereto
and the information contained therein without TDK Electronics' prior express consent is prohibited.
EPCOS type designation system for ESD/EMI filters
CA 04 F2 FT 5 AUD 010 G
Construction:
CA Chip array
with nickel barrier
termination
(AgNiSn)
Case sizes:
04 04x052-fold array
Number of lines per component:
F2 EMI filter with 2 lines
Filter design:
FT Feedthrough type
Maximum DC operating voltage:
55 V DC
EMI filter application:
AUD Suitable for audio applications
Minimum cut-off frequency:
10 10 MHz
Taping mode:
G180-mm reel
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
Page 2 of 29Please read Cautions and warnings and
Important notes at the end of this document.
Features
High attenuation in a wide frequency range covering
GSM, UMTS, GPRS, WLAN, Bluetooth and GPS
ESD robustness acc. to IEC 61000-4-2 level 4 on
input and output ports
Up to 20 component functions integrated in one
package
Low DC leakage currents
Bidirectional protection
Low inductance due to common ground contacts
High frequency stability versus temperature
RoHS-compatible
Applications
Reliable ESD/EMI filtering of audio lines (2-fold
array), mobile phones, PDAs, notebooks
Design
Multilayer technology
0405/1014 EIA/mm case sizes
Nickel barrier termination (AgNiSn) recommended
for lead-free soldering (see “Soldering directions”)
Lack of plastic or epoxy encapsulation for
flammability rating better than UL 94 V-0
Typical frequency characteristic curves
Typical frequency characteristic curves are attached to
the data sheet.
Array
Internal circuits
2-fold array with common
ground
Available case sizes:
EIA Metric Version
0405 1014 2-fold array
General technical data
Maximum DC operating voltage VDC,max 5 V
Contact discharge ESD capability to IEC 61000-4-2 VESD,contact 8 kV
Air discharge ESD capability to IEC 61000-4-2 VESD,air 15 kV
Minimum cut-off frequency (3 dB, 50 Ω, 0 V) fcut-off,min 10 MHz
Typical resonance frequency (50 Ω, 0 V) fres,typ 900 MHz
Maximum response time tresp,max 0.5 ns
Operating temperature (without derating) Top 40/+85 °C
Storage temperature LCT/UCT 40/+125 °C
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Temperature derating
Climatic category: 40/+85 °C
Electrical specifications and ordering codes - filter characteristics
Type Ordering code Cline,min
(1 MHz,
0.5 V)
pF
Cline,typ
(1 MHz,
0.5 V)
pF
Cline,max
(1 MHz,
0.5 V)
pF
RS,typ
Ω
CA04F2FT5AUD010G B72862F1050S160 189 270 351 0.2
Type Ordering code fcut-off,min
(3 dB,
50 Ω, 0 V)
MHz
fcut-off,typ
(3 dB,
50 Ω, 0 V)
MHz
fres,typ
(50 Ω, 0 V)
MHz
Typical 20 dB
attenuation
band
(50 Ω, 0 V)
MHz
CA04F2FT5AUD010G B72862F1050S160 10 25 900 200 ... 4000
ESD protection specifications
Type Version VV,min
(1 mA)
V
VV,typ
(1 mA)
V
Ileak,typ
(Vop = 3 V)
µA
Ileak,max
(Vop = 3 V)
µA
CA04F2FT5AUD010G 2-fold 8 10 0.05 1
Note
αtyp [dB] see curves for typical frequency characteristics for ESD/ EMI series at the end of the data
sheet.
Further application specific types available upon request.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Dimensional drawings
0405, 2-fold array with common
ground
Dimensions in mm
Case size 0405/1014
Tolerance
l 1.37 ±0.15
w 1.00 +0/0.15
h 0.65 max.
e 0.64 Ref.
d1 0.36 ±0.10
d2 0.20 ±0.10
k1 0.36 ±0.15
k2 0.20 ±0.15
Recommended solder pad layout
0405, 2-fold array with common ground
Dimensions in mm
Case size
EIA / mm
A B C D E F H I
0405 / 1014 0.40 0.55 1.04 0.60 0.70 1.70 0.40 0.64
EIA sizes: 1/100 inch
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ESD/ EMI filter series
Page 5 of 29Please read Cautions and warnings and
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Delivery mode
EIA case size Taping Reel size
mm
Packing unit
pcs.
Type Ordering code
0405 Cardboard 180 5000 CA04F2FT5AUD010G B72862F1050S160
Typical frequency characteristics
CA04F2FT5AUD010G
Measurement setup:
Network analyzer HP8573D with 50 Ωimpedance reference. Calibration procedure with full 4 port
S-O-L-T in-fixture cal kit. Measurement test boards are available on request.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Taping and packing
1 Taping and packing for SMD components
1.1 Blister tape (taping to IEC 60286-3)
Dimensions in mm
8-mm tape 12-mm tape
Case size (inch/mm) Case size (inch/mm) Tolerance
0508/
1220
0612/
1632
1012/
2532
0603/
1608
0506/
1216
0805/
2012
1206/
3216
1210/
3225
1812/
4532
2220/
5750
A00.9 ±0.10 1.50 1.50 1.80 2.80 3.50 5.10 ±0.20
B01.75 ±0.10 1.80 2.30 3.40 3.50 4.80 6.00 ±0.20
K01.0 0.80 1.80 3.40 max.
T 0.30 0.30 max.
T21.3 1.20 2.50 3.90 max.
D01.50 1.50 +0.10/0
D10.3 1.50 min.
P04.00 4.00 ±0.101)
P22.00 2.00 ±0.05
P14.00 8.00 ±0.10
W 8.00 12.00 ±0.30
E 1.75 1.75 ±0.10
F 3.50 5.50 ±0.05
G 0.75 0.75 min.
1) ≤±0.2 mm over 10 sprocket holes.
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Page 7 of 29Please read Cautions and warnings and
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Part orientation in tape pocket for blister tape
For discrete chip, EIA case sizes 0603, 0805,
1206, 1210, 1812 and 2220
For array, EIA case size 0612
For arrays, EIA case sizes 0506 and 1012 For filter array, EIA case size 0508
Additional taping information
Reel material Polystyrol (PS)
Tape material Polystyrol (PS) or Polycarbonat (PC) or PVC
Tape break force min. 10 N
Top cover tape strength min. 10 N
Top cover tape peel force 0.1 to 1.0 N for 8-mm tape and 0.1 to 1.3 N for
12-mm tape at a peel speed of 300 mm/min
Tape peel angle Angle between top cover tape and the direction of feed
during peel off: 165°to 180°
Cavity play Each part rests in the cavity so that the angle between
the part and cavity center line is no more than 20°
ESD/ EMI filters B72862F1050S160
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Page 8 of 29Please read Cautions and warnings and
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1.2 Cardboard tape (taping to IEC 60286-3)
Dimensions in mm
8-mm tape
Case size (inch/mm) Case size
(inch/mm) Tolerance
0201/0603 0402/1005 0405/1012 0603/1608 1003/2508 0508/1220
A00.38 ±0.05 0.60 1.05 0.95 1.00 1.60 ±0.20
B00.68 ±0.05 1.15 1.60 1.80 2.85 2.40 ±0.20
T 0.42 ±0.02 0.60 0.75 0.95 0.95 0.95 max.
T20.4 min. 0.70 0.90 1.10 1.10 1.10 max.
D01.50 ±0.1 1.50 1.50 +0.10/0
P04.00 ±0.102)
P22.00 ±0.05
P12.00 ±0.05 2.00 4.00 4.00 4.00 4.00 ±0.10
W 8.00 ±0.30
E 1.75 ±0.10
F 3.50 ±0.05
G 0.75 min.
2) ≤0.2 mm over 10 sprocket holes.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
Page 9 of 29Please read Cautions and warnings and
Important notes at the end of this document.
Part orientation in tape pocket for cardboard tape
For discrete chip, EIA case sizes 0201, 0402,
0603 and 1003
For array, EIA case size 0405
For array, EIA case size 0508 For filter array, EIA case size 0405
Additional taping information
Reel material Polystyrol (PS)
Tape material Cardboard
Tape break force min. 10 N
Top cover tape strength min. 10 N
Top cover tape peel force 0.1 to 1.0 N at a peel speed of 300 mm/min
Tape peel angle Angle between top cover tape and the direction of feed
during peel off: 165°to 180°
Cavity play Each part rests in the cavity so that the angle between
the part and cavity center line is no more than 20°
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
Page 10 of 29Please read Cautions and warnings and
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1.3 Reel packing
Dimensions in mm
8-mm tape 12-mm tape
180-mm reel 330-mm reel 180-mm reel 330-mm reel
A 180 +0/3 330 +0/2.0 180 +0/3 330 +0/2.0
W18.4 +1.5/0 8.4 +1.5/0 12.4 +1.5/0 12.4 +1.5/0
W214.4 max. 14.4 max. 18.4 max. 18.4 max.
Leader, trailer
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1.4 Packing units for discrete chip and array chip
Case size Chip thickness Cardboard tape Blister tape ∅180-mm reel ∅330-mm reel
inch/mm th W Wpcs. pcs.
0201/0603 0.33 mm 8 mm 15000
0402/1005 0.6 mm 8 mm 10000 50000
0405/1012 0.7 mm 8 mm 5000
0506/1216 0.5 mm 8 mm 4000
0508/1220 0.9 mm 8 mm 8 mm 4000
0603/1608 0.9 mm 8 mm 8 mm 4000 16000
0612/1632 0.7 mm 8 mm 3000
0805/2012 0.7 mm 8 mm 3000
0.9 mm 8 mm 3000 12000
1.3 mm 8 mm 3000 12000
1003/2508 0.9 mm 8 mm 4000
1012/2532 1.0 mm 8 mm 2000
1206/3216 0.9 mm 8 mm 3000
1.3 mm 8 mm 3000 12000
1.4 mm 8 mm 2000 8000
1.6 mm 8 mm 2000 8000
1210/3225 0.9 mm 8 mm 3000
1.3 mm 8 mm 3000 12000
1.4 mm 8 mm 2000 8000
1.6 mm 8 mm 2000 8000
1812/4532 1.3 mm 12 mm 1500
1.4 mm 12 mm 1000
1.6 mm 12 mm 1000 4000
2.0 mm 12 mm 3000
2.3 mm 12 mm 3000
2220/5750 1.3 mm 12 mm 1500
1.4 mm 12 mm 1000
1.6 mm 12 mm 1000
2.0 mm 12 mm 3000
2.3 mm 12 mm 3000
2.7 mm 12 mm 600
3.0 mm 12 mm 600
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Important notes at the end of this document.
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2 Delivery mode for leaded SHCV varistors
Standard delivery mode for SHCV types is bulk. Alternative taping modes (AMMO pack or taped
on reel) are available upon request.
Packing units for:
Type Pieces
SR6 2000
SR1 / SR2 1000
For types not listed in this data book please contact EPCOS.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Soldering directions
1 Terminations and soldering methods
1.1 Nickel barrier termination
The nickel barrier layer of the silver/nickel/tin termination prevents leaching of the silver base met-
allization layer. This allows great flexibility in the selection of soldering parameters. The tin pre-
vents the nickel layer from oxidizing and thus ensures better wetting by the solder. The nickel bar-
rier termination is suitable for lead-free soldering, as well as for other commonly-used soldering
methods.
Multilayer CTVS: Structure of nickel barrier termination
1.2 Silver-platinum termination
Silver-platinum terminations are mainly used for the large EIA case sizes 1812 and 2220. The sil-
ver-platinum termination is approved for reflow soldering, SnPb soldering and lead-free soldering
with a silver containing solder paste. In case of SnPb soldering, a solder paste Sn62Pb36Ag2 is
recommended. For lead-free reflow soldering, a solder paste SAC, e.g. Sn95.5Ag3.8Cu0.7, is
recommended.
Multilayer varistor: Structure of silver-platinum termination
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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@TDK
1.3 Silver-palladium termination
Silver-palladium terminations are designed for the use of conductive adhesivs. Lead-free reflow
soldering does not form a proper solder joint. In general reflow or wave soldering is not recom-
mended.
1.4 Tinned iron wire
All SHCV types with tinned terminations are suitable for lead-free and SnPb soldering.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Important notes at the end of this document.
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2 Recommended soldering temperature profiles
2.1 Reflow soldering temperature profile
Temperature ranges for reflow soldering acc. to IEC 60068-2-58 recommendations.
Profile feature Sn-Pb eutectic assembly Pb-free assembly
Preheat and soak
- Temperature min Tsmin 100 °C 150 °C
- Temperature max Tsmax 150 °C 200 °C
- Time tsmin to tsmax 60 ... 120 s 60 ... 120 s
Average ramp-up rate Tsmax to Tp3°C/ s max. 3 °C/ s max.
Liquidous temperature TL183 °C 217 °C
Time at liquidous tL40 ... 150 s 40 ... 150 s
Peak package body temperature Tp215 °C ... 260 °C1) 235 °C ... 260 °C
Time above (TP5°C) tp10 ... 40 s 10 ... 40 s
Average ramp-down rate Tpto Tsmax 6°C/ s max. 6 °C/ s max.
Time 25 °C to peak temperature max. 8 minutes max. 8 minutes
1) Depending on package thickness.
Notes: All temperatures refer to topside of the package, measured on the package body
surface.
Number of reflow cycles: 3
Iron soldering should be avoided, hot air methods are recommended for repair
purposes.
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ESD/ EMI filter series
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2.2 Wave soldering temperature profile
Temperature characteristics at component terminal with dual-wave soldering
3 Solder joint profiles / solder quantity
3.1 Nickel barrier termination
If the meniscus height is too low, that means the solder quantity is too low, the solder joint may
break, i.e. the component becomes detached from the joint. This problem is sometimes interpret-
ed as leaching of the external terminations.
If the solder meniscus is too high, i.e. the solder quantity is too large, the vise effect may occur.
As the solder cools down, the solder contracts in the direction of the component. If there is too
much solder on the component, it has no leeway to evade the stress and may break, as in a vise.
The figures below show good and poor solder joints for dual-wave and infrared soldering.
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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3.1.1 Solder joint profiles for nickel barrier termination - dual-wave soldering
Good and poor solder joints caused by amount of solder in dual-wave soldering.
3.1.2 Solder joint profiles for nickel barrier termination / silver-platinum termination
- reflow soldering
Good and poor solder joints caused by amount of solder in reflow soldering.
ESD/ EMI filters B72862F1050S160
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4 Solderability tests
Test Standard Test conditions
Sn-Pb soldering
Test conditions
Pb-free soldering
Criteria/ test results
Wettability IEC
60068-2-58
Immersion in
60/40 SnPb solder
using non-activated
flux at 215 ±3°C for
3±0.3 s
Immersion in
Sn96.5Ag3.0Cu0.5
solder using non- or
low activated flux
at 245 ±5°C
for 3 ±0.3 s
Covering of 95% of
end termination,
checked by visual
inspection
Leaching
resistance
IEC
60068-2-58
Immersion in
60/40 SnPb
solder using
mildly activated flux
without preheating
at 260 ±5°C
for 10 ±1 s
Immersion in
Sn96.5Ag3.0Cu0.5
solder using non- or
low activated flux
without preheating
at 255 ±5°C
for 10 ±1 s
No leaching of
contacts
Thermal shock
(solder shock)
Dip soldering at
300 °C/5 s
Dip soldering at
300 °C/5 s
No deterioration of
electrical parameters.
Capacitance change:
∆C/C0≤15%
Tests of resistance
to soldering heat
for SMDs
IEC
60068-2-58
Immersion in
60/40 SnPb for 10 s
at 260 °C
Immersion in
Sn96.5Ag3.0Cu0.5
for 10 s at 260 °C
Change of varistor
voltage:
∆V/V (1 mA)≤5%
Tests of resistance
to soldering heat
for radial leaded
components
(SHCV)
IEC
60068-2-20
Immersion
of leads in
60/40 SnPb
for 10 s at 260 °C
Immersion
of leads in
Sn96.5Ag3.0Cu0.5
for 10 s at 260 °C
Change of varistor
voltage: ∆V/V (1
mA)≤5%
Change of
capacitance X7R:
≤5/+10%
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Note:
Leaching of the termination
Effective area at the termination might be lost if the soldering temperature and/or immersion time
are not kept within the recommended conditions. Leaching of the outer electrode should not ex-
ceed 25% of the chip end area (full length of the edge A-B-C-D) and 25% of the length A-B,
shown below as mounted on substrate.
As a single chip As mounted on substrate
5 Notes for proper soldering
5.1 Preheating and cooling
According to IEC 60068-2-58. Please refer to section 2 of this chapter.
5.2 Repair/ rework
Manual soldering with a soldering iron must be avoided, hot-air methods are recommended for
rework purposes.
5.3 Cleaning
All environmentally compatible agents are suitable for cleaning. Select the appropriate cleaning
solution according to the type of flux used. The temperature difference between the components
and cleaning liquid must not be greater than 100 °C. Ultrasonic cleaning should be carried out
with the utmost caution. Too high ultrasonic power can impair the adhesive strength of the metal-
lized surfaces.
5.4 Solder paste printing (reflow soldering)
An excessive application of solder paste results in too high a solder fillet, thus making the chip
more susceptible to mechanical and thermal stress. Too little solder paste reduces the adhesive
strength on the outer electrodes and thus weakens the bonding to the PCB. The solder should be
applied smoothly to the end surface.
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5.5 Selection of flux
Used flux should have less than or equal to 0.1 wt % of halogenated content, since flux residue
after soldering could lead to corrosion of the termination and/or increased leakage current on the
surface of the component. Strong acidic flux must not be used. The amount of flux applied should
be carefully controlled, since an excess may generate flux gas, which in turn is detrimental to sol-
derability.
5.6 Storage of CTVSs
Solderability is guaranteed for one year from date of delivery for multilayer varistors, CeraDiodes
and ESD/EMI filters (half a year for chips with AgPt terminations) and two years for SHCV compo-
nents, provided that components are stored in their original packages.
Storage temperature: 25 °C to +45 °C
Relative humidity: ≤75% annual average, ≤95% on 30 days a year
The solderability of the external electrodes may deteriorate if SMDs and leaded components are
stored where they are exposed to high humidity, dust or harmful gas (hydrogen chloride, sulfurous
acid gas or hydrogen sulfide).
Do not store SMDs and leaded components where they are exposed to heat or direct sunlight.
Otherwise the packing material may be deformed or SMDs/ leaded components may stick togeth-
er, causing problems during mounting.
After opening the factory seals, such as polyvinyl-sealed packages, it is recommended to use the
SMDs or leaded components as soon as possible.
Solder CTVS components after shipment from TDK Electronics within the time specified:
CTVS with Ni barrier termination: 12 months
CTVS with AgPt termination: 6 months
SHCV (leaded components): 24 months
5.7 Placement of components on circuit board
Especially in the case of dual-wave soldering, it is of advantage to place the components on the
board before soldering in that way that their two terminals do not enter the solder bath at different
times.
Ideally, both terminals should be wetted simultaneously.
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5.8 Soldering cautions
An excessively long soldering time or high soldering temperature results in leaching of the outer
electrodes, causing poor adhesion and a change of electrical properties of the varistor due to the
loss of contact between electrodes and termination.
Keep the recommended down-cooling rate.
5.9 Standards
CECC 00802
IEC 60068-2-58
IEC 60068-2-20
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Symbols and terms
For ceramic transient voltage suppressors (CTVS)
Symbol Term
Cline,max Maximum capacitance per line
Cline,min Minimum capacitance per line
Cline,typ Typical capacitance per line
Cmax Maximum capacitance
Cmin Minimum capacitance
Cnom Nominal capacitance
∆Cnom Tolerance of nominal capacitance
Ctyp Typical capacitance
fcut-off,max Maximum cut-off frequency
fcut-off,min Minimum cut-off frequency
fcut-off,typ Typical cut-off frequency
fres,typ Typical resonance frequency
I Current
Iclamp Clamping current
Ileak Leakage current
Ileak,max Maximum leakage current
Ileak,typ Typical leakage current
IPP Peak pulse current
Isurge,max Maximum surge current (also termed peak current)
LCT Lower category temperature
Ltyp Typical inductance
Pdiss,max Maximum power dissipation
PPP Peak pulse power
Rins Insulation resistance
Rmin Minimum resistance
RSResistance per line
RS,typ Typical resistance per line
TAAmbient temperature
Top Operating temperature
Top,max Maximum operating temperature
Tstg Storage temperature
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Symbol Term
trDuration of equivalent rectangular wave
tresp Response time
tresp,max Maximum response time
UCT Upper category temperature
V Voltage
VBR,min Minimum breakdown voltage
Vclamp,max Maximum clamping voltage
VDC,max Maximum DC operating voltage (also termed working voltage)
VESD,air Air discharge ESD capability
VESD,contact Contact discharge ESD capability
Vjump Maximum jump-start voltage
VRMS,max Maximum AC operating voltage, root-mean-square value
VVVaristor voltage (also termed breakdown voltage)
VLD Maximum load dump voltage
Vleak Measurement voltage for leakage current
VV,min Minimum varistor voltage
VV,max Maximum varistor voltage
∆VVTolerance of varistor voltage
WLD Maximum load dump energy
Wmax Maximum energy absorption (also termed transient energy)
αtyp Typical insertion loss
tan δDissipation factor
Lead spacing
*Maximum possible application conditions
All dimensions are given in mm.
The commas used in numerical values denote decimal points.
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Cautions and warnings
General
Some parts of this publication contain statements about the suitability of our ceramic transient
voltage suppressor (CTVS) components (multilayer varistors (MLVs)), CeraDiodes, ESD/EMI fil-
ters, leaded transient voltage/ RFI suppressors (SHCV types)) for certain areas of application, in-
cluding recommendations about incorporation/design-in of these products into customer applica-
tions. The statements are based on our knowledge of typical requirements often made of our
CTVS devices in the particular areas. We nevertheless expressly point out that such statements
cannot be regarded as binding statements about the suitability of our CTVS components for a
particular customer application. As a rule, EPCOS is either unfamiliar with individual customer ap-
plications or less familiar with them than the customers themselves. For these reasons, it is al-
ways incumbent on the customer to check and decide whether the CTVS devices with the proper-
ties described in the product specification are suitable for use in a particular customer applica-
tion.
Do not use EPCOS CTVS components for purposes not identified in our specifications,
application notes and data books.
Ensure the suitability of a CTVS in particular by testing it for reliability during design-in. Always
evaluate a CTVS component under worst-case conditions.
Pay special attention to the reliability of CTVS devices intended for use in safety-critical
applications (e.g. medical equipment, automotive, spacecraft, nuclear power plant).
Design notes
Always connect a CTVS in parallel with the electronic circuit to be protected.
Consider maximum rated power dissipation if a CTVS has insufficient time to cool down
between a number of pulses occurring within a specified isolated time period. Ensure that
electrical characteristics do not degrade.
Consider derating at higher operating temperatures. Choose the highest voltage class
compatible with derating at higher temperatures.
Surge currents beyond specified values will puncture a CTVS. In extreme cases a CTVS will
burst.
If steep surge current edges are to be expected, make sure your design is as low-inductance
as possible.
In some cases the malfunctioning of passive electronic components or failure before the end of
their service life cannot be completely ruled out in the current state of the art, even if they are
operated as specified. In applications requiring a very high level of operational safety and
especially when the malfunction or failure of a passive electronic component could endanger
human life or health (e.g. in accident prevention, life-saving systems, or automotive battery line
applications such as clamp 30), ensure by suitable design of the application or other measures
(e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by
third parties in the event of such a malfunction or failure. Only use CTVS components from the
automotive series in safety-relevant applications.
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@TDK
Specified values only apply to CTVS components that have not been subject to prior electrical,
mechanical or thermal damage. The use of CTVS devices in line-to-ground applications is
therefore not advisable, and it is only allowed together with safety countermeasures like
thermal fuses.
Storage
Only store CTVS in their original packaging. Do not open the package prior to processing.
Storage conditions in original packaging: temperature 25 to +45°C, relative humidity ≤75%
annual average, maximum 95%, dew precipitation is inadmissible.
Do not store CTVS devices where they are exposed to heat or direct sunlight. Otherwise the
packaging material may be deformed or CTVS may stick together, causing problems during
mounting.
Avoid contamination of the CTVS surface during storage, handling and processing.
Avoid storing CTVS devices in harmful environments where they are exposed to corrosive
gases for example (SOx, Cl).
Use CTVS as soon as possible after opening factory seals such as polyvinyl-sealed packages.
Solder CTVS components after shipment from EPCOS within the time specified:
CTVS with Ni barrier termination, 12 months
CTVS with AgPt termination, 6 months
SHCV, 24 months
Handling
Do not drop CTVS components and allow them to be chipped.
Do not touch CTVS with your bare hands - gloves are recommended.
Avoid contamination of the CTVS surface during handling.
Washing processes may damage the product due to the possible static or cyclic mechanical
loads (e.g. ultrasonic cleaning). They may cause cracks to develop on the product and its parts,
which might lead to reduced reliability or lifetime.
Mounting
When CTVS devices are encapsulated with sealing material or overmolded with plastic
material, electrical characteristics might be degraded and the life time reduced.
Make sure an electrode is not scratched before, during or after the mounting process.
Make sure contacts and housings used for assembly with CTVS components are clean before
mounting.
The surface temperature of an operating CTVS can be higher. Ensure that adjacent
components are placed at a sufficient distance from a CTVS to allow proper cooling.
Avoid contamination of the CTVS surface during processing.
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Important notes at the end of this document.
@TDK
Soldering
Complete removal of flux is recommended to avoid surface contamination that can result in an
instable and/or high leakage current.
Use resin-type or non-activated flux.
Bear in mind that insufficient preheating may cause ceramic cracks.
Rapid cooling by dipping in solvent is not recommended, otherwise a component may crack.
Operation
Use CTVS only within the specified operating temperature range.
Use CTVS only within specified voltage and current ranges.
Environmental conditions must not harm a CTVS. Only use them in normal atmospheric
conditions. Reducing the atmosphere (e.g. hydrogen or nitrogen atmosphere) is prohibited.
Prevent a CTVS from contacting liquids and solvents. Make sure that no water enters a CTVS
(e.g. through plug terminals).
Avoid dewing and condensation.
EPCOS CTVS components are mainly designed for encased applications. Under all
circumstances avoid exposure to:
direct sunlight
rain or condensation
steam, saline spray
corrosive gases
atmosphere with reduced oxygen content
EPCOS CTVS devices are not suitable for switching applications or voltage stabilization where
static power dissipation is required.
This listing does not claim to be complete, but merely reflects the experience of EPCOS AG.
Display of ordering codes for EPCOS products
The ordering code for one and the same EPCOS product can be represented differently in data
sheets, data books, other publications, on the EPCOS website, or in order-related documents
such as shipping notes, order confirmations and product labels. The varying representations of
the ordering codes are due to different processes employed and do not affect the
specifications of the respective products. Detailed information can be found on the Internet
under www.epcos.com/orderingcodes
ESD/ EMI filters B72862F1050S160
ESD/ EMI filter series
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Important notes at the end of this document.
@TDK
The following applies to all products named in this publication:
1. Some parts of this publication contain statements about the suitability of our products for
certain areas of application. These statements are based on our knowledge of typical re-
quirements that are often placed on our products in the areas of application concerned. We
nevertheless expressly point out that such statements cannot be regarded as binding
statements about the suitability of our products for a particular customer application.
As a rule, we are either unfamiliar with individual customer applications or less familiar with
them than the customers themselves. For these reasons, it is always ultimately incumbent on
the customer to check and decide whether a product with the properties described in the
product specification is suitable for use in a particular customer application.
2. We also point out that in individual cases, a malfunction of electronic components or
failure before the end of their usual service life cannot be completely ruled out in the
current state of the art, even if they are operated as specified. In customer applications
requiring a very high level of operational safety and especially in customer applications in
which the malfunction or failure of an electronic component could endanger human life or
health (e.g. in accident prevention or lifesaving systems), it must therefore be ensured by
means of suitable design of the customer application or other action taken by the customer
(e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by
third parties in the event of malfunction or failure of an electronic component.
3. The warnings, cautions and product-specific notes must be observed.
4. In order to satisfy certain technical requirements, some of the products described in this
publication may contain substances subject to restrictions in certain jurisdictions (e.g.
because they are classed as hazardous). Useful information on this will be found in our Ma-
terial Data Sheets on the Internet (www.tdk-electronics.tdk.com/material). Should you have
any more detailed questions, please contact our sales offices.
5. We constantly strive to improve our products. Consequently, the products described in this
publication may change from time to time. The same is true of the corresponding product
specifications. Please check therefore to what extent product descriptions and specifications
contained in this publication are still applicable before or when you place an order. We also
reserve the right to discontinue production and delivery of products. Consequently, we
cannot guarantee that all products named in this publication will always be available. The
aforementioned does not apply in the case of individual agreements deviating from the fore-
going for customer-specific products.
6. Unless otherwise agreed in individual contracts, all orders are subject to our General
Terms and Conditions of Supply.
Important notes
Page 28 of 29
@TDK
7. Our manufacturing sites serving the automotive business apply the IATF 16949
standard. The IATF certifications confirm our compliance with requirements regarding the
quality management system in the automotive industry. Referring to customer requirements
and customer specific requirements (“CSR”) TDK always has and will continue to have the
policy of respecting individual agreements. Even if IATF 16949 may appear to support the
acceptance of unilateral requirements, we hereby like to emphasize that only requirements
mutually agreed upon can and will be implemented in our Quality Management System.
For clarification purposes we like to point out that obligations from IATF 16949 shall only
become legally binding if individually agreed upon.
8. The trade names EPCOS, CeraCharge, CeraDiode, CeraLink, CeraPad, CeraPlas, CSMP,
CTVS, DeltaCap, DigiSiMic, ExoCore, FilterCap, FormFit, LeaXield, MiniBlue, MiniCell, MKD,
MKK, MotorCap, PCC, PhaseCap, PhaseCube, PhaseMod, PhiCap, PowerHap, PQSine,
PQvar, SIFERRIT, SIFI, SIKOREL, SilverCap, SIMDAD, SiMic, SIMID, SineFormer, SIOV,
ThermoFuse, WindCap are trademarks registered or pending in Europe and
in other countries. Further information will be found on the Internet at
www.tdk-electronics.tdk.com/trademarks.
Release 2018-10
Important notes
Page 29 of 29