Infineon Technologies 的 V238(14,15)-U1306-M130 规格书

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Data Sheet 1 2001-11-28
Parallel Optical Link:
PAROLI ® Tx AC, 1.6 Gbit/s
Parallel Optical Link:
PAROLI ® Rx AC, 1.6 Gbit/s
Fiber Optics
PAROLI® is a registered trademark of Infineon Technologies AG
V23814-U1306-M130
V23815-U1306-M130
Features
•Power supply 3.3 V
•Low voltage differential signal electrical
interface (LVDS)
•12 electrical data channels
•Asynchronous, AC-coupled optical link
•12 optical data channels
•Transmission data rate of up to 1600 Mbit/s
per channel, total link data rate up to 19 Gbit/s
•850 nm VCSEL array technology
•PIN diode array technology
•62.5 µm graded index multimode fiber ribbon
•MT based optical port
•SMD technology
•Class 1 FDA and IEC Class 1 laser safety compliant
Optical Port
•Designed for the Simplex MT Connector (SMC)
•Port outside dimensions: 15.4 mm x 6.8 mm (width x height)
•MT compatible (IEC 61754-5) fiber spacing (250 µm) and alignment
pin spacing (4600 µm)
•Alignment pins fixed in module port
•Integrated mechanical keying
•Process plug (SMC dimensions) included with every module
•Cleaning of port and connector interfaces necessary prior to mating
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Applications
Data Sheet 2 2001-11-28
Features of the Simplex MT Connector (SMC)
(as part of optional PAROLI fiber optic cables)
•Uses standardized MT ferrule (IEC 61754-5)
•MT compatible fiber spacing (250 µm) and alignment pin spacing (4600 µm)
•Snap-in mechanism
•Ferrule bearing spring loaded
•Integrated mechanical keying
Applications
Telecommunication
•Switching equipment
•Access network
Data Communication
•Interframe (rack-to-rack)
•Intraframe (board-to-board)
•On board (optical backplane)
•Interface to SCI and HIPPI 6400 standards
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V23814-U1306-M130
V23815-U1306-M130
Pin Configuration
Data Sheet 3 2001-11-28
Pin Configuration
The numbering conventions for the Tx and Rx modules are the same.
Numbering Conventions Transmitter/Receiver
Figure 1
Pin Description Transmitter
Pin
No.
Symbol Level/ Logic Description
1VCC Power supply voltage of laser driver
2 t.b.l.o. to be left open
3 t.b.l.o. to be left open
4 t.b.l.o. to be left open
5 t.b.l.o. to be left open
6 LCU LVCMOS Out Laser Controller Up
High = normal operation
Low = laser fault or –RESET low
7VEE Ground
8VEE Ground
9 t.b.l.o. to be left open
10 t.b.l.o. to be left open
11 VEE Ground
12 VEE Ground
13 DI01N LVDS In Data Input #1, inverted
14 DI01P LVDS In Data Input #1, non-inverted
15 VEE Ground
16 VEE Ground
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Pin Configuration
Data Sheet 4 2001-11-28
17 DI02N LVDS In Data Input #2, inverted
18 DI02P LVDS In Data Input #2, non-inverted
19 VEE Ground
20 VEE Ground
21 DI03N LVDS In Data Input #3, inverted
22 DI03P LVDS In Data Input #3, non-inverted
23 VEE Ground
24 VEE Ground
25 t.b.l.o. to be left open
26 DI04N LVDS In Data Input #4, inverted
27 DI04P LVDS In Data Input #4, non-inverted
28 VEE Ground
29 DI05N LVDS In Data Input #5, inverted
30 DI05P LVDS In Data Input #5, non-inverted
31 VEE Ground
32 VEE Ground
33 DI06N LVDS In Data Input #6, inverted
34 DI06P LVDS In Data Input #6, non-inverted
35 VEE Ground
36 VEE Ground
37 DI07N LVDS In Data Input #7, inverted
38 DI07P LVDS In Data Input #7, non-inverted
39 VEE Ground
40 VEE Ground
41 DI08N LVDS In Data Input #8, inverted
42 DI08P LVDS In Data Input #8, non-inverted
43 VEE Ground
44 VEE Ground
45 VEE Ground
46 DI09N LVDS In Data Input #9, inverted
47 DI09P LVDS In Data Input #9, non-inverted
48 t.b.l.o. to be left open
Pin Description Transmitter (cont’d)
Pin
No.
Symbol Level/ Logic Description
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Pin Configuration
Data Sheet 5 2001-11-28
49 VEE Ground
50 VEE Ground
51 DI10N LVDS In Data Input #10, inverted
52 DI10P LVDS In Data Input #10, non-inverted
53 VEE Ground
54 VEE Ground
55 DI11N LVDS In Data Input #11, inverted
56 DI11P LVDS In Data Input #11, non-inverted
57 VEE Ground
58 VEE Ground
59 DI12N LVDS In Data Input #12, inverted
60 DI12P LVDS In Data Input #12, non-inverted
61 VEE Ground
62 VEE Ground
63 t.b.l.o. to be left open
64 –RESET LVCMOS In High = laser diode array is active
Low = switches laser diode array off
This input has an internal pull-down resistor to
ensure laser safety switch off in case of unconnected
–RESET input
65 VEE Ground
66 VEE Ground
67 LE LVCMOS In Laser ENABLE. High active.
High = laser array is on if –LE is also active.
Low = laser array is off. This input has an internal
pull-up, therefore can be left open.
68 –LE Laser ENABLE. Low active. Low = laser array is on
if LE is also active. This input has an internal pull-
down, therefore can be left open.
69 t.b.l.o. to be left open
70 t.b.l.o. to be left open
71 t.b.l.o. to be left open
72 VCC Power supply voltage of laser driver
Pin Description Transmitter (cont’d)
Pin
No.
Symbol Level/ Logic Description
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Pin Configuration
Data Sheet 6 2001-11-28
Pin Description Receiver
Pin
No.
Symbol Level/ Logic Description
1VEE Ground
2VCC Power supply voltage of preamplifier and analog
circuitry
3VCCO Power supply voltage of output stages
4 t.b.l.o. to be left open
5 OEN LVCMOS In Output Enable
High = normal operation
Low = sets all Data Outputs to low
This input has an internal pull-up resistor which pulls
to high level when this input is left open
6 SD1 LVCMOS Out Signal Detect on fiber #1.
High = signal of sufficient AC power is present
on fiber #1
Low = signal on fiber #1 is insufficient.
7VCCO Power supply voltage of output stages
8VEE Ground
9 t.b.l.o. to be left open
10 VEE Ground
11 VEE Ground
12 VEE Ground
13 DO01P LVDS Out Data Output #1, non-inverted
14 DO01N LVDS Out Data Output #1, inverted
15 VEE Ground
16 VEE Ground
17 DO02P LVDS Out Data Output #2, non-inverted
18 DO02N LVDS Out Data Output #2, inverted
19 VEE Ground
20 VEE Ground
21 DO03P LVDS Out Data Output #3, non-inverted
22 DO03N LVDS Out Data Output #3, inverted
23 VEE Ground
24 VEE Ground
25 t.b.l.o. to be left open
26 DO04P LVDS Out Data Output #4, non-inverted
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Pin Configuration
Data Sheet 7 2001-11-28
27 DO04N LVDS Out Data Output #4, inverted
28 VEE Ground
29 DO05P LVDS Out Data Output #5, non-inverted
30 DO05N LVDS Out Data Output #5, inverted
31 VEE Ground
32 VEE Ground
33 DO06P LVDS Out Data Output #6, non-inverted
34 DO06N LVDS Out Data Output #6, inverted
35 VEE Ground
36 VEE Ground
37 DO07P LVDS Out Data Output #7, non-inverted
38 DO07N LVDS Out Data Output #7, inverted
39 VEE Ground
40 VEE Ground
41 DO08P LVDS Out Data Output #8, non-inverted
42 DO08N LVDS Out Data Output #8, inverted
43 VEE Ground
44 VEE Ground
45 VEE Ground
46 DO09P LVDS Out Data Output #9, non-inverted
47 DO09N LVDS Out Data Output #9, inverted
48 t.b.l.o. to be left open
49 VEE Ground
50 VEE Ground
51 DO10P LVDS Out Data Output #10, non-inverted
52 DO10N LVDS Out Data Output #10, inverted
53 VEE Ground
54 VEE Ground
55 DO11P LVDS Out Data Output #11, non-inverted
56 DO11N LVDS Out Data Output #11, inverted
57 VEE Ground
58 VEE Ground
Pin Description Receiver (cont’d)
Pin
No.
Symbol Level/ Logic Description
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Pin Configuration
Data Sheet 8 2001-11-28
59 DO12P LVDS Out Data Output #12, non-inverted
60 DO12N LVDS Out Data Output #12, inverted
61 VEE Ground
62 VEE Ground
63 VEE Ground
64 t.b.l.o. to be left open
65 VEE Ground
66 VCCO Power supply voltage of output stages
67 –SD12 LVCMOS Out
low active
Signal Detect on fiber #12
Low = signal of sufficient AC power is present on
fiber #12
High = signal on fiber #12 is insufficient.
68 ENSD LVCMOS In Enable Signal Detect
High = SD1 and SD12 function enabled
Low = SD1 and SD12 are set to permanent active.
This input has an internal pull-up resistor which pulls
to high level when this input is left open
69 t.b.l.o. to be left open
70 VCC Power supply voltage of preamplifier and analog
circuitry
71 VCC Power supply voltage of preamplifier and analog
circuitry
72 VEE Ground
Pin Description Receiver (cont’d)
Pin
No.
Symbol Level/ Logic Description
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Description
Data Sheet 9 2001-11-28
Description
PAROLI is a parallel optical link for high-speed data transmission. A complete PAROLI
system consists of a transmitter module, a 12-channel fiber optic cable, and a receiver
module.
Transmitter V23814-U1306-M130
The transmitter module converts parallel electrical input signals via a laser driver and a
Vertical Cavity Surface Emitting Laser (VCSEL) diode array into parallel optical output
signals. All input data signals are Low Voltage Differential Signals (LVDS). The data rate
is up to 1600 Mbit/s for each channel. The transmitter module’s min. data rate DRmin
depends on the disparity D and on the duty cycle of the electrical input data. If the duty
cycle exceeds 57%, the channel will be shut down with a minimum response time of 1µs.
(See “Laser Safety Design Considerations” on Page 12). If the input duty cycle does not
exceed 57%, the channel will be switched off if the input data’s maximal run length of ’1’
bits exceeds the response time of 1 µs. In the worst case the input data’s maximal
running length of ’1’ bits equals it’s disparity D. From this we derive the following
expression for DRmin, the minimum data rate:
DRmin = D >0ELWV@
Notes:
1. The running disparity of a data stream is the difference of the number of ones and
zeroes of that data stream. The disparity D is the maximum value of the running
disparity for all possible starting points (with running disparity set to zero at the
starting point) in the data stream.
2. The run length is the maximal number of consecutive ones or zeroes in a data
stream. The run length is the disparity D.
3. Important:
DRmin rate of the PAROLI link is higher than the value of DRmin of the transmitter
module, as DRmin of the receiver module is higher.
(See “Receiver V23815-U1306-M130” on Page 11)
A logic low level at –RESET switches all laser outputs off. During power-up –RESET
must be used as a power-on reset which disables the laser driver and laser control until
the power supply has reached a 3 V level.
The Laser Controller Up (LCU) output is low if a laser fault is detected or –RESET is
forced to low.
All Onondaga signals have LVCMOS levels.
Transmission delay of the PAROLI system is 1 ns for the transmitter, 1 ns for the
receiver and approximately 5 ns per meter for the fiber optic cable.
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Description
Data Sheet 10 2001-11-28
Figure 2 Transmitter Block Diagram
LVDS
Input
Stage
Laser
Diode
Array
12 12 Data
Data In
Electrical
Input
Optical
Output
-RESET Laser Controller
Up (LCU)
12 Laser
Driver
Laser
Control
12
LE -LE laser enable
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Description
Data Sheet 11 2001-11-28
Receiver V23815-U1306-M130
The PAROLI receiver module converts parallel optical input signals into parallel electrical
output signals. The optical signals received are converted into voltage signals by PIN
diodes, transimpedance amplifiers, and gain amplifiers. All output data signals are Low
Voltage Differential Signals (LVDS).
The data rate is up to 1600 Mbit/s for each channel. The receiver module’s min. data rate
DRmin depends on the disparity D of the optical input data (coming fro a transmitter
module). It is given by the following expression:
DRmin = 8¼D >0ELWV@
Note: The running disparity of a data stream is the difference of the number of ones and
zeroes of that data stream. The disparity D is the maximum value of the running
disparity for all possible starting points (with running disparity set to zero at the
starting point) in the data stream.
Additional Signal Detect outputs (SD1 active high / SD12 active low) show whether an
optical AC input signal is present at data input 1 and/or 12. The signal detect circuit can
be disabled with a logic low at ENSD. The disabled signal detect circuit will permanently
generate an active level at Signal Detect outputs, even if there is insufficient signal input.
This could be used for test purposes.
A logic low at LVDS Output Enable (OEN) sets all data outputs to logic low. SD outputs
will not be effected.
All non data signals have LVCMOS levels. Transmission delay of the PAROLI system is
at a maximum 1 ns for the transmitter, 1 ns for the receiver and approximately 5 ns per
meter for the fiber optic cable.
Figure 3 Receiver Block Diagram
Pin
Diode
Array
LVDS
Output
Stage
12
12
Data out
Data
Optical
Input
Electrical
Output
12 Gain
Amplifier
Signal
Detect
Circuit
12
Amplifier
Output Enable (OEN)ENSD
SD1
-SD12
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Laser Safety
Data Sheet 12 2001-11-28
Laser Safety
The transmitter of the AC coupled Parallel Optical Link (PAROLI) is an FDA Class 1 laser
product. It complies with FDA regulations 21 CFR 1040.10 and 1040.11. The transmitter
is also an IEC Class 1 laser product as defined by IEC 60825-1 Amend. 2. To avoid
possible exposure to hazardous levels of invisible laser radiation, do not exceed
maximum ratings.
The PAROLI module must be operated under the specified operating conditions (supply
voltage between 3.0 V and 3.6 V, case temperature between 0°C and 80°C) under any
circumstances to ensure laser safety.
Attention: Class 1 Laser Product
Note: Any modification of the module will be considered an act of “manufacturing,” and will
require, under law, recertification of the product under FDA (21 CFR 1040.10 (i)).
Figure 4 Laser Emission
Laser Safety Design Considerations
To ensure laser safety for all input data patterns each channel is controlled internally and
will be switched off if the laser safety limits are exceeded.
A channel alerter switches the respective data channel output off if the input duty cycle
permanently exceeds 57%. The alerter will not disable the channel below an input duty
cycle of 57% under all circumstances.
The minimum alerter response time is 1 µs with a constant high input, i.e. in the input
pattern the time interval of excessive high input (e.g. ’1’s in excess of a 57% duty cycle,
consecutive or non-consecutive) must not exceed 1 µs, otherwise the respective
channel will be switched off. The alerter switches the respective channel from off to on
without the need of resetting the module if the input duty cycle is no longer violated.
All of the channel alerters operate independently, i.e. an alert within a channel does not
affect the other channels. To decrease the power consumption of the module unused
channel inputs can be tied to high input level. In this way a portion of the supply current
in this channel is triggered to shut down by the corresponding alerter.
Laser aperture
and beam
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Technical Data
Data Sheet 13 2001-11-28
Technical Data
Stress beyond the values stated below may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods of time may affect
device reliability.
Absolute Maximum Ratings
Parameter Symbol Limit Values Unit
min. max.
Supply Voltage VCC–VEE –0.3 4.5 V
Data/Control Input Levels1)
1) At LVDS and LVCMOS inputs.
VIN –0.5 VCC+0.5
LVDS Input Differential Voltage2)
2) |VID| = |(input voltage of non-inverted input minus input voltage of inverted input)|.
|VID|2.0
Operating Case Temperature3)
3) Measured at case temperature reference point (see Package Outlines Figure 15).
TCASE 080°C
Storage Ambient Temperature TSTG –20 100
Operating Moisture 20 85 %
Storage Moisture 20 85
Soldering Conditions Temp/Time4)
4) Hot bar or hot air soldering.
TSOLD,
tSOLD
260/10 °C/s
ESD Resistance
(all pins to VEE, human body model)5)
5) To avoid electrostatic damage, handling cautions similar to those used for MOS devices must be observed.
1kV
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Technical Data
Data Sheet 14 2001-11-28
Recommended Operating Conditions
Parameter Symbol Limit Values Unit
min. max.
Transmitter
Power Supply Voltage VCC 3.0 3.6 V
Noise on Power Supply1) NPS1 50 mV
Noise on Power Supply2) NPS2 100
LVDS Input Voltage Range3), 4) VLVDSI 500 VCC
LVDS Input Differential Voltage
5), 4) |VID|100 1000
LVDS Input Skew6) tSPN 0.5 x tR, tFps
LVDS Input Rise/Fall Time7) tR, tF100 300
LVCMOS Input High Voltage VLVCMOSIH 2.0 VCC V
LVCMOS Input Low Voltage VLVCMOSIL VEE 0.8
LVCMOS Input Rise/Fall Time8) tR, tF20 ns
Receiver
Power Supply Voltage VCC 3.0 3.6 V
Noise on Power Supply1) NPS1 50 mV
Noise on Power Supply2) NPS2 100
Differential LVDS
Termination Impedance
Rt80 120 W
LVCMOS Input High Voltage VLVCMOSIH 2.0 VCC V
LVCMOS Input Low Voltage VLVCMOSIL VEE 0.8
LVCMOS Input Rise/Fall Time8) tR, tF20 ns
Optical Input Rise/Fall Time7) tR, tF400 ps
Input Extinction Ratio ER 5.0 dB
Input Center Wavelength lC820 860 nm
Voltages refer to VEE = 0 V.
1) Noise frequency is 1 kHz to 10 MHz. Voltage is peak-to-peak value.
2) Noise frequency is > 10 MHz. Voltage is peak-to-peak value.
3) This implies that the input stage can be AC coupled.
4) Level diagram: see Figure 5
5) |VID| = |(input voltage of non-inverted input minus input voltage of inverted input)|.
6) Skew between positive and negative inputs measured at 50% level.
7) 20% - 80% level.
8) Measured between 0.8 V and 2.0 V.
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V23815-U1306-M130
Technical Data
Data Sheet 15 2001-11-28
Figure 5 Input Level Diagram
Figure 6 LVDS Input Stage
mV
V
CC
500
Time
|V
ID
|
Rin/2
Rin/2
VCC
Data In P internal P
internal N
Transmitter Module
Data In N
>8 K
1.95 V
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Technical Data
Data Sheet 16 2001-11-28
The electro-optical characteristics described in the following tables are valid only for use
under the recommended operating conditions.
Transmitter Electrical Characteristics
Parameter Symbol Limit Values Unit
min. typ. max.
Supply Current ICC 350 450 mA
Power Consumption P1.2 1.6 W
Data Rate per Channel DR 1)
1) DRmin = D [Mbit/s], with D: disparity of the input pattern. (See “Transmitter V23814-U1306-M130” on Page 9.)
1600 Mbit/s
LVCMOS Output Voltage Low VLVCMOSOL 0.4 V
LVCMOS Output Voltage High
V
LVCMOSOH
2.5
LVCMOS Input Current
High/Low
ILVCMOSI –500 500 µA
LVCMOS Output Current High2)
2) Source current.
ILVCMOSOH 0.5 mA
LVCMOS Output Current Low3)
3) Sink current.
ILVCMOSOL 4.0
LVDS Differential Input
Impedance4)
4) LVDS input stage.
RIN 80 120 W
LVDS Input Differential Current |II|5.0 mA
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Technical Data
Data Sheet 17 2001-11-28
Figure 7 Timing Diagram
Transmitter Electro-Optical Characteristics
Parameter Symbol Limit Values Unit
min. typ. max.
Optical Rise Time1) tR400 ps
Optical Fall Time1) tF400
Random Jitter (14s)2) JR0.23 UI
Deterministic Jitter JD0.20
Channel-to-channel skew3) tCSK 75 ps
Launched Average Power PAVG –11.0 –5.0 dBm
Launched Power Shutdown PSD –30.0
Center Wavelength lC840 860 nm
Spectral Width (FWHM) Dl 2
Spectral Width (rms) Dl 0.85
Relative Intensity Noise RIN –116 dB/Hz
Extinction Ratio (dynamic) ER 6.0 dB
Optical parameters valid for each channel.
1) 20% - 80% level, measured using a GBE (Gigabit Ethernet) filter.
2) Measured with 01010... (square) optical output pattern and in module thermal steady state status. Without
cooling this steady state status is reached after approximately 10 minutes.
3) With input channel-to-channel skew 0 ps and a maximum LVDS channel-to-channel average deviation and
swing deviation of 5%.
3.6 V
VCC
Data
3.135 V
data invalid data valid
0.8 V
t3
t2
t1
3.6 V
VCC
Data
-RESET
V
data invalid data valid
2.0 V
t3
t2
t1
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Technical Data
Data Sheet 18 2001-11-28
Parameter Symbol Limit Values Unit
min. max.
–RESET on Delay Time t1100 ms
–RESET off Delay Time t250 µs
–RESET Low Duration1) t310
1)
Only when not used as power on reset. At any failure recovery, –RESET must be brought to low level for at least
t
3
.
Receiver Electrical Characteristics
Parameter Symbol Limit Values Unit
min. typ. max.
Supply Current ICC 250 350 mA
Power Consumption P0.8 1.3 W
LVDS Output Low Voltage1), 2)
1) Level diagram: see Figure 8
2) LVDS output must be terminated differentially with Rt.
VLVDSOL 925 mV
LVDS Output High Voltage1), 2) VLVDSOH 1475
LVDS Output Differential
Voltage1), 2), 3)
3) |VOD| = |(output voltage of non-inverted output minus output voltage of inverted output)|.
|VOD|250 400
LVDS Output Offset Voltage1), 2), 4)
4) VOS = 1/2 (output voltage of inverted output + output voltage of non-inverted output).
VOS 1125 1275
LVDS Rise/Fall Time5)
5) Measured between 20% and 80% level with a maximum capacitive load of 5 pF.
tR, tF400 ps
LVCMOS Output Voltage Low ILVCMOSOL 400 mV
LVCMOS Output Voltage High ILVCMOSOH 2500
LVCMOS Input Current High/Low
ILVCMOSI –500 500 µA
LVCMOS Output Current High6)
6) Source current
ILVCMOSOH 0.5 mA
LVCMOS Output Current Low7)
7) Sink current
ILVCMOSOL 4.0
Random Jitter (14s)8), 9)
8) With no optical input jitter.
9) At sensitivity limit of –18.0 dBm at infinite ER.
JR0.31 UI
Deterministic Jitter8) JD0.08
Channel-to-channel skew10)
10) With input channel-to-channel skew 0 ps.
tCSK 75 ps
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Technical Data
Data Sheet 19 2001-11-28
Figure 8 Output Level Diagram
Receiver Electro-Optical Characteristics
Parameter Symbol Limit Values Unit
min. max.
Data Rate Per Channel DR 1)
1) DRmin = 8¼D [Mbit/s], with D: disparity of the input pattern. (See “Receiver V23815-U1306-M130” on Page 11.)
1600 Mbit/s
Sensitivity (Average Power)2)
2) D 100, BER = 10–12, Extinction ratio = infinite.
PIN –18.0 dBm
Saturation (Average Power)2) PSAT –5.0
Signal Detect Assert Level3)
3) Extinction ratio = infinite,
PSDA: Average optical power when SD switches from inactive to active.
PSDD: Average optical power when SD switches from active to inactive.
PSDA –19.0
Signal Detect Deassert Level3) PSDD –28.0
Signal Detect Hysteresis3) PSDA
–PSDD
1.0 4.0 dB
Return Loss of Receiver ARL 12
Optical parameters valid for each channel.
mV
1475
925
Time
|VOD|
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Technical Data
Data Sheet 20 2001-11-28
Figure 9 Timing Diagrams
Parameter Symbol max. Unit
Signal Detect Deassert Time t110 µs
Signal Detect Assert Time t210
LVDS Output Enable off Delay Time t320 ns
LVDS Output Enable on Delay Time t420
t1t2
Data Out 1, 12
Signal Detect 1
Signal Detect 12
t3t4
Output Enable OEN
Data Out data valid
2.0 V
0.8 V
data Low data valid
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Assembly
Data Sheet 21 2001-11-28
Assembly
On the next pages are some figures to assist the customer in designing his printed circuit
board (PCB). Figure 10 shows the mechanical dimensions of the PAROLI transmitter
and receiver modules and Figure 11 to Figure 13 give the dimensions of the holes and
solder pads on a customer PCB that are necessary to mount the modules on this PCB.
Keeping the tolerances for the PCB given in Figure 11 to Figure 13 is required to
properly attach the PAROLI transmitter and receiver module to the PCB.
Attachment to the customer PCB should be done with four M2 screws torqued to
0.25 Nm +0.05 Nm (see Figure 10, cross section B-B). The screw length a should be 3
to 4 mm plus the thickness b of the customer PCB.
Special care must be taken to remove residues from the soldering and washing process
which can impact the mechanical function. Avoid the use of aggressive organic solvents
like ketones, ethers, etc. Consult the supplier of the PAROLI modules and the supplier
of the solder paste and flux for recommended cleaning solvents.
The following common cleaning solvents will not affect the module: deionized water,
ethanol, and isopropyl alcohol. Air-drying is recommended to a maximum temperature
of 150°C. Do not use ultrasonics.
During soldering, heat must be applied to the leads only, to ensure that the case
temperature never exceeds 150°C. The module must be mounted with a hot-air or hot-
bar soldering process using a SnPb solder type, e.g. Sn62Pb36Ag2, in accordance with
ISO 9435.
.r. Inflneon technotogte: Bottom vtew Rx ~"‘ , 1 ‘1‘ fl u :z, W T 578 a & Q ms'mnsr 37D ‘ SE‘Dw V2 Bottom vtew Tx —n % [1th] 545 ‘ [EL] 50: an :rntess mg [GEM 7 7m .—.t )> '5 a57 t5 0:9 a win: t t t m , m '7‘ _ fl Agpt‘ Q ‘ m 4, t t '7‘ WE ‘ * z t! w ’ . i [:77] m ‘ FLtA X‘ W A ‘ Z: L A m2 hx asha: 'm _ _ E 7: mxwz naxwt'a‘ , LX fizz}: m r; [7 215 _ _ j X 101 [H7] 511 J :“734 [an] ‘m r? r“ : / é Top View § Tx am Rx m b, trere'ewnecatrttarisetewceraturz : neaSL‘EmEV (En'erett «it flwttfrmm 771'] u] 035 MADE IN , // mt t A t a // DUDE A t mum: ty 72X w m mm my mm» mm a" ,Lstcmm 7E1
V23814-U1306-M130
V23815-U1306-M130
Assembly
Data Sheet 22 2001-11-28
Figure 10 Drawing of the PAROLI Transmitter and Receiver Module
Dimensions in [mm] inches
Ineon mogm I. In B B A A [$0 2] v1 008 «a $ i w E mg @3 \_ /fl_=_§_a_§a , , n‘ “““““““““ k‘ , x =§=§=g§§fiw 15x 45 mg mg Dashed lines Show outlines of Tx-mudule wwfhuut pruness plug.
V23814-U1306-M130
V23815-U1306-M130
Assembly
Data Sheet 23 2001-11-28
Figure 11 Recommended Circuit Board Layout: Transmitter
Dimensions in [mm] inches
.r. Inflneon technotogte: [2 :31] 0?; :JUL «9 [$021 A B «9 was A B Top View 3 i : 3 1m ‘ t 7 NE [33 59] mt. [web] 055 S 15x 15X [we 7] Es Dashed [mes Show outlines of Rx-mudute without protess plug.
V23814-U1306-M130
V23815-U1306-M130
Assembly
Data Sheet 24 2001-11-28
Figure 12 Recommended Circuit Board Layout: Receiver
No electronic components are allowed on the customer PCB within the area covered by
the PAROLI module and the jumper used to attach a ribbon fiber cable.
Dimensions in [mm] inches
.r. Infln eon fiefivno‘ogwe: A A ms 05@] wan7@ Detail Y e e 72x [an MD] ‘99 Moz® i _ ~CG [0.5 3 «y 01L ~ E07 ,3 f2>< daswtd="" mes="" 570w="" mhrcs="" 3f="" module="" 003®l="" eé="" s="" 002="" ®="">>
V23814-U1306-M130
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Assembly
Data Sheet 25 2001-11-28
Figure 13 Mounting Hole, Detail Y (see Figure 11 and Figure 12)
Dimensions in [mm] inches
or. Inflneon fiefivno‘ogwe:
V23814-U1306-M130
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Assembly
Data Sheet 26 2001-11-28
Figure 14 Applications
Point-to-Point
Tx module
Ribbon Cable
LVDS
Rx module
PAROLI
SMC
Port
LVDS
SMC
Port
PAROLI
I/O Board
Passive Optical
Backplane
Tx
Rx
Feed Through
Optical
Backplane
PAROLI Tx module
Ribbon
Cables
Link
Controller
LVDS
PAROLI Rx module
Board-to-Board
SMC
Port
Infineon Vechno‘ogwe: us 551 [581] 225i [be] 268 Lx [1 2] on E m V—‘m L A-H' A—A [17 9] 705 \ x i /1/ 53m
V23814-U1306-M130
V23815-U1306-M130
Package Outlines
Data Sheet 27 2001-11-28
Package Outlines
Figure 15
Dimensions in [mm] inches
Edition 2001-11-28
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
© Infineon Technologies AG 2002.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide.
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life-support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com.
V23814-U1306-M130
V23815-U1306-M130
Revision History: 2001-11-28 DS0
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