Lattice Semiconductor Corporation 的 iCEstick Eval Kit Guide 规格书

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August 2013
EB82_01.0
iCEstick Evaluation Kit
User’s Guide
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iCEstick Evaluation Kit
Introduction
Thank you for choosing the Lattice Semiconductor iCEstick™ Evaluation Kit.
This guide describes how to start using the iCEstick Evaluation Kit, an easy-to-use USB form factor board for rap-
idly prototyping designs using the iCE40 FPGA. Along with the evaluation board, this kit includes a pre-loaded
design that demonstrates basic board functionality.
The contents of this user’s guide include demo operations, descriptions of the various portions of the evaluation
board, descriptions of the on-board connectors, a complete set of schematics and bill of materials for the iCEstick
Evaluation Board.
Features
The iCEstick Evaluation Kit includes:
iCEstick Evaluation Board – features the following on-board components
High-performance, low-power iCE40HX1K FPGA
FTDI 2232H USB device allows iCE device programming and UART interface to a PC
Vishay TFDU4101 IrDA transceiver
Five user LEDs
2 x 6 position Diligent PmodTM compatible connector enables many other peripheral connections
Discera 12Mhz MEMS oscillator
Micron 32Mbit N25Q32 SPI flash
Supported by Lattice iCEcube2™ design software
USB connector provides the power supply
16 LVCMOS/LVTTL (3.3V) digital I/O connections on 0.1” through-hole connections
Pre-loaded demo design – the kit includes the pre-loaded demo design that flashes the on-board LEDs in a
clockwise pattern.
USB connector – provides a communication and debug port via a USB-to-RS-232 physical channel and pro-
gramming interface to the PC.
Figure 1. iCEstick Evaluation Board
USB
Connector
FTDI
2232H
Lattice
iCE40-1KHX
Prototyping
Holes
IrDA
Transceiver
Pmod
Connector
SPI
Flash
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iCEstick Evaluation Kit
Figure 2. iCEstick Functional Block Diagram
USB Type A Male
Pmod
IrDA
iCE40
HX1K
144TQFP
SPI LDO
FT2232H
Pwr LED I/O LEDs
I/O Access
~4 in.
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iCEstick Evaluation Kit
Software Requirements
Before using the iCEstick board, download and install the latest version of Lattice iCEcube2™ and Diamond Pro-
grammer. Make sure you log in to the Lattice website, otherwise these software downloads will not be visible.
These are available at http://www.latticesemi.com/Products/DesignSoftwareAndIP.aspx. If you install Diamond
Programmer 2.2, you will require a software patch. This software patch is available at http://www.lattice-
semi.com/icestick. Go to the Downloads tab and install the appropriate patch. This patch is not required with Dia-
mond Programmer 3.0 or higher.
Figure 3. Software Downloads
Download
iCEcube2
for HDL
development
Download Diamond
Programmer for
physically configuring
the device
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iCEstick Evaluation Kit
Communication Between the PC and iCEstick
Communication between the iCEstick Board and a PC is via the FTDI 2232H USB device. To enable this connec-
tion the installation of the FTDI chip USB hardware drivers is needed. This driver is installed when Diamond Pro-
grammer was installed. These drivers enable the computer to recognize and program the iCEstick board. In
addition these drivers allow communication between the PC and the iCEstick board to enable further demonstra-
tions.
Connecting the iCEstick Evaluation Board
Insert the iCEstick evaluation board to an open USB slot in a PC. The default bitstream in the SPI flash loads the
iCE40HX-1k device on the iCEstick board. One should see the green LED on the board light up and continue to be
lit.
Preprogrammed Design and Board LEDs
There are a total of 5 LEDs on the iCEstick board. All are controlled by I/Os of the iCE40HX-1k device. The default
bitstream loads the iCE40HX-1k device and the green LED lights up signifying that the device has loaded correctly
and power is good. The other four red LEDs arranged in a diamond pattern begins to flash in a clockwise direction.
This is the intended function of the default bitstream.
Table 1. User I/O and LEDs
Download Demo Designs
The above demo is pre-programmed into the iCEstick board. Other than the default design, Lattice also distributes
source and programming files for demonstration designs compatible with this board. To download the demo
designs:
1. Browse to www.latticesemi.com/icestick and click on the Downloads tab to view other design files and capabil-
ities that the iCEstick board could implement. Various demo designs are available and can be download.
2. Extract the contents of zip files to a local hard drive.
Lattice provides the following demos based on iCEstick board:
UART over IrDA. In this demo design, the iCEstick device communicates with a laptop or PC through UART over
USB. Then, the payload is transmitted through Vishay IrDA device. This data can be locally looped back or
another iCEstick board could receive the data via it’s IrDA receiver.
Diligent Pmod Accelerometer. The demo makes use of Digilent PmodAcl module which is plugged into iCEstick
board. In this demo design, the accelerometer setting and reading is done by the on-board iCE device and the
direction of movement is displayed with the diamond pattern LEDs.
LED location CPLD pin (All in Bank 1) CPLD I/O LED color
D1 99 PIO1_14 Red
D2 98 PIO1_13 Red
D3 97 PIO1_12 Red
D4 96 PIO1_11 Red
D5 95 PIO1_10 Green
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iCEstick Evaluation Kit
IrDA Functionality and Demo
The iCEstick board has a Vishay TFDU4101 IrDA transceiver on it. This device allows transmit and receive of infra-
red data up to 115kbps.
Table 2. IrDA Pin Description
There are two possible configurations for the IrDA demo design: IrDA TX and IrDA RX. For an end to end complete
IrDA link demo, two iCEstick boards are needed, however using just the IrDA Tx design can support a demo. The
IrDA TX design transfers the data from the PC keyboard input in a terminal window to the IrDA Vishay device TXD.
While the data is transmitted via infrared, it is also by default looped back to the receive channel of the IrDA device.
In this demo the looped back data is received and before it is transmitted to the PC window the text is converted
from lower case to upper case. This is the signal flow for the stand alone demo.
Figure 4. IrDA TX on iCEstick
Laptop or PC
iCE40
IrDA TX
UART
via USB
The IrDA RX design receives infrared data from the Vishay IrDA Tx device. After the IrDA data is wirelessly
received it is then sent to the iCE40 device. The iCE40 then send the character information to the open window on
the PC. Thus whatever is typed in the TX terminal window is displayed in the Rx terminal window.
Figure 5. IrDA RX on iCEstick
Laptop or PC
iCE40 Vishay IrDA
UART
Over
USB
This demo requires a terminal program on PC to communicate with the iCEstick board. The following instructions
describe the setup for IrDA TX stand alone demo using the Tera Term terminal emulator program on Windows 7.
IrDA function CPLD pin CPLD I/O Comment
RXD 106 PIO1_19 Receive data pin
TXD 105 PIO1_18 Transmit data pin
SD 107 PIO1_20 Shut down
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iCEstick Evaluation Kit
Setting Up for the IrDA TX Stand Alone Demo
To set up for the IrDA TX demo:
1. Program the iCE device with IrDA TX bitstream.
2. Plug iCEstick into a PC USB port.
3. Check if the USB driver is installed correctly.
Go to Start, right-click Computer and select Properties. The System window is shown.
Click Device Manager.
Figure 6. System Window
4. If the driver is installed correctly, the device is listed without an error tag under Ports (COM & LPT) as shown in
Figure 7. Proceed to the next step.
Figure 7. Device Manager
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iCEstick Evaluation Kit
If the driver is not installed correctly, the device is tagged with a yellow exclamation point as shown in Figure 8.
You need to install the driver. To do this, right-click the device and select Update Driver Software.
Figure 8. Device Manager with Driver Error
Request Windows to search the web for the driver. After Windows locates the FTDI driver, install it and proceed
to the next step.
5. Install Tera Term software. The installer can be downloaded from http://download.cnet.com/Tera-Term/3000-
20432_4-75766675.html.
6. Open Tera Term.
7. In the New connection dialog box, click Serial.
8. On the Port menu, click COMxx: USB Serial Port (COMxx). If there are two or more options, select the last
COM port on the list. Click OK.
Figure 9. New Connection Dialog Box
9. The selected COM port/default baud rate appear in the Tera Term VT window title bar as shown in Figure 10.
On the Setup menu, click Serial port.
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iCEstick Evaluation Kit
Figure 10. Tera Term VT Window with Selected COM Port /Default Baud Rate
10. The Serial port setup dialog box opens. In the Baud rate menu, click 115200. Leave other options with default
settings. Click OK.
Figure 11. Serial Port Setup Dialog Box
11. The selected COM port/115200 baud rate appear in the Tera Term VT window title bar as shown in Figure 12.
On the Setup menu, click Terminal.
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iCEstick Evaluation Kit
Figure 12. Tera Term VT Window with Selected COM Port /Baud Rate
12. The Terminal setup dialog box opens. Select Local echo. Leave other options with default value. Click OK.
Figure 13. Terminal Setup Dialog Box
When you type in the Tera Term VT window using the TX design, a lower case character is echoed with a capital
character from the iCE device as shown in the Figure 14.
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iCEstick Evaluation Kit
Figure 14. Tera Term VT Window Using TX Design
For IrDA RX, the above Tera Term setting is the same but the bitstream for the iCE device is different. With a setup
of two iCEstick boards facing each other, one programmed with IrDA TX and the other programmed with IrDA RX,
the character typed in IrDA TX PC is transferred to and displayed on IrDA RX PC monitor. You can change the
angle of the TX board facing the RX board to see when the IrDA link would break.
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iCEstick Evaluation Kit
Diligent Pmod Connector and Accelerometer Demo
On the iCEstick board, location J2 is a 2x6 position Pmod (Peripheral MODule) Digilent connector. The iCEstick
board supports a variety of Pmod peripheral modules for easy I/O expansion. Figure 3 lists the 0.1” through-hole
headers on the iCEstick board that support Pmod modules. Pmod modules come in different form factors, and
each Pmod header includes power and ground supplies. The easiest way to support a Pmod module is to add the
appropriate female socket. Straight-through or right-angle connectors can be used. Male headers are an alternate
solution when using the interface cable provided with most Pmod modules.
Table 3. Diligent Pmod Compatible Connector Description
The Accelerometer demo makes use of the Digilent PmodAcl accelerometer module from Diligent. The PmodAcl
module needs to be plugged into J2 on the iCEstick board through the cable that comes with this module. The four
LEDs D1, D2, D3 and D4 in the north, south, east and west pattern are configured to represent X+, Z+, X-, Z- of
accelerometer movement direction respectively. When the accelerometer module is moved around, the diamond
pattern LEDs on the iCEstick board goes on/off corresponding to the direction of the movement and orientation of
the module. If all these LEDs light up at the same time (indicating a balance point), The D5 LED also lights up.
Figure 15. Accelerometer Demo on iCEstick
Accelerometer Demo on iCEstick
iCE40 LED
Acl Module
Connection Left Row pins Right Row pins Connection
PIO1_02 1 7 PIO1_06
PIO1_03 2 8 PIO1_07
PIO1_04 3 9 PIO1_08
PIO1_05 4 10 PIO1_09
Ground 5 11 Ground
3.3v 6 12 3.3v
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Programming Demo Designs with Lattice Programmer
To program a bitstream file to iCE device:
1. Plug the iCEstick board to a USB port on a host PC with Programmer installed.
2. Run Programmer. The Diamond Programmer Getting Started window opens. Under Select an Action, click
Create a new Blank Project. Click OK. If you try to create a new project from a scan, you will receive an error.
Please select Create a new Blank Project.
Figure 16. Diamond Programmer Getting Started Window
3. The Diamond Programmer interface opens. Under Cable Settings, in the Cable menu, click USB2. In the Port
menu, click FTUSB-0. You can also click Detect Cable to set the correct cable and port.
Figure 17. Cable and Port Settings
4. Select the Enable check box.
5. Double-click the cell under Device Family and click iCE40.
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Figure 18. Device Family Options
6. Double-click the cell under Device and click iCE40HX1K.
Figure 19. Device Options
7. Double-click the cell under Operation. The Device Properties dialog box opens as shown in Figure 20. On the
Access Mode menu, click SPI Flash Programming. Click OK.
Warning: NVCM Programming is NOT recommended. NVCM Programming is one time programming. If you
use NVCM Programming to program iCE device, the iCE device can no longer be reprogrammed.
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Figure 20. Device Properties Dialog Box
8. Select the SPI flash part number. For the iCEstick, this is Micron SPI-N25Q032 8-pin VDFPN8 package. Also
make sure to select the programming file. Once done, click OK.
Figure 21. Select Serial SPI Flash
9. On the Programmer toolbar, click the Program button to initiate the download. The bitstream starts download-
ing to the iCE device. This takes a few seconds to complete.
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Expansion I/O Connections
The iCEstick board contains two unpopulated 0.1” headers for users to implement their own connections. Connec-
tors J1 and J3 each consist of 10 positions for a total of 20 connections. Two of these are tied to 3.3v and two are
tied to ground. This leaves 16 general purpose I/Os that connect to the iCE40HX-1k device for user I/O.
Table 4. Expansion I/O Connections
Test Points
There are three unpopulated test points. TP1 is tied to 3.3v, TP2 is tied to 1.2v and TP3 is connected to ground.
Lattice Demonstration Bitstreams
All demonstration bitstreams and Design files are available at www.latticesemi.com/icestick.
Technical Support Assistance
e-mail: techsupport@latticesemi.com
Internet: www.latticesemi.com
Revision History
Date Version Change Summary
August 2013 01.0 Initial release.
© 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as
listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of
their respective holders. The specifications and information herein are subject to change without notice.
J1 Connector J3 Connector
Pin CPLD I/O Bank 0 CPLD Pin Pin CPLD I/O Bank 2 CPLD Pin
1 3.3v - 1 3.3v -
2 Ground - 2 Ground -
3 PIO0_02 112 3 PIO2_17 62
4 PIO0_03 113 4 PIO2_16 61
5 PIO0_04 114 5 PIO2_15 60
6 PIO0_05 115 6 PIO2_14 56
7 PIO0_06 116 7 PIO2_13 48
8 PIO0_07 117 8 PIO2_12 47
9 PIO0_08 118 9 PIO2_11 45
10 PIO0_09 119 10 PIO2_10 44
Appendix A. Schematic Diagrams
5
5
4
4
3
3
2
2
1
1
DD
CC
B B
A A
FPGA
Power from USB 5V
BANK 3
BANK 1
BANK 0
BANK 2
iCE40-HX1K-TQ144
HEADER
HEADER
HEADER
I/Os
I/Os
I/Os
HEADER
I/Os
RS232
USB
CONNECTOR
USB to
SPI / RS232
LEDS
SPI
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5
5
4
4
3
3
2
2
1
1
DD
CC
B B
A A
SCK
SI
SO
FT_EECS
FT_EECLK
FT_EEDATA
SS
+3.3V
VCC1_8FT
VCC1_8FT
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
iCE_SCK 4
iCE_MOSI 4
iCE_MISO 4
iCE_SS_B 4
DM5
DP5
RS232_Rx_TTL 4
RS232_Tx_TTL 4
RTSn 4
DTRn 4
CTSn 4
DSRn 4
DCDn 4
iCE_CLK 4
iCE_CDONE 4
iCE_CREST 4
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R440R440
C13
0.1uF
C13
0.1uF
C4
0.1uF
C4
0.1uF
R40R40
C12
0.1uF
C12
0.1uF
R6 12KR6 12KR9
10K
R9
10K
C7
0.1uF
C7
0.1uF
X1
12.0000MHZ
X1
12.0000MHZ
VDD 4
STANDBY#
1
GND
2OUTPUT 3
R7
10K
R7
10K
R120R120
R100R100
R170R170
R30R30
C11
0.1uF
C11
0.1uF
R140R140
R15 2.2KR15 2.2K
R18
0
R18
0
R5 2.2KR5 2.2K
C6
0.1uF
C6
0.1uF
C3
4.7uF
C3
4.7uF
C9
0.1uF
C9
0.1uF
R20R20
C2
0.1uF
C2
0.1uF
R8
10K
R8
10K
C10
10uF
C10
10uF
R130R130
C8
0.1uF
C8
0.1uF
FTDI High-Speed USB
FT2232H
FT2232HL
U1
FTDI High-Speed USB
FT2232H
FT2232HL
U1
VREGIN
50
VREGOUT
49
DM
7
DP
8
REF
6
RESET#
14
EECS
63
EECLK
62
EEDATA
61
OSCI
2
OSCO
3
TEST
13
ADBUS0 16
ADBUS1 17
ADBUS2 18
ADBUS3 19
VPHY 4
VPLL 9
VCORE 12
VCORE 37
VCORE 64
VCCIO 20
VCCIO 31
VCCIO 42
VCCIO 56
AGND
10
GND
1
GND
5
GND
11
GND
15
GND
25
GND
35
GND
47
GND
51
PWREN# 60
SUSPEND# 36
ADBUS4 21
ADBUS5 22
ADBUS6 23
ADBUS7 24
ACBUS0 26
ACBUS1 27
ACBUS2 28
ACBUS3 29
ACBUS4 30
ACBUS5 32
ACBUS6 33
ACBUS7 34
BDBUS0 38
BDBUS1 39
BDBUS2 40
BDBUS3 41
BDBUS4 43
BDBUS5 44
BDBUS6 45
BDBUS7 46
BCBUS0 48
BCBUS1 52
BCBUS2 53
BCBUS3 54
BCBUS4 55
BCBUS5 57
BCBUS6 58
BCBUS7 59
R110R110
R450R450
R160R160
R10R10
C5
0.1uF
C5
0.1uF
C1
4.7uF
C1
4.7uF
93LC56-SO8
U2
93LC56-SO8
U2
CS 1
CLK 2
DI 3
DO 4
VSS
5ORG
6NU
7VCC
8
WJ WWAHW‘ ‘m
5
5
4
4
3
3
2
2
1
1
DD
CC
B B
A A
PIO1_02
PIO1_03
PIO1_04
PIO1_05
PIO1_06
PIO1_07
PIO1_08
PIO1_09
PIO1_02
PIO1_03
PIO1_04
PIO1_05
PIO1_06
PIO1_07
PIO1_08
PIO1_09
PIO0_02
PIO0_03
PIO0_04
PIO0_05
PIO0_06
PIO0_07
PIO0_08
PIO0_09
PIO0_02
PIO0_03
PIO0_04
PIO0_05
PIO0_06
PIO0_07
PIO0_08
PIO0_09
+3.3V
+3.3V+3.3V
+3.3V
+3.3V
LED4 5
LED3 5
LED2 5
LED1 5
LED0 5
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
35Apr 12, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
35Apr 12, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
35Apr 12, 2013
R19
47
R19
47
J1
Female header 1x10
DNI
J1
Female header 1x10
DNI
8
2
4
6
7
5
3
1
10
9
C16
0.1uF
C16
0.1uF
C19
4.7uF
C19
4.7uF
C17
0.1uF
C17
0.1uF
R21
10K
R21
10K
C15
0.1uF
C15
0.1uF
BANK 0
NC pins may be routed through
iCE40HX1K-TQ144
U3A
BANK 0
NC pins may be routed through
iCE40HX1K-TQ144
U3A
GBIN0/PIO0_00
129
GBIN1/PIO0_01
128
NC_1
110
NC_2
124
NC_3
125
NC_4
130
VCCIO0_01
133
VCCIO0_02
123
NC_19
131
PIO0_02 112
PIO0_03 113
PIO0_04 114
PIO0_05 115
PIO0_06 116
PIO0_07 117
PIO0_08 118
PIO0_09 119
PIO0_10 120
PIO0_11 121
PIO0_12 122
PIO0_13 134
PIO0_14 135
PIO0_15 136
PIO0_16 137
PIO0_17 138
PIO0_18 139
PIO0_19 141
PIO0_20 142
PIO0_21 143
PIO0_22 144
R20
47
R20
47
U4
TFDU4101-TR3
U4
TFDU4101-TR3
GND
8
IREDC
2
RXD
4
TXD
3
SD
5
VCC1
6
NC
7
VCC2
1
NC pins may be routed through
BANK 1
iCE40HX1K-TQ144
U3B
NC pins may be routed through
BANK 1
iCE40HX1K-TQ144
U3B
GBIN2/PIO1_00
94
GBIN3/PIO1_01
93
NC_5
82
NC_6
83
NC_7
84
NC_8
85
PIO1_21/TCK
75
PIO1_22/TDI
73
PIO1_23/TDO
76
PIO1_24/TMS
74
TRST_B
77
VCCIO1_01
89
VCCIO1_02
100 PIO1_02 78
PIO1_03 79
PIO1_04 80
PIO1_05 81
PIO1_06 87
PIO1_07 88
PIO1_08 90
PIO1_09 91
PIO1_10 95
PIO1_11 96
PIO1_12 97
PIO1_13 98
PIO1_14 99
PIO1_15 101
PIO1_16 102
PIO1_17 104
PIO1_18 105
PIO1_19 106
PIO1_20 107
J2J2
Pmod 2x6
82
4
6
7
5
3
1
10
9
12
11
C20
0.1uF
C20
0.1uF
C18
0.1uF
C18
0.1uF
C14
0.1uF
C14
0.1uF
5
5
4
4
3
3
2
2
1
1
DD
CC
B B
A A
PIO2_17
PIO2_16
PIO2_15
PIO2_14
PIO2_13
PIO2_12
PIO2_11
PIO2_10
PIO2_10
PIO2_11
PIO2_12
PIO2_13
PIO2_14
PIO2_15
PIO2_16
PIO2_17
+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
iCE_CLK2
RS232_Tx_TTL 2
RS232_Rx_TTL 2
DSRn 2
RTSn 2
DTRn 2
DCDn 2
iCE_MOSI2
iCE_SCK2
iCE_SS_B2
CTSn 2
iCE_MISO2
iCE_CDONE
2
iCE_CREST
2
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
45Apr 16, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
45Apr 16, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - FPGA
B
45Apr 16, 2013
C24
0.1uF
C24
0.1uF
C23
0.1uF
C23
0.1uF
C26
0.1uF
C26
0.1uF
NC pins may be routed through
BANK 3
iCE40HX1K-TQ144
U3D
NC pins may be routed through
BANK 3
iCE40HX1K-TQ144
U3D
GBIN6/PIO3_00/DP08A
21
GBIN7/PIO3_01/DP07B
20
NC_10
15
NC_11
16
NC_12
17
NC_13
18
VCCIO3_01
6
VCCIO3_02
30 PIO3_02/DP00A 1
PIO3_03/DP00B 2
PIO3_04/DP01A 3
PIO3_05/DP01B 4
PIO3_06/DP02A 7
PIO3_07/DP02B 8
PIO3_08/DP03A 9
PIO3_09/DP03B 10
PIO3_10/DP04A 11
PIO3_11/DP04B 12
PIO3_12/DP07A 19
PIO3_13/DP08B 22
PIO3_14/DP09A 23
PIO3_15/DP09B 24
PIO3_16/DP10A 25
PIO3_17/DP10B 26
PIO3_18/DP11A 28
PIO3_19/DP11B 29
PIO3_20/DP12A 31
PIO3_21/DP12B 32
PIO3_22/DP13A 33
PIO3_23/DP13B 34
C22
0.1uF
C22
0.1uF
J3
Female header 1x10
DNI
J3
Female header 1x10
DNI
8
2
4
6
7
5
3
1
10
9
R46
10K
R46
10K
R27
10K
R27
10K
C25
0.1uF
C25
0.1uF
C21
0.1uF
C21
0.1uF
R22 10KR22 10K
BANK 2
NC pins may be routed through
iCE40HX1K-TQ144
U3C
BANK 2
NC pins may be routed through
iCE40HX1K-TQ144
U3C
CDONE
65
CRESET_B
66
GBIN5/PIO2_01
49 GBIN4/PIO2_02
50
NC_9
55
PIO2_18/CBSEL0
63
PIO2_19/CBSEL1
64
VCCIO2_01
46
VCCIO2_02
57 PIO2_00 52
PIO2_03 58
PIO2_04 37
PIO2_05 38
PIO2_06 39
PIO2_07 41
PIO2_08 42
PIO2_09 43
PIO2_10 44
PIO2_11 45
PIO2_12 47
PIO2_13 48
PIO2_14 56
PIO2_15 60
PIO2_16 61
PIO2_17 62
R23
0
DNI
R23
0
DNI
SPI
iCE40HX1K-TQ144
U3E
SPI
iCE40HX1K-TQ144
U3E
SPI_VCC
72 PIOS_00/SPI_SCK 70
PIOS_01/SPI_SI 68
PIOS_02/SPI_SO 67
PIOS_03/SPI_SS_B 71
R26
10K
R26
10K
U5
N25Q032A13ESC40F
U5
N25Q032A13ESC40F
CS
1
SDI
5
SCK
6
WP
3
HOLD 7
VCC 8
GND
4
SDO 2
R24
10K
R24
10K
R25
10K
R25
10K
5
5
4
4
3
3
2
2
1
1
DD
CC
B B
A A
LEDs
+3.3V
VBUS_5V
+1.2V
+3.3V +1.2V
+1.2V
+3.3V
+1.2V
VBUS_5V +3.3V
+3.31V
+1.22V +1.2V
DM 2
DP 2
LED03
LED13
LED23
LED33
LED43
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - Power, LEDs
B
55Apr 12, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - Power, LEDs
B
55Apr 12, 2013
Title
veRrebmuN tnemucoDeziS
teehS:etaD of
AXELSYS
ICE40HX1K-STICK-EVN
A
iCEstick Evaluation Kit - Power, LEDs
B
55Apr 12, 2013
C44
10uF
C44
10uF
D4
Red
D4
Red
12
TP2
DNI
TP2
DNI
1
R37
1K
R37
1K
C40
0.01uF
C40
0.01uF
C35
1uF
C35
1uF
C43
0.1uF
C43
0.1uF
R41
1K
R41
1K
R35
100
R35
100
R38
1K
R38
1K
R34
0.1
R34
0.1
U6
LT3030EFE#TRPBF
U6
LT3030EFE#TRPBF
GND3
5
IN1_1
18
SHDN2
11
GND2
15
PWRGD1
19
IN1_2
17
IN2_1
14
PWRGD2
12
GND4
6
IN2_2
13
SHDN1
20
GND1
16
OUT1_1 3
OUT1_2 4
BYP1 2
ADJ1 1
OUT2_1 7
OUT2_2 8
BYP2 9
ADJ2 10
THERMPAD
21
R43
100
R43
100
C34
10uF
C34
10uF
C33
0.01uF
C33
0.01uF
D3
Red
D3
Red
12
C41
4.7uF
C41
4.7uF
R32
1M
R32
1M
C31
0.1uF
C31
0.1uF
C29
0.1uF
C29
0.1uF
TP3
DNI
TP3
DNI
1
D5
Green
D5
Green
12
TP1
DNI
TP1
DNI
1
D2
Red
D2
Red
12
C39
10uF
C39
10uF
POWER
iCE40HX1K-TQ144
U3F
POWER
iCE40HX1K-TQ144
U3F
GND_01
5
GND_02
13
GND_03
14
GND_04
59
GND_05
69
GND_06
86
GND_07
103
GND_08
132
GND_09
140
PLLGND
35 PLLVCC
36
NC_14 127
NC_15 53
NC_16 126
NC_17 54
NC_18 40
VCC_01 51
VCC_02 27
VCC_03 92
VCC_04 111
VPP_2V5 108
VPP_FAST 109
C42
0.01uF
C42
0.01uF
R33 210KR33 210K
R40
1K
R40
1K
C28
1uF
C28
1uF
R39
1K
R39
1K
R30
100
R30
100
C27
10uF
C27
10uF
D1
Red
D1
Red
12
C38
10uF
C38
10uF
C37
0.01uF
C37
0.01uF
R31
1M
R31
1M
C36
0.1uF
C36
0.1uF
C32
0.1uF
C32
0.1uF
J4
USB AM 90
J4
USB AM 90
VCC 1
D- 2
D+ 3
GND 4
R29
357K
R29
357K
R28
0.1
R28
0.1
C30
0.1uF
C30
0.1uF
C45
0.1uF
C45
0.1uF
D6
CDBU0520
D6
CDBU0520
1
2