Microchip Technology 的 MTCH112 Data Sheet 规格书

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‘ MICRQICHIP MTC H112 |:l\_ll_ll_l

 2012 Microchip Technology Inc. Preliminary DS41668A-page 1

MTCH112

Features:

• Capacitive Proximity Detection System:

- High Signal to Noise Ratio (SNR)

- Adjustable sensitivity

- Noise Rejection Filters

- Scanning method actively optimized to

attenuate strongest noise frequencies

- Automatic calibration with optional user

presets

- Dynamic threshold management adjusts

sensitivity of sensor based on the level of

environmental noise

- Constant press calibration tracks the

expected offset when the sensor is pressed

and adjusts the threshold to automatically

achieve the best press/release behavior

- User-defined “minimum shift” values specify

the lowest amount of signal change to

activate a state transition. Automatic

thresholds never decrease below these

settings.

- Automatic Environmental Compensation

- Stuck release mechanism

• No Required External Components

• Low-Power mode: Highly Configurable

Low-Power mode

- 1 ms to 4s Sleep interval between sensor

samples

• Response Time as Low as 10 ms

• Hardware Error Detection notifies if either sensor

is shorted to VDD, VSS or the other sensor

• Operating Voltage Range:

- 1.8V to 3.3V

• Operating Temperature:

- 40°C to +85°C

Package Type

The device is available in 8-lead SOIC and DFN

packaging (see Figure 1).

FIGURE 1: 8-PIN DIAGRAM

FOR MTCH112

TABLE 1: 8-PIN SOIC/DFN PINOUT

DESCRIPTION

I/O 8-Pin

SOIC/DFN Description

VDD 1Power Supply Input

MTO/INT 2 Detect Output (Active-Low)

Notification Interrupt Pin

MTI0 3 Proximity/Touch Sensor Input

RESET 4 Device Reset (Active-Low)

SDA 5 I2C™ Data

SCL 6 I2C™ Clock

MTI1/MTGRD0 7 Proximity/Touch Sensor Input

Active Guard Shield for MTI0

VSS 8 Ground Reference

MTI0

RESET

VDD

MTO/INT

VSS

MTI1/MTGRD0

SDA

SCL

4 5

SOIC, DFN

MTCH112

Dual-Channel Proximity/Touch Controller

MTCH112

DS41668A-page 2 Preliminary  2012 Microchip Technology Inc.

Table of Contents

1.0 Device Overview ........................................................................................................................................................................ 3

2.0 I2C™ Serial Interface................................................................................................................................................................. 6

3.0 Configuration Registers ........................................................................................................................................................... 13

4.0 Electrical Characteristics.......................................................................................................................................................... 25

5.0 Packaging Information ............................................................................................................................................................. 34

Index ........................................................................................................... ........................................................................................ 42

The Microchip Web Site ....................................................................................................................................................................... 43

Customer Change Notification Service ................................................................................................................................................ 43

Customer Support ................................................................................................................................................................................ 43

Reader Response ................................................................................................................................................................................ 44

Product Identification System .............................................................................................................................................................. 45

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 2012 Microchip Technology Inc. Preliminary DS41668A-page 3

MTCH112

1.0 DEVICE OVERVIEW

The Microchip mTouch™ sensing MTCH112 Dual-

Channel Proximity/Touch Controller provides an easy

way to add proximity and/or touch sensor detection to

any application. The device implements either two

capacitive sensors or one sensor and one active guard

driver. The optional device configuration through I2C™

allows presets to be loaded in a production environ-

ment. Automatic calibration routines are used by

default to choose the best options, so user configura-

tion is not required.

The MTCH112 uses a sophisticated optimization

algorithm to actively eliminate noise from the signal.

While the noise level is being measured, the

requirements for a proximity or touch detection are

updated to reflect the degree of uncertainty in the

readings. When a press is detected for the first time,

the threshold is automatically calibrated to choose a

smart threshold for the ‘release’ and next press. This

creates a system that dynamically optimizes the signal-

to-noise ratio for its environment.

1.1 Automatic Calibration

It measures the amount of capacitance on each sensor

pin and chooses the best of three possible waveforms

to capture a capacitive measurement.

It analyzes the two final settling voltages of the MTI0

pin to more closely match the waveform on the

MTGRD0 pin.

The settling time for the waveform is calibrated to

maximize sensitivity while minimizing the delay. This

provides the best trade-off between signal and noise

reduction.

Calibration results are stored in the on-board EEPROM

for faster recovery time on next power-up. These

memory locations are accessible for read/write through

the I2C communications to bypass the automatic

calibration, if required.

1.2 Communications

•I

2C, Slave mode

1.3 Touch Configurations

• MTI0 is a dedicated capacitive sensor input

• MTI1/MTGRD0 can either be another capacitive

sensor or a guard driver for MTI0

1.4 Signal Resolution

• 13 bits

1.5 Pin Description

1.5.1 MTI0/MTI1

Connect the sensor to this input. An additional resistor

of at least 4.7 kis recommended for best noise

immunity. Sensors up to 40 pF in capacitance are

supported. Sensors work best when the base

capacitance is minimized. This will maximize the

percentage change in capacitance when a finger is

added to the circuit.

1.5.2 MTGRD0

When not scanning the pin for capacitance changes

(MTI1 functionality), the pin will be driven in phase with

MTI0 to minimize the voltage differential between the

two pins. If the MTGRD0 pin’s trace surrounds the

MTI0 pin’s trace, the waveform on MTGRD0 will shield

(or guard) MTI0 from the effect of nearby noise sources

or power planes.

1.5.3 MTO

The mTouch™ sensing output pin is always driven to

either VDD or VSS by the device. The MTCH112

OUTCON register (see Register 3-1) determines the

behavior of the MTO/INT pin. The pin is always active-

low, but the states in which this output occurs can be

adjusted in the device’s OUTCON register. If no options

are selected for output states, the MTO pin acts as an

interrupt to a master device. The MTCH112 will pulse

low for at least 1 ms if any state changes occur. Further

information must be determined by communicating

through I2C with the device.

1.5.4 I2C – SERIAL DATA PIN (SDA)

The SDA pin is the serial data pin of the I2C interface.

The SDA pin is used to write or read the registers and

Configuration bits. The SDA pin is an open-drain

N-channel driver. Therefore, it needs an external pull-

up resistor from the VDD line to the SDA pin. The rec-

ommended resistance value is 1.5 k. Except for Start

and Stop conditions, the data on the SDA pin must be

stable during the high period of the clock. The high or

low state of the SDA pin can only change when the

clock signal on the SCL pin is low. Refer to

Section 2.1.2 “I2C Operation” for more details on I2C

Serial Interface communication.

H H H P

MTCH112

DS41668A-page 4 Preliminary  2012 Microchip Technology Inc.

1.5.5 I2C – SERIAL CLOCK PIN (SCL)

The SCL pin is the serial clock pin of the I2C interface.

The I2C interface only acts as a slave and the SCL pin

accepts only external serial clocks. The input data from

the master device is shifted into the SDA pin on the

rising edges of the SCL clock, and output from the

device occurs at the falling edges of the SCL clock. The

SCL pin is an open-drain N-channel driver. Therefore,

it needs an external pull-up resistor from the VDD line to

the SCL pin. The recommended resistance value is

1.5 k. Refer to Section 2.1.2 “I2C Operation” for

more details on I2C Serial Interface communication.

For more details, see Figure 1 and Ta b le 1.

1.6 Performance

1.6.1 PROXIMITY DISTANCE

The maximum proximity distance will be highly

dependent on the level of noise in the environment. To

maximize the robustness of the controller, the noise

level is measured and used to define how much shift is

required in the signal before a reliable change in state

can be determined. These values were taken in a low-

noise environment. For more details, see Figure 4-2.

1.6.2 RESPONSE TIME

The response time is defined as the maximum amount

of time delay between the sensor’s capacitance signif-

icantly changing and the output being updated based

on the OUTCON register’s configuration.

This amount of time will be dependent on the LPCON

after detecting no significant changes. The fastest

response time can be achieved by setting the LPCON

The controller only sleeps when idle and no changes in

the environment are detected. If a change occurs, the

device will operate without sleeping until the

disturbance or capacitance is removed. For more

details, see Table 4- 2.

1.6.3 HARDWARE

Capacitive sensors are areas of metal connected

through a series resistor of 4.7 kΩ to one of the MTIx

pins. The following diagrams show some example

layout configurations along with the recommended

design guidelines. For more information about the

design of capacitive sensors, see AN1334,

“Techniques for Robust Touch Sensing Design”.

FIGURE 1-1: TWO-SENSOR LAYOUTS

— EXAMPLE

Ground Plane or

Noise Source

MTIN1

MTIN0

(1) (2)

NOTE: 1: 15 mm x 15 mm recommended.

2: Maximize separation distance.

3: Thickness of traces to pin: 0.1 – 0.5 mm

Single Layer PCB, Two Sensors

(3)

Ground Plane or

Noise Source

MTIN1

MTIN0

(1) (2)

NOTE: 1: 15 mm x 15 mm recommended.

2: Maximize separation distance.

3: Thickness of traces to pin: 0.1 – 0.5 mm

Two Layer PCB, Two Sensors

(3)

 2012 Microchip Technology Inc. Preliminary DS41668A-page 5

MTCH112

FIGURE 1-2: GUARD LAYOUTS —

EXAMPLE

(1) (2) (3)

Front View

Back View

(1) (2) (3)

Front View

Back View

Ground Plane or

Adjacent Sensor

Layout for Thin PCBs

Layout for Reverse-side Shielding

(Min. PCB layer separation of 1.5mm is recommended.)

Ground Plane or

Adjacent Sensor

Ground Plane or

Adjacent Sensor

(1) (2) (3)

Layout for Single Layer PCBs

NOTE: 1: 15 mm x 15 mm recommended.

2: >2 mm separation recommended.

3: >2 mm separation recommended.

4: Thickness of traces to pin: 0.1 – 0.5 mm

>0.5 mm separation recommended.

5: Thickness of guard around sensor: 1 mm

MTGRD0

MTIN0

MTGRD0

MTIN0

MTGRD0

MTIN0

MTGRD0

MTIN0

MTGRD0

MTIN0

(4)

E‘ >\

MTCH112

DS41668A-page 6 Preliminary  2012 Microchip Technology Inc.

2.0 I2C™ SERIAL INTERFACE

This device supports the I2C serial protocol. The I2C

module operates in Slave mode, so it does not

generate the serial clock.

2.1 Overview

This I2C interface is a two-wire interface. Figure 2-1

shows a typical I2C Interface connection.

The I2C interface specifies different communication bit

rates. These are referred to as Standard, Fast or High

Speed modes. The MTCH112 device supports these

three modes. The bit rates of these modes are:

• Standard Mode: Bit Rates up to 100 kbit/s

• Fast Mode: Bit Rates up to 400 kbit/s

A device that sends data onto the bus is defined as a

transmitter, and a device receiving data is defined as a

receiver. The bus has to be controlled by a master

device which generates the serial clock (SCL), controls

the bus access and generates the Start and Stop

conditions. The MTCH112 device works as slave. Both

master and slave can operate as transmitter or

receiver, but the master device determines which mode

is activated. Communication is initiated by the master

(microcontroller) which sends the Start bit, followed by

the slave address byte. The first byte transmitted is

always the slave address byte, which contains the

device code, the address bits and the R/W bit.

FIGURE 2-1: TYPICAL I2C™

INTERFACE

The I2C serial protocol only defines the field types, field

lengths, timings, etc. of a frame. The frame content

defines the behavior of the device. For details on the

frame content (commands/data) refer to Section 2.3

“I2C Commands”.

Refer to the NXP User Manual (UM10204_3) for more

details on the I2C specifications.

There was some concern as to the use of the

Acknowledge bit to indicate a command error

condition. From Section 3.6 of the NXP User Manual

(UM10204_3, Rev 03 - 19 June 2007), the description

states:

“The acknowledge takes place after every byte. The

Acknowledge bit allows the receiver to signal the

transmitter that the byte was successfully received and

another byte may be sent. All clock pulses including the

acknowledge 9th clock pulse are generated by the

master.”

From this we can state that the byte was not “success-

fully received” since it is an invalid combination of

Address/Command.

2.1.1 SIGNAL DESCRIPTIONS

The I2C interface uses up to two pins (signals). These

are:

• SDA (Serial Data) (see Section 1.5.4 “I2C –

Serial Data Pin (SDA)”)

• SCL (Serial Clock) (see Section 1.5.5 “I2C –

Serial Clock Pin (SCL)”)

2.1.2 I2C OPERATION

The MTCH112 device I2C module is compatible with

the NXP I2C specification. The following lists some of

the module’s features:

• 7-bit Slave Addressing

• Supports Two Clock Rate modes:

- Standard mode, clock rates up to 100 kHz

- Fast mode, clock rates up to 400 kHz

• Support Multi-Master Applications

The I2C 10-bit addressing mode is not supported.

The NXP I2C specification only defines the field types,

field lengths, timings, etc. of a frame. The frame

content defines the behavior of the device. The frame

content for this device is defined in Section 2.3 “I2C

Commands”.

I2C BIT STATES AND SEQUENCE

Figure 2-7 shows an I2C 8-bit transfer sequence, while

Figure 2-8 shows the bit definitions. The serial clock is

generated by the master. The following definitions are

used for the bit states:

• Start bit (S)

• Data bit

• Acknowledge (A) bit (driven low) /

No Acknowledge (A) bit (not driven low)

• Repeated Start bit (Sr)

• Stop bit (P)

START BIT

The Start bit (see Figure 2-2) indicates the beginning of

a data transfer sequence. The Start bit is defined as the

SDA signal falling when the SCL signal is high.

FIGURE 2-2: START BIT

SCL

MTCH112

SDA

Host

Controller

Typical I2C™ Interface Connections

SDA

SCL

1st Bit 2nd Bit

 2012 Microchip Technology Inc. Preliminary DS41668A-page 7

MTCH112

DATA BIT

The SDA signal may change state while the SCL signal

is low. While the SCL signal is high, the SDA signal

MUST be stable (see Figure 2-3).

FIGURE 2-3: DATA BIT

ACKNOWLEDGE (A) BIT

The A bit (see Figure 2-4) is typically a response from

the receiving device to the transmitting device.

Depending on the context of the transfer sequence, the

A bit may indicate different things. Typically, the slave

device will supply an A response after the Start bit and

8 data bits have been received. An A bit has the SDA

signal low.

FIGURE 2-4: ACKNOWLEDGE

WAVEFORM

Not A (A) Response

The A bit has the SDA signal high. Table 2-1 shows

some of the conditions where the slave device will

issue a Not A (A).

If an error condition occurs (such as an A instead of A),

then a Start bit must be issued to reset the command

state machine.

SDA

SCL

Data Bit

1st Bit 2nd Bit

SDA

SCL

TABLE 2-1: MTCH112 A / A RESPONSES

Event

Acknowledge

Bit

Response

Comment

General Call A

Slave Address valid A

Slave Address not valid A

Communication during EEPROM

Write cycle

AThe device will NACK after a valid write sequence until all

bytes are executed.

Bus Collision N/A Treated as “Don’t Care” if the collision occurs on the Start

bit. Otherwise, I2C™ resets.

IIIII IIIIII

MTCH112

DS41668A-page 8 Preliminary  2012 Microchip Technology Inc.

REPEATED START BIT

The Repeated Start bit (see Figure 2-5) indicates that

the current master device wishes to continue commu-

nicating with the current slave device without releasing

the I2C bus. The Repeated Start condition is the same

as the Start condition, except that the Repeated Start

bit follows a Start bit (with the data bits + A bit) and not

a Stop bit.

The Start bit is the beginning of a data transfer

sequence and is defined as the SDA signal falling when

the SCL signal is high.

FIGURE 2-5: REPEAT START

CONDITION WAVEFORM

STOP BIT

The Stop bit (see Figure 2-6) indicates the end of the

I2C data transfer sequence. The Stop bit is defined as

the SDA signal rising when the SCL signal is high.

A Stop bit resets the I2C interface of the MTCH112

device.

FIGURE 2-6: STOP CONDITION

RECEIVE OR TRANSMIT

MODE

2.1.2.1 Clock Stretching

Clock stretching is something that the receiving device

can do to allow additional time to respond to the data

that has been received.

This device will stretch the clock signal (SCL) after a

Write command to allow the EEPROM write operation

to complete.

2.1.2.2 Aborting a Transmission

If any part of the I2C transmission does not meet the

command format, it is aborted. This can be intentionally

accomplished with a Start or Stop condition. This is

done so that noisy transmissions (usually an extra Start

or Stop condition) are aborted before they corrupt the

device.

FIGURE 2-7: TYPICAL 8-BIT I2C™ WAVEFORM FORMAT

FIGURE 2-8: I2C™ DATA STATES AND BIT SEQUENCE

Note 1: A bus collision during the Repeated Start

condition occurs if:

• SDA is sampled low when SCL goes

from low-to-high.

• SCL goes low before SDA is

asserted low. This may indicate that

another master is attempting to

transmit a data “1”.

SDA

SCL

Sr = Repeated Start

1st Bit

SCL

SDA A / A

1st Bit

SDA

SCL

S2nd Bit 3rd Bit 4th Bit 5th Bit 6th Bit 7th Bit 8th Bit PA / A

SCL

SDA

Start

Condition Stop

Condition

Data allowed

to change

Data or

A valid

E‘

 2012 Microchip Technology Inc. Preliminary DS41668A-page 9

MTCH112

2.1.2.3 Slope Control

This device does not implement slope control on the

SDA output.

2.1.2.4 Device Addressing

The address byte is the first byte received following the

Start condition from the master device. The full 7 bits of

the I2C slave address is user programmable. The

default address is “1110011”.

Figure 2-9 shows the I2C slave address byte format,

which contains the seven address bits and a Read/

Write (R/W) bit.

FIGURE 2-9: SLAVE ADDRESS BITS IN

THE I2C™ CONTROL

BYTE

Start bit Read/Write bit

Address Byte

R/W ACK

Acknowledge bit

Slave Address

A6 A5 A4 A3

Slave Address (7 bits)

A2 A1 A0

Note 1: Address Bits (A6:A0) can be reprogrammed

by the customer.

111001 1A0 Address

Note 1

MTCH112

DS41668A-page 10 Preliminary  2012 Microchip Technology Inc.

2.2 Device Commands

This section documents the commands that the device

supports.

The commands can be grouped into the following

categories:

• Write Memory

• Read Memory

TABLE 2-2: RESET TO FACTORY SETTINGS

Desc. Start Device Write Protection Reset Command Checksum(1) Stop

Example S 0xE6 0x55 0xAA 0x00 0xFF 0x00 P

Notes —Write Required Factory Settings ——

Note 1: Checksum is the binary XOR of all bytes except the device address.

TABLE 2-3: WRITE TO REGISTER

Desc. Start Device Write Protection Register Value Checksum(1) Stop

Example S 0xE6 0x55 0xAA 0x01 0x01 0xFF P

Notes —Write Required OUTCON ———

Note 1: Checksum is the binary XOR of all bytes except the device address.

TABLE 2-4: READ FROM REGISTER

Desc. Start Device Register Restart Device Data Stop Start Device Checksum(1) Stop

Example S0xE6 0x80 S 0xE7 —PS0xE7 0xZZ P

Notes Write STATE Read —Read —

Note 1: Read checksum is the binary XOR of all bytes in the Data column. This is an optional step. The checksum

can be ignored if the master does not wish to read it.

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 2012 Microchip Technology Inc. Preliminary DS41668A-page 11

MTCH112

2.3 I2C COMMANDS

The I2C protocol does not specify how commands are

formatted, so this section specifies the MTCH112

device’s I2C command formats and operation.

The commands can be grouped into the following

categories:

• Write Commands

• Read Commands

The supported commands are shown in Table 2-2,

Table 2-3 and Table 2-4 .

2.3.1 WRITE COMMANDS

Write commands are used to transfer data to the

desired memory location (from the Host controller). The

Write command form writes the device address, 0x55,

0xAA, the data address, the value to write and an XOR

checksum.

2.3.2 READ COMMANDS

The Read command format writes two bytes, the

control byte and the desired memory address byte, and

then has a Restart condition. Then a second control

byte is transmitted, but this control byte indicates a I2C

read operation (R/W bit = 1).

2.3.3 RESET TO FACTORY SETTINGS

COMMAND

Resetting the device to factory settings is equivalent to

writing the value 0xFF to the data address 0x00. The

proper write protocol must be followed, including the

address byte with the Write bit set, 0x55, 0xAA and a

binary XOR checksum at the end.

2.3.4 ABORTING A COMMAND

TRANSMISSION

A Restart or Stop condition in an expected data bit posi-

tion will abort the current command sequence and data

will not be written to the MTCH112. Write commands

are automatically aborted if the binary XOR checksum

is not valid.

2.3.5 WRITE COMMAND

(NORMAL AND HIGH VOLTAGE)

The format of the command is shown in Figure 2-10.

The MTCH112 generates the A/A bits.

A Write command will only start a Write cycle after a

properly formatted Write command has been received

and the Stop condition has occurred.

2.3.5.1 Writing to Memory

The protocol allows for a variable number of bytes to be

written to the device at a time. Once the Stop bit has

been sent, a time delay is required while the EEPROM

write cycle stores each data byte. While the device is

writing the EEPROM, the address will be changed (by

toggling the Least Significant address bit of the device,

then toggling back once finished) to prevent accidental

double writes. An error may occur if a Write command

is sent while the EEPROM is still storing the previous

bytes. While the writing is being performed, reads to

the normal device address will result in a NACK.

Figure 2-10 shows the waveform for a single write.

FIGURE 2-10: WRITE RANDOM ADDRESS COMMAND

S0AD

AD AD AD AD

A A

4567

I2C™ Slave Address

Device

Memory

Address

Write bit

ACCCCC CCC AP

Write Data (Optional)

01234567

DDDDD DDD

01234567

01010101

10101010

Required Write Unlock Sequence

DDDDD DDD

01234567

Write Data

XOR Checksum

2‘ E‘ 2‘ more data, oran K Read bit r—’ﬁl — \—v—J /—’ﬁ /—’%1 I \L \ A A 65432101

MTCH112

DS41668A-page 12 Preliminary  2012 Microchip Technology Inc.

2.3.6 READ COMMAND

The Read command can be issued to all memory

locations. The format of the command (see

Figure 2-11) includes the Start condition, I2C control

byte (with R/W bit set to 0), A bit, the data address byte,

A bit, followed by a Repeated Start bit, I2C control byte

(with R/W bit set to 1) and the MTCH112 device

transmitting the requested data bytes one at a time until

the master sends a Stop condition.

The I2C control byte requires the R/W bit equal to a

logic one (R/W = 1) to generate a read sequence. The

memory location read will start at the requested data

address and automatically increments by one after

each byte request. Notice that the read operation

packets do not include the 0x55 and 0xAA Write

protection bytes.

After the Stop condition has been received, if a Start

condition is followed by the device address, the device

will send the XOR checksum of the data bytes from the

previous read packet. This allows the checksum to be

ignored by the master, if desired.

Read operations initially include the same address byte

sequence as the write sequence (shown in Figure 2-10).

This sequence is followed by another control byte

(including the Start condition and Acknowledge) with the

R/W bit equal to a logic one (R/W = 1) to indicate a read.

The MTCH112 will then transmit the data contained in

the addressed register. This is followed by the master

generating an A bit in preparation for more data, or an A

bit followed by a Stop. The sequence is ended with the

master generating a Stop or Restart condition.

Figure 2-11 shows the waveforms for a single read.

2.3.6.1 Ignoring an I2C Transmission and “Falling

Off” the Bus

The MTCH112 device expects to receive complete,

valid I2C commands and will assume any command

not defined as a valid command is due to a bus

corruption and will enter a passive high condition on

the SDA signal. All signals will be ignored until the next

valid Start condition and control byte are received.

FIGURE 2-11: RANDOM READ COMMAND

Stop bit

AD AD AD AD

I2C™ Slave Address Data Memory Address

DDDD D D DD

A1DDDDD DDDP

Read bit Read Data Byte (Optional)

Note 1: Master device is responsible for A/A signal. If a A signal occurs, the MTCH112 will abort this

transfer and release the bus.

0123456701234567

I2C Slave Address

Write bit

SASr

Repeated Start bit

Read bit

XOR Checksum

AD AD

Read Data Byte

I2C Slave Address

(1) En) Em Em

 2012 Microchip Technology Inc. Preliminary DS41668A-page 13

MTCH112

3.0 CONFIGURATION REGISTERS

The registers in the MTCH112 have been organized in

two groups: the Configuration registers and the output

registers. The output registers are in the 0x80 (and

higher) address range and are read-only. They provide

the current sensor data for each input. The Configura-

tion registers are both writable and readable. They

show the current scan options and define the systems

behavior.

To restore the Configuration registers to their default

states and force a recalibration of the sensors, perform

a write operation of 0xFF to address 0x00.

3.1 Output Control Register

(OUTCON)

This register contains the control bits for the MTO/INT

pin to determine its behavior. If multiple bits in this

before the output is determined. For example, if the

S1BOE and S0BOE bits are set, the MTO pin will

output low if either MTI0 or MTI1 detect a button touch.

If the S1POE and S0POE bits are set, the MTO pin will

output low if either MTI0 or MTI1 make a proximity

detection. If none of the bits are set, the pin will perform

as a 1 ms pulsed interrupt pin for the I2C master. (see

U-0 U-0 U-0 U-0 R/W-0/u R/W-0/u R/W-1/u R/W-1/u

— — — —S1POE

(1) S0POE(1) S1BOE(1) S0BOE(1)

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-4 Unimplemented: Read as ‘0’

bit 3 S1POE: Sensor 1 Proximity Output Enable bit

1 = Output pin activates when Sensor 1 makes a proximity detection

0 = Output pin does not change based on Sensor 1’s proximity detection

bit 2 S0POE: Sensor 0 Proximity Output Enable bit

1 = Output pin activates when Sensor 0 makes a proximity detection

0 = Output pin does not change based on Sensor 0’s proximity detection

bit 1 S1BOE: Sensor 1 Button Output Enable bit

1 = Output pin activates when Sensor 1 makes a button press detection

0 = Output pin does not change based on Sensor 1’s button press detection

bit 0 S0BOE: Sensor 0 Button Output Enable bit

1 = Output pin activates when Sensor 0 makes a button press detection

0 = Output pin does not change based on Sensor 0’s button press detection

Note 1: If all output enable bits are ‘0’, the output pin will behave as a wake-up signal to the master. It will be set

active-low whenever new data becomes available.

MTCH112

DS41668A-page 14 Preliminary  2012 Microchip Technology Inc.

3.2 Calibration Control Registers

(CALCONx)

This register contains the calibration information for

MTIx. It stores the chosen waveform type and whether

or not the calibration has been completed. To recali-

brate a sensor, clear its respective SxCAL bit in the

CALCONx register (see Register 3-2 and Register 3-3).

R/W-0/u R/W-0/u U-0 U-0 U-0 U-0 R/W-0/u U-1

S0WS<1:0> — — — —S0CAL—

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-6 S0WS<1:0>: Sensor 0 Waveform Selection bits

00 = Normal mTouch™ sensing CVD Waveform

01 = Double mTouch™ sensing CVD Waveform

10 = Half mTouch™ sensing CVD Waveform

11 = Reserved. Results in Double mTouch™ sensing CVD Waveform

bit 5-2 Unimplemented: Read as ‘0’

bit 1 S0CAL: Sensor 0 Calibrated bit

1 = Sensor 0 calibration complete

0 = New Sensor 0 calibration requested

bit 0 Unimplemented: Read as ‘0’

R/W-0/u R/W-0/u U-0 U-0 U-0 U-0 R/W-0/u R/W-1/u

S1WS<1:0> — — — — S1CAL S1EN

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-6 S1WS<1:0>: Sensor 1 Waveform Selection bits

00 = Normal mTouch™ sensing CVD Waveform

01 = Double mTouch™ sensing CVD Waveform

10 = Half mTouch™ sensing CVD Waveform

11 = Reserved. Results in Double mTouch™ sensing CVD Waveform

bit 5-2 Unimplemented: Read as ‘0’

bit 1 S1CAL: Sensor 1 Calibrated bit

1 = Sensor 1 calibration complete

0 = New Sensor 1 calibration requested

bit 0 S1EN: Sensor 1 Enabled bit

1 = Sensor 1 is enabled. Scanning and decoding active.

0 = Sensor 1 is disabled. No scanning or decoding is performed.

 2012 Microchip Technology Inc. Preliminary DS41668A-page 15

MTCH112

3.3 ADC Acquisition Time Registers

(ADACQx)

This stores the settling delay time for the CVD

waveform. This value is part of the recalibration

process and will be overwritten if the SxCAL bit is

cleared (see Register 3-4 and Register 3-5).

U-0 U-0 U-0 R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u

— — — S0ACQ<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 S0ACQ<4:0>: Sensor 0 Acquisition Delay bits

U-0 U-0 U-0 R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u

— — — S1ACQ<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 S1ACQ<4:0>: Sensor 1 Acquisition Delay bits

MTCH112

DS41668A-page 16 Preliminary  2012 Microchip Technology Inc.

3.4 Low-Power Control Register

(LPCON)

This register provides the low-power options for the

MTCH112. It determines how long the device will sleep

when no detections have been made, and how fast the

internal oscillator will run. If the CLKSEL bit is set, the

valid VDD operating range will decrease. See the bit

description in Register 3-6 for more information.

U-0 U-0 R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-1/u R/W-1/u

— — SLEEP<4:0> CLKSEL

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-6 Unimplemented: Read as ‘0’

bit 5-1 SLEEP<4:0>: Sleep duration between scans when inactive

00000 = 1 ms, typical sleep duration

00001 = 2 ms, typical sleep duration

00010 = 4 ms, typical sleep duration

00011 = 8 ms, typical sleep duration

00100 = 16 ms, typical sleep duration

00101 = 32 ms, typical sleep duration

00110 = 64 ms, typical sleep duration

00111 = 128 ms, typical sleep duration

01000 = 256 ms, typical sleep duration

01001 = 512 ms, typical sleep duration

01010 = 1 sec, typical sleep duration

01011 = 2 sec, typical sleep duration

01100 = 4 sec, typical sleep duration

01101 = 8 sec, typical sleep duration

01110 = 16 sec, typical sleep duration

01111 = 32 sec, typical sleep duration

10000 = 64 sec, typical sleep duration

10001 = 128 sec, typical sleep duration

10010 = 256 sec, typical sleep duration

10011 = Reserved. Results in 1 ms sleep duration.

...

11111 = Reserved. Results in 1 ms sleep duration.

bit 0 CLKSEL: Oscillator Selection bit

1 = Internal oscillator runs at 32 MHz

Decreases response time

Increases power consumption

Valid VDD operating range when selected is 2.5V-3.6V

0 = Internal oscillator runs at 16 MHz

Decreases response time

Increases power consumption

Valid VDD operating range when selected is 1.8V-3.6V

 2012 Microchip Technology Inc. Preliminary DS41668A-page 17

MTCH112

3.5 Press Threshold Register

(PRESS_THRESH)

The register stores the minimum shift amount of the

signal away from the baseline that is required to

activate a sensor as “touched”. The real-time threshold

of the sensor is handled internally, based on current

noise levels and the expected press amount. This

value simply creates a lower bound. It is not mandatory

unless the user wishes to ensure that the sensor is not

too sensitive in low-noise environments (see

3.6 Proximity Threshold Register

(PROX_THRESH)

This register is identical to the Press Threshold

Increase this value to decrease the sensitivity of the

sensor in low-noise environments (see Register 3-8).

R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u

PRESS_THSH<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 PRESS_THSH<7:0>: Absolute Minimum Press Threshold

R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u

PROX_THSH<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 PROX_THSH<7:0>: Absolute Minimum Proximity Threshold

MTCH112

DS41668A-page 18 Preliminary  2012 Microchip Technology Inc.

3.7 16-bit Time-Out Register

(TIMEOUT_L and TIMEOUT_H)

This set of registers determines how long the ‘detected’

state is able to remain activated before automatically

being reset to a non-detected state. It also determines

how long after no changes in the environment have

occurred before setting the controller to its Idle state.

When in Idle state, the system will sleep (see

and Register 3-10).

R/W-1/u R/W-1/u R/W-1/u R/W-1/u R/W-1/u R/W-1/u R/W-1/u R/W-1/u

TIMEOUT<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 TIMEOUT<7:0>: Time-out Counter Reload Value, Low Byte

R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-0/u R/W-1/u

TIMEOUT<15:8>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 TIMEOUT<15:8>: Time-out Counter Reload Value, High Byte

 2012 Microchip Technology Inc. Preliminary DS41668A-page 19

MTCH112

3.8 I2C Address Register (I2CADDR)

This register determines the I2C address of the slave.

After writing to this register, command immediately

should begin using the new address value (see

R/W-1/u R/W-1/u R/W-1/u R/W-0/u R/W-0/u R/W-1/u R/W-1/u U-1

I2CADDR<7:1> —

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-1 I2CADDR<7:1>: I2C Address for communication with the MTCH112.

bit 0 Unimplemented: Read as ‘0’

MTCH112

DS41668A-page 20 Preliminary  2012 Microchip Technology Inc.

3.9 State Register (STATE)

This register is read-only. It contains the current touch

and proximity state of MTI0 and MTI1, and provides

error information if a short is detected on any MTIx pin

to VDD, VSS or the other MTIx pin (see Register 3-12).

U-0 R-0/x R-0/x R-0/x R-0/x R-0/x R-0/x R-0/x

—ERRSTATE<2:0> S1PS S0PS S1BS S0BS

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7 Unimplemented: Read as ‘0’

bit 6-4 ERRSTATE<2:0>: Error Status Information bits

000 = Both sensors floating correctly

001 = Sensor 0 is shorted to VDD

010 = Sensor 1 is shorted to VDD

011 = Sensor 0 is shorted to VSS

100 = Sensor 1 is shorted to VSS

101 = Sensors are shorted together

110 = Reserved

111 = Reserved

bit 3 S1PS: Sensor 1 Proximity Status bit

1 = Proximity detected on Sensor 1

0 = No proximity detected on Sensor 1

bit 2 S0PS: Sensor 0 Proximity Status bit

1 = Proximity detected on Sensor 0

0 = No proximity detected on Sensor 0

bit 1 S1BS: Sensor 1 Button Status bit

1 = Button press detected on Sensor 1

0 = No button press detected on Sensor 1

bit 0 S0BS: Sensor 0 Button Status bit

1 = Button press detected on Sensor 0

0 = No button press detected on Sensor 0

 2012 Microchip Technology Inc. Preliminary DS41668A-page 21

MTCH112

3.10 Reading Registers (READINGxL

and READINGxH)

These registers contain the current raw value of the

MTIx pins. They are 13-bit values, but it is

recommended to treat them as 16-bit values to more

easily support future designs (see Register 3-13 to

R-x R-x R-x R-x R-x R-x R-x R-x

READING0L<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 READING0L<7:0>: Sensor 0 Current Reading Value, Low Byte

U-0 U-0 U-0 R-x R-x R-x R-x R-x

— — — READING0H<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 READING0H<4:0>: Sensor 0 Current Reading Value, High Byte

R-x R-x R-x R-x R-x R-x R-x R-x

READING1L<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 READING1L<7:0>: Sensor 1 Current Reading Value, Low Byte

MTCH112

DS41668A-page 22 Preliminary  2012 Microchip Technology Inc.

3.11 Baseline Registers (BASELINExL

and BASELINExH)

These registers contain the current baseline value of

the MTIx pins. They are 13-bit values, but it is

recommended to treat as unsigned 16-bit values to

more easily support future designs (see Register 3-17

to Register 3-20).

U-0 U-0 U-0 R-x R-x R-x R-x R-x

— — — READING1H<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 READING1H<4:0>: Sensor 1 Current Reading Value, High Byte

R-x R-x R-x R-x R-x R-x R-x R-x

BASELINE0L<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 BASELINE0L<7:0>: Sensor 0 Current Baseline Value, Low Byte

U-0 U-0 U-0 R-x R-x R-x R-x R-x

— — — BASELINE0H<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 BASELINE0H<4:0>: Sensor 0 Current Baseline Value, High Byte

 2012 Microchip Technology Inc. Preliminary DS41668A-page 23

MTCH112

R-x R-x R-x R-x R-x R-x R-x R-x

BASELINE1L<7:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-0 BASELINE1L<7:0>: Sensor 1 Current Baseline Value, Low Byte

U-0 U-0 U-0 R-x R-x R-x R-x R-x

— — — BASELINE1H<4:0>

bit 7 bit 0

Legend:

R = Readable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged -n/n = Factory setting value/Value after all Resets

‘1’ = Bit is set ‘0’ = Bit is cleared W = Writable bit

bit 7-5 Unimplemented: Read as ‘0’

bit 4-0 BASELINE1H<4:0>: Sensor 1 Current Baseline Value, High Byte

MTCH112

DS41668A-page 24 Preliminary  2012 Microchip Technology Inc.

TABLE 3-1: REGISTER MAPPING

Address Name Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0

0x00 — — — — — — — — —

0x01 OUTCON — — — — S1POE S0POE S1BOE S0BOE

0x02 CALCON0 S0WS — — — — S0CAL —

0x03 CALCON1 S1WS — — — — S1CAL S1EN

0x04 ADACQ0 S0ACQ<4:0>

0x05 ADACQ1 S1ACQ<4:0>

0x06 LPCON SLEEP<4:0> CLKSEL

0x07 PRESS_THRESH PRESS_THSH<7:0>

0x08 PROX_THRESH PROX_THSH<7:0>

0x09 TIMEOUT_L TIMEOUT<7:0>

0x0A TIMEOUT_H TIMEOUT<15:8>

0x0B I2CADDR I2CADDR<7:1> —

0x0C — — — — — — — — —

0x0D — — — — — — — — —

0x0E — — — — — — — — —

0x0F — — — — — — — — —

0x80 STATE —ERRSTATE<2:0> S1PS S0PS S1BS S0BS

0x81 READING0L READING0L<7:0>

0x82 READING0H — — — READING0H<4:0>

0x83 READING1L READING1L<7:0>

0x84 READING1H — — — READING1H<4:0>

0x85 BASELINE0L BASE0L<7:0>

0x86 BASELINE0H — — — BASE0H<4:0>

0x87 BASELINE1L BASE1L<7:0>

0x88 BASELINE1H — — — BASE1H<4:0>

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 2012 Microchip Technology Inc. Preliminary DS41668A-page 25

MTCH112

4.0 ELECTRICAL SPECIFICATIONS

Absolute Maximum Ratings(†)

Ambient temperature under bias....................................................................................................... -40°C to +125°C

Storage temperature ........................................................................................................................ -65°C to +150°C

Voltage on VDD with respect to VSS .................................................................................................... -0.3V to +4.0V

Voltage on MCLR with respect to Vss ................................................................................................. -0.3V to +9.0V

Voltage on all other pins with respect to VSS ........................................................................... -0.3V to (VDD + 0.3V)

Total power dissipation(1) ............................................................................................................................... 800 mW

Maximum current out of VSS pin, -40°C  TA  +85°C for industrial................................................................. 85 mA

Maximum current into VDD pin, -40°C  TA  +85°C for industrial.................................................................... 80 mA

Clamp current, IK (VPIN < 0 or VPIN > VDD)20 mA

Maximum output current sunk by any I/O pin.................................................................................................... 25 mA

Maximum output current sourced by any I/O pin .............................................................................................. 25 mA

Note 1: Power dissipation is calculated as follows: PDIS = VDD x {IDD –  IOH} +  {(VDD – VOH) x IOH} + (VOl x IOL).

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

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MTCH112

DS41668A-page 26 Preliminary  2012 Microchip Technology Inc.

FIGURE 4-1: VOLTAGE FREQUENCY GRAPH, -40°C





+125°C

Note 1: The shaded region indicates the permissible combinations of voltage and frequency.

1.8

2.5

Frequency (MHz)

VDD (V)

3.6

4.1 DC Characteristics: MTCH112

MTCH112 Standard Operating Conditions (unless otherwise stated)

Operating temperature -40°C  T

A  +85°C for industrial

Param.

No.

Sym. Characteristic Min. Typ† Max. Units Conditions

D001 VDD Supply Voltage 1.8

2.5

—

3.6

CLKSEL = 0

CLKSEL = 1

D002* VDR RAM Data Retention Voltage (1) 1.5 — — V Device in Sleep mode

VPOR*Power-on Reset Release Voltage —1.6— V

VPORR*Power-on Reset Rearm Voltage — 0.8 — V Device in Sleep mode

D004* SVDD VDD Rise Rate to ensure internal

Power-on Reset signal

0.05 — — V/ms

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and

are not tested.

Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.

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 2012 Microchip Technology Inc. Preliminary DS41668A-page 27

MTCH112

TABLE 4-1: CURRENT CONSUMPTION

CLKSEL Sleep (s)

1.8V 3.0V

CLKSEL Sleep (s)

3.0V 3.6V

Typ. (uA) Typ. (uA) Typ. (uA) Typ. (uA)

16 MHz 0 640 990 32 MHz 0 1952 2350

0.001 580 900 0.001 1780 2140

0.002 540 830 0.002 1630 1970

0.004 460 710 0.004 1400 1690

0.008 360 560 0.008 1090 1320

0.016 250 390 0.016 760 915

0.032 160 240 0.032 470 570

0.064 89 140 0.064 270 320

0.128 48 74 0.128 150 170

0.256 25 38 0.256 75 91

0.512 13 20 0.512 39 46

16.8 11 120 24

23.6 5.5 210 12

41.9 3.0 456

81.1 1.8 833

16 0.7 1.1 16 1.7 2

32 0.5 0.8 32 11

64 0.4 0.7 64 0.8 0.9

128 0.3 0.6 128 0.7 0.7

256 0.3 0.5 256 0.6 0.6

TABLE 4-2: RESPONSE TIME(1)

CLKSEL Min. Max.

1 (32 MHz) 20 ms 20 ms + LPCON

0 (16 MHz) 40 ms 40 ms + LPCON

Note 1: It assumes low and/or consistent environmental noise. Response times increase in high and/or erratic

noise conditions.

MTCH112

DS41668A-page 28 Preliminary  2012 Microchip Technology Inc.

FIGURE 4-2: MAXIMUM PROXIMITY DISTANCE vs. SENSOR DIAMETER

FIGURE 4-3: POR AND POR REARM WITH SLOW RISING VDD

0.5

1.5

2.5

3.5

4.5

1.5

2.5

Distance (inch)

Round Pad Diameter (inch)

VDD

VPOR

VPORR

VSS

NPOR(1)

TPOR(3)

POR REARM

Note 1: When NPOR is low, the device is held in Reset.

2: TPOR 1 s typical.

3: TVLOW 2.7 s typical.

TVLOW(2)

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 2012 Microchip Technology Inc. Preliminary DS41668A-page 29

MTCH112

4.2 DC Characteristics: MTCH112-I/E

DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated)

Operating temperature-40°C  T

A  +85°C for industrial

Param

No. Sym. Characteristic Min. Typ† Max. Units Conditions

VIL Input Low Voltage

I/O PORT:

D030A with TTL buffer — — 0.15 VD

V1.8V  VDD  4.5V

D031 with I2C™ levels — — 0.3 VDD V

D032 MCLR ——0.2VDD V

VIH Input High Voltage

I/O ports: — —

D040A with TTL buffer 0.25 VDD

+ 0.8

——V1.8V  VDD  4.5V

D041 with I2C™ levels 0.7 VDD ——V

D042 MCLR 0.8 VDD ——V

IIL Input Leakage Current(1)

D060 I/O ports —

—

± 5

± 125

± 1000

VSS  VPIN  VDD,

Pin at high-impedance at 85°C

125°C

D061 MCLR(2) — ± 50 ± 200 nA VSS  VPIN  VDD at 85°C

VOL Output Low Voltage(3)

D080 I/O ports ——0.6V

IOL = 6 mA, VDD = 3.3V

IOL = 1.8 mA, VDD = 1.8V

VOH Output High Voltage(3)

D090 I/O ports VDD - 0.7 — — V IOH = 3 mA, VDD = 3.3V

IOH = 1 mA, VDD = 1.8V

Capacitive Loading Specs on Output Pins

D101A* CIO All I/O pins — — 50 pF

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Note 1: Negative current is defined as current sourced by the pin.

2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified

levels represent normal operating conditions. Higher leakage current may be measured at different input

voltages.

3: Including OSC2 in CLKOUT mode.

&& is mdiiions Iéo/ gm: Load Condiiion pi s, 15 pror e slaied hese pegs are (0 Itio l;\nless Mherwis 53/7/\1 :c/yAcI “KW

MTCH112

DS41668A-page 30 Preliminary  2012 Microchip Technology Inc.

FIGURE 4-4: LOAD CONDITIONS

TABLE 4-3: CLKOUT AND I/O TIMING PARAMETERS

4.3 Memory Programming Requirements

DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated)

Operating temperature -40°C  TA  +125°C

Param

No. Sym. Characteristic Min. Typ† Max. Units Conditions

Data EEPROM Memory

D116 EDByte Endurance 100K — — E/W -40C to +85C

D117 VDRW VDD for Read/Write VDDMIN —VDDMAX V

D118 TDEW Erase/Write Cycle Time — 4.0 5.0 ms

D119 TRETD Characteristic Retention 20 — — Year Provided no other

specifications are violated

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

Legend: CL = 50 pF for all pins, 15 pF for

OSC2 output

Load Condition

Standard Operating Conditions (unless otherwise stated)

Operating Temperature -40°C T

A +125°C

Param

No. Sym. Characteristic Min. Typ† Max. Units Conditions

OS18* TioR Port output rise time —

—

140

ns VDD = 1.8V

VDD = 3.0-5.0V

OS19* TioF Port output fall time —

—

ns VDD = 1.8V

VDD = 3.0-5.0V

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25C unless otherwise stated.

 2012 Microchip Technology Inc. Preliminary DS41668A-page 31

MTCH112

FIGURE 4-5: BROWN-OUT RESET TIMING AND CHARACTERISTICS

TABLE 4-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER

AND BROWN-OUT RESET PARAMETERS

Standard Operating Conditions (unless otherwise stated)

Operating Temperature -40°C TA +125°C

Param

No. Sym. Characteristic Min. Typ† Max. Units Conditions

30 TMCL RESET Pulse Width (low) 2

—

s

VDD = 3.3-5V, -40°C to +85°C

VDD = 3.3-5V

31 TWDTLP Watchdog Timer Time-out Period 10 16 27 ms VDD = 3.3V-5V,

1:16 Prescaler used

33* TPWRT Power-up Timer Period 40 65 140 ms

34* TIOZ I/O High-impedance from RESET

Low or Watchdog Timer Reset

——2.0s

35 VBOR Brown-out Reset Voltage 1.80 1.9 2.05 V BORV=1.9V

37* VHYST Brown-out Reset Hysteresis 0 25 50 mV -40°C to +85°C

38* TBORDC Brown-out Reset DC Response

Time

0140sVDD  VBOR

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance

only and are not tested.

VBOR

VDD

(Device in Brown-out Reset) (Device not in Brown-out Reset)

Reset

(due to BOR)

VBOR and VHYST

MTCH112

DS41668A-page 32 Preliminary  2012 Microchip Technology Inc.

FIGURE 4-6: I2C™ BUS START/STOP BITS TIMING

FIGURE 4-7: I2C™ BUS DATA TIMING

Note: Refer to Figure 4-4 for load conditions.

SP91

SP92

SP93

SCLx

SDAx

Start

Condition

Stop

Condition

SP90

Note: Refer to Figure 4-4 for load conditions.

SP90

SP91 SP92

SP100

SP101

SP103

SP106 SP107

SP109 SP109

SP110

SP102

SCLx

SDAx

Out

 2012 Microchip Technology Inc. Preliminary DS41668A-page 33

MTCH112

TABLE 4-5: I2C™ BUS DATA REQUIREMENTS

Param.

No. Symbol Characteristic Min. Max. Units Conditions

SP100* THIGH Clock high time 400 kHz mode 0.6 — s Device must operate at a

minimum of 10 MHz

SSPx module 1.5TCY ——

SP101* TLOW Clock low time 400 kHz mode 1.3 — s Device must operate at a

minimum of 10 MHz

SP102* TRSDAx and SCLx

rise time

400 kHz mode 20 + 0.1CB300 ns CB is specified to be from

10-400 pF

SP103* TFSDAx and SCLx

fall time

400 kHz mode 20 + 0.1CB250 ns CB is specified to be from

10-400 pF

SP106* THD:DAT Data input hold

time

400 kHz mode 0 0.9 s

SP107* T

SU:DAT Data input setup

time

400 kHz mode 100 — ns

SP109* T

AA Output valid from

clock

400 kHz mode — — ns

SP110* TBUF Bus free time 400 kHz mode 1.3 — s Time the bus must be free

before a new transmission

can start

SP111 CBBus capacitive loading — 400 pF

* These parameters are characterized but not tested.

NNN

MTCH112

DS41668A-page 34 Preliminary  2012 Microchip Technology Inc.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

8-Lead SOIC (3.90 mm) Example

NNN

MTCH112

/SN1243

017

8-Lead DFN (3x3x0.9 mm) Example

XXXX

NNN

YYWW

PIN 1 PIN 1

MFT0

1243

017

*Standard PIC® device marking consists of Microchip part number, year code, week code, and traceability

code. For PIC device marking beyond this, certain price adders apply. Please check with your Microchip

Sales Office. For QTP devices, any special marking adders are included in QTP price.

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

s-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] NOTEl E . ‘+ 2x l2TlPS NXb * BE! TOFVIEW A<—| —="" -="" -+—="" seating="" plane="" i="" m="" 7="" side="" view="" a="" rm="" a="" l‘l="" view="" a-a="" mlcmchlp="" technology="" drawmg="" na="" 004—0570="" sheel="" 1="" of="" 2="">

 2012 Microchip Technology Inc. Preliminary DS41668A-page 35

MTCH112

5.2 Package Details

The following sections give the technical details of the packages.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] UHlls MILLlMETERS Dimenslon Limits MIN l NOM l MAX Number 01 Plrls N 5 Pitcn e 1.27 BSC Overall Heigm A . . 1.75 Molded Package Thickness A2 1.25 . . Stands" § A1 0.10 . 0.25 Overall Wldth E 5.00 BSC Malded Package Wldm E1 3.90 850 Overall Length D 4.90 350 Chamier (Optional) n 0.25 . 0.50 Fool Length L 0.40 . 1.27 Feetpnnt Ll 1.04 REF Fool Angle w 0° . 5° Lead Thickness c 0.17 — 0.25 Lead Wrdtn a 0.31 — 0.51 Mold malt Angle Top at 5° — 15° Mold Dian Angle Bollom 73 5° — 15° Notes: 1. Plrl 1 vlsual lridex fealure may vary, hul musl be located wiinrn lhe hatched area 2. § 5rgnirreant Characterlstic 3 Dlmenslans D and E1 do not lnclude mold flash or prulmslons Mold flash or protrusions shall not exceed 0.15mm per side 4. Drmensianrng and toleraneing per ASME v14 5M asc: Basro Drmensron Theorellcally exact value shown wrlnout tolerances REF: Relerence Drmensron, usually wllhoul tolerance. for lnlormallon purposes only Mlcrachip Technology Drawing No c047057c street 2 012

MTCH112

DS41668A-page 36 Preliminary  2012 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Notes: A / S‘LK SCREEN LJULJ A X1 RECOMMENDED LAND PATI'ERN Umts MILUMETERS Dxmension mens MIN \ NOM \ MAX Contad Pitch E 1.27 BSC Contact Pad Spacmg c 5 40 Contact Pad Wwdm (X8) X1 0.60 Contad Pad Length (X5) Y1 1 55 1 Dimenswoning and to‘erancing per ASME v14 SM 850 Basic Dimenswon. Theorencauy exam value shown wunom merances. Mlchcmp Technology Drawmg No GOA-2057A

 2012 Microchip Technology Inc. Preliminary DS41668A-page 37

MTCH112

 !"#$%

& !"#$%&"'""($)%

*++&&&!!+$

8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9mm Body [DFN] NOTE1 J 2x Q 0.10 0 2x @010 c TOPVIEW // 010 c A ¢ SEAT‘NG PLANE M f‘ 77777 3x (A37 A17 Elma \ -\ \\ \\\\\\\\\‘jl/ (DATUMA) E2 ,3,_;\\$ ,ﬁ:ﬁ i (DATUM a) ! E K — —_ J L— gXb $ 00703 c AIBI 005® c BO'I'I'OM VIEW chrcchlp Techno‘ogy Drawlng N0 GIN-062C SheeH 0'2

MTCH112

DS41668A-page 38 Preliminary  2012 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9mm Body [DFN] NOTE 2 Unlts MILLIMETERS Dlmenslon lelts MN | NOM l MAX Number ol Plns N a Pltort e o 65 Bsc Overall Helghl A 0 so 0 90 1 00 S|andoﬂ A1 0.00 0 02 0 05 Contact Thickness A3 0.20 REF Overall Length D 3 00 BSC Exposed Pad Wldtn E2 1 34 | . l 1 60 Overall Wldm E 3 00 ESC Expased Pad Length DZ 1.60 - 2 40 Contact wlatn o 0.25 0 30 0 35 Contact Lengtn L 0.20 0 30 0 55 ContactrlosExposed Fad K 0.20 . . Notes: 1. Pm 1 visual lndex leature may vary. but must oe located wllhin the natcheo area 2 Package may nave one or more exposed lle bars at ends. 3 Package 1s saw singulateo 4. Dlmensmnlng ano tolerancing perASME Y14.5M 380 Basic Dlmenslon Theorellcally exacl value Shawn wilnout tolerances REF: Relerence Drrnensron, usually wllhoul tolerance. tor lnformatlon purposes only. Mlcrochlp Tecnnology Drawlng No 004-0620 Sheel 2 of 2

 2012 Microchip Technology Inc. Preliminary DS41668A-page 39

MTCH112

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9mm Body [DFN] W2 C1 T2 \ SILK SCREEN RECOMMENDED LAND PATTERN Umts MILUMETERS Dtmenslcn Ltmtts MIN | NOM \ MAX (:0an Ptton E o 65 BSC Ophonal Center no wmtn w2 2 40 Ophonal Center Fad Lenglh 12 1 55 Contact Pao Spacmg 01 3 to Contact Fad Wldm (X8) x1 0 35 Contact Pad Length (X8) v1 0 65 Dustance Between Pads 6 0 30 Notes: 1 Dimensoning and toteranoing per ASME v14 SM 380 Basic Dimenston. Theoreuca‘ly exact value shown wttham to‘erances. Microchtp Technology Drawmg No. 004720628

MTCH112

DS41668A-page 40 Preliminary  2012 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2012 Microchip Technology Inc. Preliminary DS41668A-page 41

MTCH112

APPENDIX A: DATA SHEET

REVISION HISTORY

Revision A (11/2012)

Initial release of this data sheet.

MTCH112

DS41668A-page 42 Preliminary  2012 Microchip Technology Inc.

INDEX

Symbols

I2C Hardware Interface......................................................... 6

Numerics

16-bit Time-out Register (TIMEOUT_L and TIMEOUT_H) . 18

Absolute Maximum Ratings ................................................ 25

ADC Acquisition Time Registers (ADACQx) ....................... 15

Baseline Registers (BASELINExL and BASELINExH) ....... 22

Brown-out Reset (BOR)

Specifications.............................................................. 31

Timing and Characteristics ......................................... 31

Calibration Control Registers (CALCONx)..........................14

Configuration Registers....................................................... 13

Customer Change Notification Service ............................... 43

Customer Notification Service............................................. 43

Customer Support ............................................................... 43

DC Characteristics

Industrial ..................................................................... 29

MTCH112.................................................................... 26

Device Overview ...................................................................3

Electrical Specifications ...................................................... 25

Errata .................................................................................... 2

Features ................................................................................ 1

I2C Address Register (I2CADDR)....................................... 19

I2C™ Communications and Protocol .................................... 6

Internet Address.................................................................. 43

Low Power Control Register (LPCON)................................16

Microchip Internet Web Site................................................43

Oscillator Start-up Timer (OST)

Specifications.............................................................. 31

Output Control Register (OUTCON) ................................... 13

Package Type ....................................................................... 1

Packaging

SOIC, DFN.................................................................. 35

Packaging Information ........................................................ 34

Power-up Timer (PWRT)

Specifications.............................................................. 31

Press Threshold Register (PRESS_THRESH) ................... 17

Proximity Threshold Register (PROX_THRESH)................17

Reader Response ............................................................... 44

Reading Registers (READINGxL and READINGxH).......... 21

Revision History.................................................................. 41

State Register (STATE)...................................................... 20

Timing Diagrams

Brown-out Reset (BOR).............................................. 31

I2C Bus Data............................................................... 32

Timing Requirements

I2C Bus Data............................................................... 33

WWW Address ................................................................... 43

WWW, On-Line Support ....................................................... 2

 2012 Microchip Technology Inc. Preliminary DS41668A-page 43

MTCH112

THE MICROCHIP WEB SITE

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

•Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

•General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

•Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com. Under “Support”, click on

“Customer Change Notification” and follow the

registration instructions.

CUSTOMER SUPPORT

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Development Systems Information Line

Customers should contact their distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

Technical support is available through the web site

at: http://microchip.com/support

MTCH112

DS41668A-page 44 Preliminary  2012 Microchip Technology Inc.

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip

product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our

documentation can better serve you, please FAX your comments to the Technical Publications Manager at

(480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

TO: Technical Publications Manager

RE: Reader Response

Total Pages Sent ________

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device: Literature Number:

Questions:

FAX: (______) _________ - _________

DS41668AMTCH112

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

PART No. Dev =24 41x

 2012 Microchip Technology Inc. Preliminary DS41668A-page 45

MTCH112

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X/XX XXX

PatternPackageTemperature

Range

Device

Device: MTCH112

Tape and Reel

Option:

Blank = Standard packaging (tube or tray)

T = Tape and Reel(1)

Temperature

Range:

I= -40C to +85C (Industrial)

Package:(2) SN = SOIC

MF = DFN

Pattern: QTP, SQTP, Code or Special Requirements

(blank otherwise)

Examples:

a) MTCH112 - I/MF

Industrial temperature,

DFN package

Note 1: Tape and Reel identifier only appears in the

catalog part number description. This

identifier is used for ordering purposes and is

not printed on the device package. Check

with your Microchip Sales Office for package

availability with the Tape and Reel option.

2: For other small form-factor package

availability and marking information, please

visit www.microchip.com/packaging or

contact your local sales office.

[X](1)

Tape and Reel

Option

MTCH112

DS41668A-page 46 Preliminary  2012 Microchip Technology Inc.

NOTES:

YSTEM

 2012 Microchip Technology Inc. Preliminary DS41668A-page 47

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,

PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash

and UNI/O are registered trademarks of Microchip Technology

Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MTP, SEEVAL and The Embedded Control Solutions

Company are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Silicon Storage Technology is a registered trademark of

Microchip Technology Inc. in other countries.

Analog-for-the-Digital Age, Application Maestro, BodyCom,

chipKIT, chipKIT logo, CodeGuard, dsPICDEM,

dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial

Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB

Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code

Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,

PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,

Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA

and Z-Scale are trademarks of Microchip Technology

Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

GestIC and ULPP are registered trademarks of Microchip

Technology Germany II GmbH & Co. & KG, a subsidiary of

Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 9781620767108

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

QUALITY MANAGEMENT S

YSTEM

CERTIFIED BY DNV

== ISO/TS 16949 ==

6‘ MICROCHIP AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE

DS41668A-page 48 Preliminary  2012 Microchip Technology Inc.

AMERICAS

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

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Web Address:

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Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

China - Hangzhou

Tel: 86-571-2819-3187

Fax: 86-571-2819-3189

China - Hong Kong SAR

Tel: 852-2943-5100

Fax: 852-2401-3431

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

China - Shenzhen

Tel: 86-755-8864-2200

Fax: 86-755-8203-1760

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

ASIA/PACIFIC

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Japan - Osaka

Tel: 81-6-6152-7160

Fax: 81-6-6152-9310

Japan - Tokyo

Tel: 81-3-6880- 3770

Fax: 81-45-471-6122

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Korea - Seoul

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Taiwan - Hsin Chu

Tel: 886-3-5778-366

Fax: 886-3-5770-955

Taiwan - Kaohsiung

Tel: 886-7-213-7828

Fax: 886-7-330-9305

Taiwan - Taipei

Tel: 886-2-2508-8600

Fax: 886-2-2508-0102

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

EUROPE

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Worldwide Sales and Service

11/27/12

Microchip Technology 的 MTCH112 Data Sheet 规格书

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