Analog Devices Inc. 的 ADuM3190 规格书

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High Stability Isolated Error Amplifier
Data Sheet ADuM3190
Rev. A Document Feedback
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FEATURES
Stability in isolated feedback applications
0.5% initial accuracy
1% accuracy over the full temperature range
Compatible with Type II or Type III compensation networks
Reference voltage: 1.225 V
Compatible with DOSA
Low power operation: <7 mA total
Wide voltage supply range
VDD1: 3 V to 20 V
VDD2: 3 V to 20 V
Bandwidth: 400 kHz
Isolation voltage: 2.5 kV rms
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 565 V peak
Wide temperature range
−40°C to +125°C ambient operation
150°C maximum junction temperature
Qualified for automotive applications
APPLICATIONS
Linear power supplies
Inverters
Uninterruptible Power Supply (UPS)
DOSA-compatible modules
Voltage monitors
Automotive systems
GENERAL DESCRIPTION
The ADuM31901 is an isolated error amplifier based on Analog
Devices, Inc., iCoupler® technology. The ADuM3190 is ideal for
linear feedback power supplies. The primary side controllers of
the ADuM3190 enable improvements in transient response,
power density, and stability as compared to commonly used
optocoupler and shunt regulator solutions.
Unlike optocoupler-based solutions, which have an uncertain
current transfer ratio over lifetime and at high temperatures, the
ADuM3190 transfer function does not change over its lifetime,
and it is stable over a wide temperature range of −40°C to +125°C.
Included in the ADuM3190 is a wideband operational amplifier
for a variety of commonly used power supply loop compensation
techniques. The ADuM3190 is fast enough to allow a feedback
loop to react to fast transient conditions and overcurrent condi-
tions. Also included is a high accuracy 1.225 V reference to
compare with the supply output setpoint.
The ADuM3190 is packaged in a small 16-lead QSOP package
for a 2.5 kV rms isolation voltage rating.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
1 Protected by U.S. Patents 5,952,849, 6,873,065 and 7,075,329. Other patents pending.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Tx
Rx
REF
REF
REG
REG UVLO
UVLO
COMP
GND
2
GND
1
–IN
+IN
REF
OUT
V
DD1
GND
1
V
REG1
V
DD2
GND
2
V
REG2
REF
OUT1
NC
EA
OUT2
EA
OUT
11335-001
ADuM3190 Data Sheet
Rev. A | Page 2 of 18
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Package Characteristics ............................................................... 5
Regulatory Information ............................................................... 5
Insulation and Safety Related Specifications ............................ 5
Recommended Operating Conditions ...................................... 5
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 6
Absolute Maximum Ratings ....................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ..............................................9
Test Circuits ..................................................................................... 13
Applications Information .............................................................. 14
Theory of Operation .................................................................. 14
Accuracy Circuit Operation...................................................... 14
Isolated Amplifier Circuit Operation ...................................... 14
Application Block Diagram ...................................................... 15
Setting the Output Voltage ........................................................ 15
DOSA Module Application ....................................................... 15
DC Correctness and Magnetic Field Immunity .......................... 16
Insulation Lifetime ..................................................................... 17
Packaging and Ordering Information ......................................... 18
Outline Dimensions ................................................................... 18
Ordering Guide .......................................................................... 18
Automotive Products ................................................................. 18
REVISION HISTORY
7/15—Rev. 0 to Rev. A
Added W Models ................................................................ Universal
Changes to Features Section and Applications Section ............... 1
Changes to Table 1 ............................................................................ 3
Changes to Regulatory Information Section and Table 3 ........... 5
Changes to DIN V VDE V 0884-10 (VDE V 0884-10)
Insulation Characteristics Section and Table 6 ............................. 6
Change to AC Voltage, Bipolar Parameter, Table 8 ...................... 7
Changes to Figure 12 and Figure 14............................................. 10
Added Figure 16 to Figure 24; Renumbered Sequentially ........ 11
Deleted Figure 24; Renumbered Sequentially ............................ 13
Added Isolated Amplifier Circuit Operation Section ................ 14
Changes to Applications Block Diagram Section ....................... 15
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
Added Automotive Products Section........................................... 18
2/13—Revision 0: Initial Version
Data Sheet ADuM3190
Rev. A | Page 3 of 18
SPECIFICATIONS
VDD1 = VDD2 = 3 V to 20 V for TA = TMIN to TMAX. All typical specifications are at TA = 25°C and VDD1 = VDD2 = 5 V, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min Typ Max Unit
ACCURACY (1.225 V − EAOUT)/1.225 V × 100%; see Figure 27
Initial Error TA = 25°C 0.25 0.5 %
Total Error TA = TMIN to TMAX 0.5 1 %
OP AMP
Offset Error −5 ±2.5 +5 mV
Open-Loop Gain 66 80 dB
Input Common-Mode Range 0.35 1.5 V
Gain Bandwidth Product 10 MHz
Common-Mode Rejection
72
dB
Input Capacitance 2 pF
Output Voltage Range COMP pin 0.2 2.7 V
Input Bias Current 0.01 µA
REFERENCE
Output Voltage 0 mA to 1 mA load, CREFOUT = 15 pF
TA = 25°C 1.215 1.225 1.235 V
TA = TMIN to TMAX 1.213 1.225 1.237 V
Output Current CREFOUT = 15 pF 2.0 mA
UVLO
Positive Going Threshold 2.8 2.96 V
Negative Going Threshold
2.4
2.6
V
EAOUT Impedance VDD2 or VDD1 < UVLO threshold High-Z Ω
OUTPUT CHARACTERISTICS See Figure 29
Output Gain1
A, B, S, and T Grades From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA 0.9 1.0 1.1 V/V
From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA,
VDD1 = 20 V
2.34 2.6 2.86 V/V
WS and WT Grades From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA 0.83 1.0 1.17 V/V
From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA,
VDD1 = 20 V
2.5 2.6 2.7 V/V
Output Offset Voltage From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA −0.2 +0.05 +0.2 V
From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA,
VDD1 = 20 V
−0.1 +0.01 +0.1 V
Output Linearity2 From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA −1.0 +0.15 +1.0 %
From EAOUT to EAOUT2, 0.4 V to 2.1 V, ±1 mA,
VDD1 = 20 V
−1.0 +0.1 +1.0 %
Output −3 dB Bandwidth From COMP to EAOUT, 0.4 V to 2.1 V, ±3 mA,
and from COMP to EAOUT2, 0.4 V to 2.1 V,
±1 mA, VDD1 = 20 V
A, S, and WS Grades 100 200 kHz
B, T, and WT Grades 250 400 kHz
Output Voltage, EAOUT ±3 mA output
Low Voltage 0.4 V
High Voltage 2.4 2.7 V
Output Voltage, EAOUT2 ±1 mA output
Low Voltage VDD1 = 4.5 V to 5.5 V 0.3 0.6 V
V
DD1
= 10 V to 20 V
0.3
0.6
V
High Voltage VDD1 = 4.5 V to 5.5 V 4.8 4.9 V
VDD1 = 10 V to 20 V 5.0 5.4 V
Noise, EAOUT See Figure 15 1.7 mV rms
Noise, EAOUT2 See Figure 15 4.8 mV rms
ADuM3190 Data Sheet
Rev. A | Page 4 of 18
Parameter Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY
Operating Range, Side 1 VDD1 3.0 20 V
Operating Range, Side 2 VDD2 3.0 20 V
Power Supply Rejection DC, VDD1 = VDD2 = 3 V to 20 V 60 dB
Supply Current
IDD1 See Figure 4 1.4 2.0 mA
IDD2 See Figure 5 2.9 5.0 mA
1 Output gain is defined as the slope of the best-fit line of the output voltage vs. the input voltage over the specified input range, with the offset error adjusted out.
2 Output linearity is defined as the peak-to-peak output deviation from the best-fit line of the output gain, expressed as a percentage of the full-scale output voltage.
Table 3‘
Data Sheet ADuM3190
Rev. A | Page 5 of 18
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
RESISTANCE
Input-to-Output1 RI-O 1013 Ω
CAPACITANCE
Input-to-Output1 CI-O 2.2 pF f = 1 MHz
Input Capacitance2 CI 4.0 pF
IC JUNCTION-TO-AMBIENT THERMAL
RESISTANCE
Thermocouple located at center of package underside
16-Lead QSOP θJA 76 °C/W
1 The device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM3190 is approved by the organizations listed in Table 3. See Table 8 and the Insulation Lifetime section for recommended
maximum working voltages for specific cross-isolation waveforms and insulation levels.
Table 3.
UL CSA VDE
Recognized Under 1577 Component
Recognition Program1
Approved under CSA Component
Acceptance Notice #5A
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-122
Single Protection, 2500 V rms Isolation
Voltage, 16-Lead QSOP
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 400 V rms (565 V peak)
maximum working voltage
Reinforced insulation, 565 V peak
File E214400 File 205078 File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 sec (current leakage detection limit = 5 µA).
2 In accordance with DIN V VDE V 0884-10, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection
limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS
Table 4.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 2500 V rms 1-minute duration
Minimum External Air Gap (Clearance) L(I01) 3.8 min mm Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 3.1 min mm Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303, Part 1
Isolation Group II Material Group DIN VDE 0110, 1/89, Table 1
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter Symbol Min Max Unit
OPERATING TEMPERATURE BY MODEL TA
ADuM3190A/ADuM3190B −40 +85 °C
ADuM3190S/ADuM3190T −40 +125 °C
SUPPLY VOLTAGES1 VDD1, VDD2 3.0 20 V
INPUT SIGNAL RISE AND FALL TIMES tR, tF 1.0 ms
1 All voltages are relative to their respective grounds.
Table 6‘
ADuM3190 Data Sheet
Rev. A | Page 6 of 18
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by protective
circuits. The asterisk (*) marking branded on the package denotes DIN V VDE V 0884-10 approval for a 565 V peak working voltage.
Table 6.
Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 565 V peak
Input-to-Output Test Voltage, Method B1 VIORM × 1.875 = Vpd(m), 100% production test,
tini = tm = 1 sec, partial discharge < 5 pC
Vpd(m) 1059 V peak
Input-to-Output Test Voltage, Method A
After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
Vpd(m) 848 V peak
After Input and/or Safety Test Subgroup 2
and Subgroup 3
VIORM × 1.2 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
Vpd(m) 678 V peak
Highest Allowable Overvoltage VIOTM 4000 V peak
Surge Isolation Voltage
V
PEAK
= 10 kV; 1.2 µs rise time; 50 µs, 50% fall time
V
IOSM
6250
V peak
Safety Limiting Values Maximum value allowed in the event of a failure
(see Figure 2)
Case Temperature TS 150 °C
Safety Total Dissipated Power PS 1.64 W
Insulation Resistance at TS VIO = 500 V RS >109 Ω
Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case
Temperature, per DIN V VDE V 0884-10
SAFE LIMITING POWER (W)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0050 100 150 200
AMBIENT TEMPERATURE (°C)
11335-004
Table 7‘ Table 3‘ Maximum Continuous Working Voltage ESD CAUTION A m ESD (elenros‘atk discharge) sensitive devica. Chavged dewces and mum boavds can dwschavge wwham dcmcuon Akhough um pmdud fcamvcs paremed m pmpuemy pvoxenion civcumy, damage may am: on devices summed m mgh enevgy ESD Thevefove, pvopev ESD pvecaunons mama be (aken m avmd pelfmmanze degradation m was: or functionahty
Data Sheet ADuM3190
Rev. A | Page 7 of 18
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 7.
Parameter Rating
Storage Temperature (TST) Range −65°C to +150°C
Ambient Operating Temperature
(TA) Range
−40°C to +125°C
Junction Temperature −40°C to +150°C
Supply Voltages
V
DD1
, V
DD21
−0.5 V to +24 V
VREG1, VREG21 −0.5 V to +3.6 V
Input Voltages (+IN, −IN) −0.5 V to +3.6 V
Output Voltages
REFOUT, COMP, REFOUT1, EAOUT −0.5 V to +3.6 V
EA
OUT2
−0.5 V to +5.5 V
Output Current per Output Pin −11 mA to +11 mA
Common-Mode Transients2 −100 kV/µs to +100 kV/µs
1 All voltages are relative to their respective grounds.
2 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the absolute maximum ratings may cause
latch-up or permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Table 8. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
WAVEFORM
AC Voltage
Bipolar 565 V peak 50-year minimum lifetime
Unipolar 1131 V peak 50-year minimum lifetime
DC Voltage 1131 V peak 50-year minimum lifetime
1 Refers to continuous voltage magnitude imposed across the isolation
barrier. See the Insulation Lifetime section for more details.
ESD CAUTION
ADuM3190 Data Sheet
Rev. A | Page 8 of 18
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Side 1 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD1 and GND1.
2 GND1 Ground Reference for Side 1.
3 VREG1 Internal Supply Voltage for Side 1. Connect a 1 μF capacitor between VREG1 and GND1.
4 REFOUT1 Reference Output Voltage for Side 1. The maximum capacitance for this pin (CREFOUT1) must not exceed 15 pF.
5 NC No Connection. Connect Pin 5 to GND1; do not leave this pin floating.
6 EAOUT2 Isolated Output Voltage 2, Open-Drain Output. Connect a pull-up resistor between EAOUT2 and VDD1 for current up to
1 mA.
7 EAOUT Isolated Output Voltage.
8 GND1 Ground Reference for Side 1.
9 GND2 Ground Reference for Side 2.
10 COMP Output of the Op Amp. A loop compensation network can be connected between the COMP pin and the −IN pin.
11 −IN Inverting Op Amp Input. Pin 11 is the connection for the power supply setpoint and compensation network.
12 +IN Noninverting Op Amp Input. Pin 12 can be used as a reference input.
13 REFOUT Reference Output Voltage for Side 2. The maximum capacitance for this pin (CREFOUT) must not exceed 15 pF.
14 VREG2 Internal Supply Voltage for Side 2. Connect a 1 μF capacitor between VREG2 and GND2.
15 GND2 Ground Reference for Side 2.
16 VDD2 Supply Voltage for Side 2 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD2 and GND2.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
TOP VIEW
(Not to Scale)
ADuM3190
COMP
GND
2
GND
1
–IN
+IN
REF
OUT
V
DD1
NC = NO CONNECTION. CONNECT PIN 5 TO GND
1
;
DO NOT LEAVE THIS PIN FLOATING.
V
REG1
V
DD2
GND
2
V
REG2
REF
OUT1
NC
EA
OUT2
EA
OUT
11335-005
V /\ ”_ fl/flfl“ "’ ,_. _,_— ’9’: /¢,—/ $4,,— ’— ’gi/
Data Sheet ADuM3190
Rev. A | Page 9 of 18
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. Typical IDD1 Supply Current vs. Temperature
Figure 5. Typical IDD2 Supply Current vs. Temperature
Figure 6. +IN, −IN Input Bias Current vs. Temperature
Figure 7. REFOUT Accuracy vs. Temperature
Figure 8. EAOUT Accuracy vs. Temperature
Figure 9. Op Amp Offset Voltage vs. Temperature
0
1
2
3
–40 –20 020 40 60 80 100 120 140
I
DD1
(mA)
TEMPERATURE (°C)
V
DDx
= 20V
V
DDx
= 5V
11335-017
0
1
2
3
4
5
–40 –20 020 40 60 80 100 120 140
I
DD2
(mA)
TEMPERATURE (°C)
V
DDx
= 20V
V
DDx
= 5V
11335-018
–40 –20 020 40 60 80 100 120 140
0
2
4
6
8
10
12
INPUT BIAS CURRENT (nA)
TEMPERATURE (°C)
11335-019
–40 –20 020 40 60 80 100 120 140
1.222
1.223
1.224
1.225
1.226
1.227
1.228
REF
OUT
ACCURACY (V)
TEMPERATURE (°C)
11335-020
–40 –20 020 40 60 80 100 120 140
–1.0
–0.5
0
0.5
1.0
EA
OUT
ACCURACY (%)
TEMPERATURE (°C)
11335-021
–40 –20 020 40 60 80 100 120 140
–3
–2
–1
0
1
2
3
OP AMP OFFSET VOLTAGE (mV)
TEMPERATURE (°C)
11335-022
cm I
ADuM3190 Data Sheet
Rev. A | Page 10 of 18
Figure 10. Op Amp Open-Loop Gain vs. Temperature
Figure 11. EAOUT Gain vs. Temperature
Figure 12. EAOUT2 Gain vs. Temperature
Figure 13. EAOUT Offset Voltage vs. Temperature
Figure 14. EAOUT2 Offset Voltage vs. Temperature
Figure 15. Output Noise with Test Circuit 1 (10 mV/DIV),
Channel 1 = EAOUT, Channel 2 = EAOUT2
–40 –20
100
50
60
70
80
90
020 40 60 80 100 120 140
TEMPERATURE (°C)
OP AMP OPEN-LOOP GAIN (dB)
11335-023
–40 –20
1.05
1.00
1.01
1.02
1.03
1.04
020 40 60 80 100 120 140
TEMPERATURE (°C)
EA
OUT
GAIN (V/V)
11335-024
–40 –20
2.66
2.56
2.58
2.60
2.62
2.64
020 40 60 80 100 120 140
TEMPERATURE (°C)
EA
OUT2
GAIN (V/V)
11335-025
–40 –20
0
–100
–80
–60
–40
–20
020 40 60 80 100 120 140
TEMPERATURE (°C)
EAOUT OFFSET (mV)
11335-026
11335-027
–40 –20
100
–100
–50
0
50
020 40 60 80 100 120 140
TEMPERATURE (°C)
EAOUT2 OFFSET VOLTAGE (mV)
CH1 10mV CH2 10mV M4.0µs A CH1 1.18V
T 102.4ns
ΩΩ
1
2
11335-028
Data Sheet ADuM3190
Rev. A | Page 11 of 18
Figure 16. EAOUT Gain Distribution at 25°C
Figure 17. EAOUT Gain Distribution at 125°C
Figure 18. EAOUT Gain Distribution at −40°C
Figure 19. EAOUT Offset Voltage Distribution at 25°C
Figure 20. EAOUT Offset Voltage Distribution at 125°C
Figure 21. EAOUT Offset Voltage Distribution at −40°C
0.90
30
25
20
15
10
5
0
1.101.051.000.95
COMP TO EA
OUT
GAIN (V/V)
NUMBER OF AMPLIFIERS
11335-116
30
25
20
15
10
5
0
COMP TO EA
OUT
GAIN (V/V)
11335-117
0.90 1.101.051.000.95
NUMBER OF AMPLIFIERS
30
25
20
15
10
5
0
COMP TO EA
OUT
GAIN (V/V)
11335-118
0.90 1.101.051.000.95
NUMBER OF AMPLIFIERS
–0.4
30
25
20
15
10
5
0
0.40.20–0.2
COMP TO EA
OUT
OFFSET VOLTAGE (V)
11335-119
NUMBER OF AMPLIFIERS
–0.4
30
25
20
15
10
5
0
0.40.20–0.2
11335-120
COMP TO EA
OUT
OFFSET VOLTAGE (V)
NUMBER OF AMPLIFIERS
–0.4
30
25
20
15
10
5
0
0.40.20–0.2
11335-121
COMP TO EA
OUT
OFFSET VOLTAGE (V)
NUMBER OF AMPLIFIERS
cm I - - In
ADuM3190 Data Sheet
Rev. A | Page 12 of 18
Figure 22. EAOUT Accuracy Voltage Distribution at 25°C
Figure 23. EAOUT Accuracy Voltage Distribution at 125°C
Figure 24. EAOUT Accuracy Voltage Distribution at −40°C
Figure 25. Output 100 kHz Signal with Test Circuit 3, Channel 1 = +IN,
Channel 2 = EAOUT, Channel 3 = EAOUT2
Figure 26. Output Square Wave Response with Test Circuit 3,
Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2
1.215
30
25
20
15
10
5
0
1.2351.2301.2251.220
EA
OUT
ACCURACY (V)
NUMBER OF AMPLIFIERS
11335-122
1.215
30
25
20
15
10
5
0
1.2351.2301.2251.220
EA
OUT
ACCURACY (V)
NUMBER OF AMPLIFIERS
11335-123
1.215
30
25
20
15
10
5
0
1.2351.2301.2251.220
EA
OUT
ACCURACY (V)
NUMBER OF AMPLIFIERS
11335-124
CH1 100mV CH2 100mV M2µs A CH1 434mV
T 0s
ΩΩ
Ω
CH3 200mV
1
3
2
11335-029
CH1 20mV CH2 50mV M2µs A CH1 399mV
T 5.92µs
ΩΩ
Ω
CH3 20mV
1
3
2
11335-030
Habit.
Data Sheet ADuM3190
Rev. A | Page 13 of 18
TEST CIRCUITS
Figure 27. Test Circuit 1: Accuracy Circuit Using EAOUT
Figure 28. Test Circuit 2: Accuracy Circuit Using EAOUT2
Figure 29. Test Circuit 3: Isolated Amplifier Circuit
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Tx
Rx
REF
REF
REG
REG UVLO
UVLO
COMP
GND
2
GND
1
680Ω
2.2nF
–IN
+IN
REF
OUT
1µF
1µF
1µF
V
DD1
GND
1
V
REG1
V
DD2
GND
2
V
REG2
1µF
REF
OUT1
NC
EA
OUT2
EA
OUT
11335-002
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Tx
Rx
REF
REF
REG
REG UVLO
UVLO
COMP
GND
2
GND
1
–IN
+IN
REF
OUT
1µF
1µF
1µF
V
DD1
GND
1
V
REG1
V
DD2
GND
2
V
REG2
1µF
REF
OUT1
R
OD
NC
EA
OUT2
EA
OUT
11335-003
680Ω
2.2nF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Tx
Rx
REF
REF
REG
REG UVLO
UVLO
COMP
GND
2
GND
1
–IN
+IN
REF
OUT
1µF
1µF
1µF
V
DD1
GND
1
V
REG1
V
DD2
GND
2
V
REG2
1µF
REF
OUT1
R
OD
NC
EA
OUT2
EA
OUT
11335-031
oR AMR Ann LINEAR IsoLAm LINEAR IsoLAmR oR AMR AND LINEAR IsoLAm
ADuM3190 Data Sheet
Rev. A | Page 14 of 18
APPLICATIONS INFORMATION
THEORY OF OPERATION
In the test circuits of the ADuM3190 (see Figure 27 through
Figure 29), external supply voltages from 3 V to 20 V are
provided to the VDD1 and VDD2 pins, and internal regulators
provide 3.0 V to operate the internal circuits of each side of the
ADuM3190. An internal precision 1.225 V reference provides
the reference for the ±1% accuracy of the isolated error amplifier.
UVLO circuits monitor the VDDx supplies to turn on the internal
circuits when the 2.8 V rising threshold is met and to turn off
the error amplifier outputs to a high impedance state when VDDx
falls below 2.6 V.
The op amp on the right side of the device has a noninverting
+IN pin and an inverting −IN pin available for connecting a
feedback voltage in an isolated dc-to-dc converter output, usually
through a voltage divider. The COMP pin is the op amp output,
which can be used to attach resistor and capacitor components in
a compensation network. The COMP pin internally drives the Tx
transmitter block, which converts the op amp output voltage
into an encoded output that is used to drive the digital isolator
transformer.
On the left side of the ADuM3190, the transformer output
PWM signal is decoded by the Rx block, which converts the
signal into a voltage that drives an amplifier block; the amplifier
block produces the error amplifier output available at the EAOUT
pin. The EAOUT pin can deliver ±3 mA and has a voltage level
between 0.4 V and 2.4 V, which is typically used to drive the
input of a PWM controller in a dc-to-dc circuit.
For applications that need more output voltage to drive their
controllers, Figure 28 illustrates the use of the EAOUT2 pin output,
which delivers up to ±1 mA with an output voltage of 0.6 V to 4.8 V
for an output that has a pull-up resistor to a 5 V supply. If the
EAOUT2 pull-up resistor connects to a 10 V to 20 V supply, the
output is specified to a minimum of 5.0 V to allow use with a
PWM controller requiring a minimum input operation of 5 V.
ACCURACY CIRCUIT OPERATION
See Figure 27 and Figure 28 for stability of the accuracy circuits.
The op amp on the right side of the ADuM3190, from the −IN
pin to the COMP pin, has a unity-gain bandwidth (UGBW) of
10 MHz. Figure 30, Bode Plot 1, shows a dashed line for the op
amp alone and its 10 MHz pole.
Figure 30 also shows the linear isolator alone (the blocks from
the op amp output to the ADuM3190 output, labeled as the
linear isolator), which introduces a pole at approximately
400 kHz. This total Bode plot of the op amp and linear isolator
shows that the phase shift is approximately −180° from the −IN
pin to the EAOUT pin before the crossover frequency. Because a
−180° phase shift can make the system unstable, adding an inte-
grator configuration, as shown in the test circuits in Figure 27 and
Figure 28, consisting of a 2.2 nF capacitor and a 680 Ω resistor,
helps to make the system stable. In Figure 31, Bode Plot 2 with an
integrator configuration added, the system crosses over 0 dB at
approximately 100 kHz, but the circuit is more stable with a
phase shift of approximately −120°, which yields a stable 60°
phase margin.
This circuit is used for accuracy tests only, not for real-world
applications, because it has a 680 Ω resistor across the isolation
barrier to close the loop for the error amplifier; this resistor
causes leakage current to flow across the isolation barrier. For
this test circuit only, GND1 must be connected to GND2 to create a
return for the leakage current created by the 680 Ω resistor
connection.
Figure 30. Bode Plot 1
Figure 31. Bode Plot 2
ISOLATED AMPLIFIER CIRCUIT OPERATION
Figure 29 shows an isolated amplifier circuit. In this circuit, the
input side amplifier is set as a unity-gain buffer so that the EAOUT
output follows the +IN input. The EAOUT2 output follows the
EAOUT output, but with a voltage gain of 2.6.
This circuit has an open-drain output, which must be pulled up
to a supply voltage from 3 V to 20 V using a resistor value set
for an output current of up to 1 mA. The EAOUT2 output can be
used to drive up to 1 mA to the input of a device that requires
a minimum input operation of 5 V. T h e E A OUT2 circuit has an
internal diode clamp to protect the internal circuits from
voltages greater than 5 V.
OP AMPAND
LINEAR ISOLATOR
OP AMP
ALONE
FREQUENCY
(Hz)
100 1k 10k 100k 1M 10M
100
–90
100
–180
1k 10k 100k 1M 10M
FREQUENCY
(Hz)
LINEAR ISOLATOR
POLE AT 400kHz
LINEAR
ISOLATOR
PHASE (°)
AMPLITUDE (dB)
11335-006
PHASE (°)
AMPLITUDE (dB)
OP AMPAND
LINEAR ISOLATOR
OP AMP
ALONE
FREQUENCY
(Hz)
100 1k 10k 100k 1M 10M
100
–90
100
–180
1k 10k 100k 1M 10M
FREQUENCY
(Hz)
LINEAR ISOLATOR
POLE AT 400kHz
INTEGRATOR
CONFIGURATION
11335-007
ISOLATED Dom-m: supm men AMP was; . 225v ADuMalsn
Data Sheet ADuM3190
Rev. A | Page 15 of 18
The gain, offset, and linearity of EAOUT and EAOUT2 are specified
in Table 1 using this test circuit. When designing applications
for voltage monitoring using an isolated amplifier, review these
specifications, noting that the 1% accuracy specifications for the
isolated error amplifier do not apply. In addition, the EAOUT circuit
in Figure 29 is shown with an optional external RC low-pass filter
with a corner frequency of 500 kHz, which can reduce the 3 MHz
output noise from the internal voltage to the PWM converter.
APPLICATION BLOCK DIAGRAM
Figure 32 shows a typical application for the ADuM3190: an
isolated error amplifier in primary side control.
Figure 32. Application Block Diagram
The op amp of the ADuM3190 is used as the error amplifier for
the feedback of the output voltage, VOUT, using a resistor divider
to the −IN pin of the op amp. This configuration inverts the
output signal at the COMP pin when compared to the +IN pin,
which is connected to the internal 1.225 V reference.
For example, when the output voltage, VOUT, falls due to a load
step, the divider voltage at the −IN pin falls below the +IN ref-
erence voltage, causing the COMP pin output signal to go high.
The COMP output of the op amp is encoded and then decoded
by the digital isolator transformer block to a signal that drives the
output of the ADuM3190 high. The output of the ADuM3190
drives the COMP pin of the PWM controller, which is designed
to reset the PWM latch output to low only when its COMP pin is
low. A high at the COMP pin of the PWM controller causes the
latching PWM comparator to produce a PWM duty cycle output.
This PWM duty cycle output drives the power stage to increase
the VOUT voltage until it returns to regulation.
The power stage output is filtered by output capacitance and, in
some applications, by an inductor. Various elements contribute to
the gain and phase of the control loop and the resulting stability.
The output filter components (LO and CO) create a double pole;
the op amp has a pole at 10 MHz (see Figure 30), and the linear
isolator has a pole at 400 kHz (see Figure 30 and Figure 31).
The output capacitor and its ESR can add a zero at a frequency
that is dependent on the component type and values. With the
ADuM3190 providing the error amplifier, a compensation network
is provided from the −IN pin to the COMP pin to compensate
the control loop for stability. The compensation network values
depend on both the application and the components that are
selected; information about the component network values is
provided in the data sheet of the selected PWM controller.
The ADuM3190 has two different error amplifier outputs:
EAOUT and EAOUT2. The EAOUT output, which can drive ±3 mA,
has a guaranteed maximum high output voltage of at least 2.4 V,
which may not be sufficient to drive the COMP pin of some
PWM controllers. The EAOUT2 pin can drive ±1 mA and has an
output range that guarantees 5.0 V for a VDD1 voltage range of
10 V to 20 V, which works well with the COMP pin of many
PWM controllers.
Figure 32 shows how to use the ADuM3190 to provide isolated
feedback in the control loop of an isolated dc-to-dc converter. In
this application block diagram, the loop is closed at approxi-
mately the 1.225 V reference voltage, providing ±1% accuracy
over temperature. The ADuM3190 op amp has a high gain band-
width of 10 MHz to allow the dc-to-dc converter to operate at
high switching speeds, enabling smaller values for the output
filter components (LO and CO).
The 400 kHz bandwidth of the ADuM3190 error amplifier output
offers faster loop response for better transient response than the
typical shunt regulator and optocoupler solutions, which typically
have bandwidths of only 25 kHz to 50 kHz maximum.
SETTING THE OUTPUT VOLTAGE
The output voltage in the application circuit can be set with two
resistors in a voltage divider, as shown in Figure 33.
The output voltage is determined by the following equation
where VREF = 1.225 V.
VOUT = VREF × (R1 + R2)/R2 (1)
Figure 33. Setting the Output Voltage
DOSA MODULE APPLICATION
Figure 34 is a block diagram of a Distributed-power Open
Standards Alliance (DOSA) circuit using the ADuM3190.
The block diagram shows how to use the ADuM3190 1.225 V
reference and the error amp in a DOSA standard power supply
module circuit to produce output voltage settings using a
combination of resistors.
The ADuM3190 1.225 V reference is specified for ±1% over the
−40°C to +125°C temperature range. See Table 10 to select the
resistor values to set the output voltage of the module. Two
different ranges of VOUT can be implemented, VOUT > 1.5 V or
VOUT < 1.5 V, depending on the required module.
–IN
+IN
REF
OUT
1.225V
OSC
LATCHING
PWM
V
REF
FB COMP
EA
OUT2
ERROR
AMP
CURRENT
SENSE
POWER
STAGE
VIN
VOUT
C
1
COMPENSATION
NETWORK
L
O
C
O
ESR
DCR
C
2
COMPR
2
+
ADuM3190
PWM CONTROLLER
OP AMP
11335-008
V
REF
1.225V
V
IN
= 0.35V TO 1.5V
ADuM3190
–IN R
1
V
OUT
ISOLATED DC-TO-DC SUPPLY
R
2
+IN
REF
OUT
ERROR
AMP
11335-010
mum DOSA MODULE vW =0 35v m 1.5V ADuM3190
ADuM3190 Data Sheet
Rev. A | Page 16 of 18
Figure 34. DOSA Module
Table 10. Resistor Values for DOSA Module
Module
Nominal Output R3 R4 R5 R6
VOUT > 1.5 V 1 kΩ 1 kΩ 0 Ω Open
VOUT < 1.5 V 1 kΩ 0 Ω 2.05 kΩ 1.96 kΩ
VOUT > 1.5 V 5.11 kΩ 5.11 kΩ 0 Ω Open
VOUT < 1.5 V 5.11 kΩ 0 Ω 10.5 kΩ 10.0 kΩ
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 1 μs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output.
If the decoder receives no internal pulses for more than approx-
imately 3 μs, the input side is assumed to be unpowered or
nonfunctional, in which case the isolator output is forced to
a default high impedance state by the watchdog timer circuit. In
addition, the outputs are in a default high impedance state while
the power is increasing before the UVLO threshold is crossed.
The ADuM3190 is immune to external magnetic fields. The limi-
tation on the ADuM3190 magnetic field immunity is set by the
condition whereby induced voltage in the transformer receiving
coil is sufficiently large to either falsely set or reset the decoder.
The following analysis defines the conditions under which this
can occur. The 3 V operating condition of the ADuM3190 is
examined because it represents the most susceptible mode of
operation. The pulses at the transformer output have an amplitude
that is greater than 1.0 V. The decoder has a sensing threshold at
approximately 0.5 V, therefore establishing a 0.5 V margin within
which induced voltages are tolerated. The voltage induced across
the receiving coil is given by
V = (−dβ/dt) ∑π rn2, n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
rn is the radius of the nth turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM3190 and
an imposed requirement that the induced voltage be, at most,
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated, as shown in Figure 35.
Figure 35. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the maxi-
mum allowable magnetic field of 0.02 kgauss induces a voltage
of 0.25 V at the receiving coil. This is approximately 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and had the worst-case polarity), the received pulse is
reduced from >1.0 V to 0.75 V, still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to specific
current magnitudes at given distances away from the ADuM3190
transformers. Figure 36 shows these allowable current magnitudes
as a function of frequency for selected distances. As shown in
Figure 36, the ADuM3190 is immune and can be affected only by
extremely large currents operating at a high frequency very close
to the component. For the 1 MHz example, a 0.7 kA current
must be placed 5 mm away from the ADuM3190 to affect the
operation of the device.
Figure 36. Maximum Allowable Current for Various
Current-to-ADuM3190 Spacings
V
REF
1.225V
V
IN
= 0.35V TO 1.5V
ADuM3190
R
1
V
OUT
DOSA MODULE
R
2
R
3
R
5
ERROR
AMP
R
4
R
6
R
TRIM-UP
R
TRIM-DOWN
OPTIONAL TRIM UP
OR TRIM DOWN
RESISTOR OR ±10%
OF NOMINAL VALUE
ACCORDING TO DOSA
11335-011
MAGNETIC FIELD FREQUENCY (Hz)
100
MAXIMUM ALLO
W
ABLE MAGNETIC FLUX
DENSITY (kgauss)
0.001 1M
10
0.01
1k 10k 10M
0.1
1
100M100k
11335-012
MAGNETIC FIELD FREQUENCY (Hz)
MAXIMUM ALLO
W
ABLE CURRENT (kA)
1000
100
10
1
0.1
0.011k 10k 100M100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
11335-013
mm: mm vuuAGE
Data Sheet ADuM3190
Rev. A | Page 17 of 18
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insu-
lation degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM3190.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Accel-
eration factors for several operating conditions are determined.
These factors allow calculation of the time to failure at the actual
working voltage.
The values shown in Table 8 summarize the peak voltage for
50 years of service life for a bipolar ac operating condition. In
many cases, the approved working voltage is higher than the
50-year service life voltage. Operation at these high working
voltages can lead to shortened insulation life in some cases.
The ADuM3190 insulation lifetime depends on the voltage wave-
form type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 37,
Figure 38, and Figure 39 illustrate these different isolation
voltage waveforms.
A bipolar ac voltage environment is the worst case for the iCoupler
products yet meets the 50-year operating lifetime recommended
by Analog Devices for maximum working voltage. In the case
of unipolar ac or dc voltage, the stress on the insulation is sig-
nificantly lower. This allows operation at higher working voltages
while still achieving a 50-year service life. Treat any cross-insulation
voltage waveform that does not conform to Figure 38 or Figure 39
as a bipolar ac waveform, and limit its peak voltage to the 50-year
lifetime voltage value listed in Table 8.
Note that the voltage presented in Figure 38 is shown as sinu-
soidal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
Figure 37. Bipolar AC Waveform
Figure 38. Unipolar AC Waveform
Figure 39. DC Waveform
0V
RATED PEAK VOLTAGE
11335-014
0V
RATED PEAK VOLTAGE
11335-015
0V
RATED PEAK VOLTAGE
11335-016
7.7%? i [E ORDERING GUIDE mouixms Analog mum, In(. All "ng mum. Tvidtmavks and ANALOG DEVICES
ADuM3190 Data Sheet
Rev. A | Page 18 of 18
PACKAGING AND ORDERING INFORMATION
OUTLINE DIMENSIONS
Figure 40. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model
1, 2
Temperature Range
Bandwidth (Typical)
Package Description
Package Option
ADuM3190ARQZ
−40°C to +85°C
200 kHz
16-Lead QSOP
RQ-16
ADuM3190ARQZ-RL7 −40°C to +85°C 200 kHz 16-Lead QSOP RQ-16
ADuM3190BRQZ −40°C to +85°C 400 kHz 16-Lead QSOP RQ-16
ADuM3190BRQZ-RL7 −40°C to +85°C 400 kHz 16-Lead QSOP RQ-16
ADuM3190SRQZ −40°C to +125°C 200 kHz 16-Lead QSOP RQ-16
ADuM3190SRQZ-RL7 −40°C to +125°C 200 kHz 16-Lead QSOP RQ-16
ADuM3190TRQZ −40°C to +125°C 400 kHz 16-Lead QSOP RQ-16
ADuM3190TRQZ-RL7 −40°C to +125°C 400 kHz 16-Lead QSOP RQ-16
ADuM3190WSRQZ −40°C to +125°C 200 kHz 16-Lead QSOP RQ-16
ADuM3190WSRQZ-RL7 −40°C to +125°C 200 kHz 16-Lead QSOP RQ-16
ADuM3190WTRQZ −40°C to +125°C 400 kHz 16-Lead QSOP RQ-16
ADuM3190WTRQZ-RL7 −40°C to +125°C 400 kHz 16-Lead QSOP RQ-16
EVAL-ADuM3190EBZ
Evaluation Board
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The ADuM3190W models are available with controlled manufacturing to support the quality and reliability requirements of automotive
applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers
should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in
automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to
obtain the specific Automotive Reliability reports for these models.
COMPLIANT TO JEDEC STANDARDS MO-137-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
16 9
8
1
SEATING
PLANE
0.010 (0.25)
0.004 (0.10)
0.012 (0.30)
0.008 (0.20)
0.025 (0.64)
BSC
0.041 (1.04)
REF
0.010 (0.25)
0.006 (0.15)
0.050 (1.27)
0.016 (0.41)
0.020 (0.51)
0.010 (0.25)
8°
0°
COPLANARITY
0.004 (0.10)
0.065 (1.65)
0.049 (1.25) 0.069 (1.75)
0.053 (1.35)
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
0.158 (4.01)
0.154 (3.91)
0.150 (3.81) 0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
09-12-2014-A
©2013–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered
trademarks are the property of their
respective owners.
D11335-0-7/15(A)
www.analog.com/ADuM3190