STMicroelectronics 的 VNS3NV04DP-E 规格书

September 2013 Doc ID 018529 Rev 2 1/21
1
VNS3NV04DP-E
OMNIFET II
fully autoprotected Power MOSFET
Features
ECOPACK®: lead free and RoHS compliant
Automotive Grade: compliance with AEC
guidelines
Linear current limitation
Thermal shutdown
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
ESD protection
Direct access to the gate of the Power
MOSFET (analog driving)
Compatible with standard Power MOSFET
Description
The VNS3NV04DP-E device is made up of two
monolithic chips (OMNIFET II) housed in a
standard SO-8 package. The OMNIFET II is
designed using STMicroelectronics™ VIPower™
M0-3 technology and is intended for replacement
of standard Power MOSFETs in up to 50 kHz DC
applications.
Built-in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring
voltage at the input pin
Max on-state resistance (per ch.) RON 120 mΩ
Current limitation (typ) ILIMH 3.5 A
Drain-source clamp voltage VCLAMP 40 V
SO-8
Table 1. Device summary
Package
Order codes
Tube Tape and reel
SO-8 VNS3NV04DP-E VNS3NV04DPTR-E
www.st.com
Contents VNS3NV04DP-E
2/21 Doc ID 018529 Rev 2
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16
3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
VNS3NV04DP-E List of tables
Doc ID 018529 Rev 2 3/21
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
List of figures VNS3NV04DP-E
4/21 Doc ID 018529 Rev 2
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 31. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
VNS3NV04DP-E Block diagram and pin description
Doc ID 018529 Rev 2 5/21
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
SOURCE2
OVERVOLTAGE
LINEAR
DRAIN1
SOURCE1
CLAMP
CURRENT
LIMITER
OVER
TEMPERATURE
GATE
CONTROL
DRAIN2
OVERVOLTAGE
CLAMP
LINEAR
CURRENT
LIMITER
GATE
CONTROL
OVER
TEMPERATURE
INPUT2
INPUT1
DRAIN 2
DRAIN 1
DRAIN 2
DRAIN 1
INPUT 2
SOURCE 1
SOURCE 2
INPUT 1
1
45
8
Electrical specifications VNS3NV04DP-E
6/21 Doc ID 018529 Rev 2
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to Absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
program and other relevant quality document.
DRAIN 1
INPUT 1
SOURCE 2
IIN1
VIN1
INPUT 2
IIN2
SOURCE 1
DRAIN 2
VIN2
ID2
ID1
VDS1
VDS1
RIN1
RIN2
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
VDSn Drain-Source Voltage (VINn = 0 V) Internally clamped V
VINn Input voltage Internally clamped V
IINn Input current +/- 20 mA
RIN MINn Minimum input series impedance 220 Ω
IDn Drain current Internally limited A
IRn Reverse DC output current -5.5 A
VESD1 Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V
VESD2
Electrostatic discharge on output pins only (R = 330 Ω,
C=150pF) 16500 V
Ptot Total dissipation at Tc=2C 4 Ω
TjOperating junction temperature Internally limited °C
TcCase operating temperature Internally limited °C
Tstg Storage temperature -55 to 150 °C
VNS3NV04DP-E Electrical specifications
Doc ID 018529 Rev 2 7/21
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for -40 °C < Tj< 150 °C, unless otherwise stated.
Tj= 25 °C, unless otherwise specified
Table 3. Thermal data
Symbol Parameter Max value Unit
Rthj-lead Thermal resistance junction-lead (per channel) 30 °C/W
Rthj-amb Thermal resistance junction-ambient 80(1)
1. When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 μm thick) connected
to all DRAIN pins of the relative channel
°C/W
Table 4. Off
Symbol Parameter Test conditions Min Typ Max Unit
VCLAMP
Drain-source clamp
voltage VIN =0V; I
D= 1.5 A 40 45 55 V
VCLTH
Drain-source clamp
threshold voltage VIN =0V; I
D=2mA 36 V
VINTH
Input threshold
voltage VDS =V
IN; ID=1mA 0.5 2.5 V
IISS
Supply current from
input pin VDS =0V; V
IN = 5 V 100 150 µA
VINCL
Input-source clamp
voltage
IIN =1mA 6 6.8 8 V
IIN =-1mA -1 -0.3 V
IDSS
Zero input voltage
drain current
(VIN =0V)
VDS =13V; V
IN =0V; T
j=2C 30 µA
VDS =25V; V
IN =0V 75 µA
Table 5. On
Symbol Parameter Test conditions Min Typ Max Unit
RDS(on)
Static drain-source on
resistance
VIN =5V; I
D= 1.5 A; Tj= 25 °C 120 mΩ
VIN =5V; I
D= 1.5 A 240 mΩ
Table 6. Dynamic
Symbol Parameter Test conditions Min Typ Max Unit
gfs (1) Forward
transconductance VDD =13V; I
D=1.5A — 5.0 — S
COSS Output capacitance VDS =13V; f=1MHz; V
IN =0V 150 pF
Electrical specifications VNS3NV04DP-E
8/21 Doc ID 018529 Rev 2
-40 °C < Tj< 150 °C, unless otherwise specified
Table 7. Switching
Symbol Parameter Test conditions Min Typ Max Unit
td(on) Turn-on delay time
VDD =15V; I
D=1.5A;
Vgen =5V; R
gen =R
IN
MIN = 220 Ω (see Figure 4)
90 300 ns
trRise time 250 750 ns
td(off) Turn-off delay time 450 1350 ns
tfFall time 250 750 ns
td(on) Turn-on delay time
VDD =15V; I
D=1.5A;
Vgen =5V; R
gen =2.2KΩ
(see Figure 4)
0.45 1.35 µs
trRise time 2.5 7.5 µs
td(off) Turn-off delay time 3.3 10.0 µs
tfFall time 2.0 6.0 µs
(dI/dt)on Turn-on current slope
VDD =15V; I
D=1.5A;
Vgen =5V;
Rgen =R
IN MIN = 220 Ω
4.7 A/µs
QiTotal input charge VDD =12V; I
D= 1.5 A; VIN =5V;
Igen =2.13mA (see Figure 7)8.5 nC
Table 8. Source drain diode
Symbol Parameter Test conditions Min Typ Max Unit
VSD(1)
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage ISD =1.5A; V
IN =0V 0.8 V
trr Reverse recovery time
ISD = 1.5 A; dI/dt = 12 A/µs;
VDD =30V; L=20H
(see Figure 5)
107 ns
Qrr Reverse recovery
charge 37 µC
IRRM Reverse recovery
current 0.7 A
Table 9. Protections
Symbol Parameter Test conditions Min Typ Max Unit
Ilim Drain current limit VIN =5V; V
DS =13V 3.5 5 7 A
tdlim
Step response current
limit VIN =5V; V
DS = 13 V 10 µs
Tjsh Overtemperature
shutdown 150 175 200 °C
Tjrs Overtemperature reset 135 °C
Igf Fault sink current VIN =5V; V
DS =13V; T
j=T
jsh 10 15 20 mA
Eas
Single pulse avalanche
energy
Starting Tj=2C; V
DD =24V;
VIN =5V; R
gen =R
IN MIN =220Ω;
L=24mH (see Figure 6
and Figure 8)
100 mJ
VNS3NV04DP-E Electrical specifications
Doc ID 018529 Rev 2 9/21
Figure 4.
Switching time test circuit for resistive load
Figure 5.
Test circuit for diode recovery times
t
I
D
90%
10%
t
V
gen
t
d(on)
t
d(off)
t
f
t
r
R
gen
V
gen
V
D
L=100uH
A
B
8.5
Ω
V
DD
R
gen
FAST
DIODE
OMNIFET
A
D
I
S
220
Ω
B
OMNIFET
D
S
I
V
gen
V—_____‘ "‘ HHIFET} L____J
Electrical specifications VNS3NV04DP-E
10/21 Doc ID 018529 Rev 2
Figure 6. Unclamped inductive load test circuits
Figure 7. Input charge test circuit
R
GEN
P
W
V
IN
GEN
ND8003
VIN
$007872
VNS3NV04DP-E Electrical specifications
Doc ID 018529 Rev 2 11/21
Figure 8. Unclamped inductive waveforms
nmlsln mo 50 o 50 mo 1J Cc)
Electrical specifications VNS3NV04DP-E
12/21 Doc ID 018529 Rev 2
2.4 Electrical characteristics curves
Figure 9. Source-drain diode forward
characteristics
Figure 10. Static drain-source on
resistance
Figure 11. Derating curve Figure 12. Static drain-source on
resistance vs input voltage
(part 1)
Figure 13. Static drain-source on
resistance vs input voltage
(part 2)
Figure 14. Transconductance
0123456789101112
Id (A)
600
650
700
750
800
850
900
950
1000
1050
1100
Vsd (mV)
Vin=0V
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
0
25
50
75
100
125
150
175
200
225
250
275
300
Rds(on) (mohms)
Id=3.5A
Id=1A
Id=3.5A
Id=1A
Id=3.5A
Id=1A
Tj=25ºC
Tj=150ºC
Tj=-40ºC
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
0
25
50
75
100
125
150
175
200
225
250
Rds(on) (mohms)
Id=1.5A
Tj=150ºC
Tj=-40ºC
Tj=25ºC
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Id (A)
0
1
2
3
4
5
6
7
8
9
10
11
Gfs (S)
Vds=13V
Tj=25ºC
Tj=150ºC
Tj=-40ºC
VNS3NV04DP-E Electrical specifications
Doc ID 018529 Rev 2 13/21
Figure 15. Static drain-source on
resistance vs Id
Figure 16. Transfer characteristics
Figure 17. Turn-on current slope (part 1) Figure 18. Turn-on current slope (part 2)
Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage
slope (part 1)
00.511.522.533.54
Id (A)
0
25
50
75
100
125
150
175
200
225
250
Rds(on) (mohms)
Tj=25ºC
Tj=150ºC
Tj= - 40ºC
Vin=5V
1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Vin (V)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Idon (A)
Vds=13.5V
Tj=150ºC
Tj=25ºC
Tj=-40ºC
0250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
di/dt(A/us)
Vin=5V
Vdd=15V
Id=1.5A
0250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
di/dt(A/usec)
Vin=3.5V
Vdd=15V
Id=1.5A
01234567891011
Qg (nC)
0
1
2
3
4
5
6
7
8
9
Vin (V)
Vds=1V
Id=1.5A
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
Rg(ohm)
0
25
50
75
100
125
150
175
200
225
250
275
300
dv/dt(V/usec)
Vin=5V
Vdd=15V
Id=1.5A
Electrical specifications VNS3NV04DP-E
14/21 Doc ID 018529 Rev 2
Figure 21. Turn-off drain-source voltage
slope (part 2)
Figure 22. Capacitance variations
Figure 23. Switching time resistive load
(part 1)
Figure 24. Switching time resistive load
(part 1)
Figure 25. Output characteristics Figure 26. Normalized on resistance vs
temperature
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
Rg(ohm)
0
25
50
75
100
125
150
175
200
225
250
275
300
dv/dt(V/usec)
Vin=3.5V
Vdd=15V
Id=1.5A
0 5 10 15 20 25 30 35
Vds(V)
50
100
150
200
250
300
350
C(pF)
f=1MHz
Vin=0V
0
250
500
750
1000
1250
1500
1750
2000
2250
2500
Rg(ohm)
0
0.5
1
1.5
2
2.5
3
3.5
4
t(usec)
Vdd=15V
Id=1.5A
Vin=5V
td(off)
tr
td(on)
tf
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Vin(V)
0
100
200
300
400
500
600
700
800
900
t(nsec)
Vdd=15V
Id=1.5A
Rg=220ohm
tf
tr
td(off)
td(on)
012345678910
Vds (V)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Id (A)
Vin=4V
Vin=5V
Vin=3V
-50 -25 0 25 50 75 100 125 150 175
Tc )ºC)
0.5
1
1.5
2
2.5
3
3.5
4
Rds(on) (mOhm)
Vin=5V
Id=1.5A
VNS3NV04DP-E Electrical specifications
Doc ID 018529 Rev 2 15/21
Figure 27. Normalized input threshold
voltage vs temperature
Figure 28. Normalized current limit vs
junction temperature
Figure 29. Step response current limit
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Vinth (V)
Vds=Vin
Id=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (º C )
0
1
2
3
4
5
6
7
8
9
10
Ilim (A)
Vin=5V
Vds=13V
5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vdd(V)
7.5
8
8.5
9
9.5
10
10.5
11
11.5
12
12.5
13
Tdlim(usec)
Vin=5V
Rg=220ohm
Protection features VNS3NV04DP-E
16/21 Doc ID 018529 Rev 2
3 Protection features
During normal operation, the INPUT pin is electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from
DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current
IISS (typ. 100 µA) flows into the INPUT pin in order to supply the internal circuitry.
The following sections describe the device features.
3.1 Overvoltage clamp protection
Internally set at 45 V, along with the rugged avalanche characteristics of the Power
MOSFET stage give this device unrivalled ruggedness and energy handling capability. This
feature is mainly important when driving inductive loads.
3.2 Linear current limiter circuit
Limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter
is active, the device operates in the linear region, so power dissipation may exceed the
capability of the heatsink. Both case and junction temperatures increase, and if this phase
lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.
3.3 Overtemperature and short circuit protection
These are based on sensing the chip temperature and are not dependent on the input
voltage. The location of the sensing element on the chip in the power stage area ensures
fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the
range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted
when the chip temperature falls of about 15 °C below shutdown temperature.
3.4 Status feedback
In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a
diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from
a low impedance source, this current may be used in order to warn the control circuit of a
device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not
able to supply the current Igf, the INPUT pin falls to 0 V. This however not affects the device
operation: no requirement is put on the current capability of the INPUT pin driver except to
be able to supply the normal operation drive current IISS.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL Logic circuit.
VNS3NV04DP-E Package and packing information
Doc ID 018529 Rev 2 17/21
4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.2 SO-8 mechanical data
Table 10. SO-8 mechanical data
Dim.
mm
Min. Typ. Max.
A 1.75
A1 0.10 0.25
A2 1.25
b 0.28 0.48
c 0.17 0.23
D(1)
1. Dimension “D” does not include mold Flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
4.80 4.90 5.00
E 5.80 6.00 6.20
E1(2)
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
3.80 3.90 4.00
e 1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
k 0°
ccc 0.10
A} ‘Lr EV 35mm ’LHE
Package and packing information VNS3NV04DP-E
18/21 Doc ID 018529 Rev 2
Figure 30. SO-8 package dimension
0016023 D
Ease my 100 1 Bulk my 2000 A 3.2 B 6 / v / x c (2 0.1) 0.5 up. w "M7 > / ‘1‘."27 no TOD povgn mag K User mrec: on cf Feed _ (7“0( C‘QQC‘O O( ‘0 h Liar Dinah" o1 Feed }
VNS3NV04DP-E Package and packing information
Doc ID 018529 Rev 2 19/21
4.3 SO-8 packing information
Figure 31. SO-8 tube shipment (no suffix)
Figure 32. Tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
C
B
A
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
Revision history VNS3NV04DP-E
20/21 Doc ID 018529 Rev 2
5 Revision history
Table 11. Document revision history
Date Revision Changes
09-Mar-2011 1 Initial release.
18-Sep-2013 2 Updated Disclaimer
Ts AT
VNS3NV04DP-E
Doc ID 018529 Rev 2 21/21
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