Midrange Vision AI Microprocessors for Edge Applications

作者:Poornima Apte

投稿人:DigiKey 北美编辑

Edge AI applications utilize computer vision algorithms to detect people, objects, or anomalies such as defects, in real time. Processing images and videos at the edge typically requires a vision AI microprocessor (MPU) that can interface with cameras, run AI models, and often includes a dedicated AI accelerator.

Integrating vision AI capabilities into a single device reduces the cost and bulk of using separate components, making cutting-edge vision AI MPUs a good fit for compact embedded applications.

The RZ/V2N MPU (Figure 1) from Renesas Electronics Corporation is a vision AI MPU that features low power consumption, high AI inference performance, four Arm® Cortex® A55 CPU cores (1.8 GHz), an Arm Cortex-M33 (200 MHz), and two camera inputs via MIPI connection.

Image of Renesas RZ/V2N MPUFigure 1: The Renesas RZ/V2N MPU provides designers with new options for including vision AI in edge applications. (Image source: Renesas Electronics Corporation)

This Renesas MPU is a cost-effective solution for edge applications that require moderate to high AI capabilities at an affordable price point. It is part of the company’s RZ/V series, which aims to deliver a wide range of scalability from smart offices to drones (Figure 2).

Image of Renesas RZ/V2N applications such as mobile robots for home use and driver monitoring systems (click to enlarge)Figure 2: Positioned as a mid-range offering in the RZ/V line, the RZ/V2N enables applications such as mobile robots for home use and driver monitoring systems. (Image source: Renesas Electronics Corporation)

Requirements of a vision AI microprocessor

Edge AI applications often run in embedded devices, which may be battery-powered or operate on low reserves of energy. As a result, vision MPUs need to deliver high inference capabilities while simultaneously using less power than traditional high-performance computing devices.

The ideal vision AI MPU balances performance, power efficiency, integration, ease of development, and security. An overview of some of the key features in selecting an MPU are:

  • Inference performance: The RZ/V2N delivers up to 15 TOPS using its integrated DRP-AI3 accelerator, making it suitable for mid-range applications such as smart cameras, industrial inspection, and edge robotics. While some high-performance systems, such as collaborative robots and autonomous drones may require 80 to 100 TOPS, many edge AI applications operate well with 1 to 15 TOPS, depending on their complexity. TOPS per watt (TOPS/W) defines the product’s efficiency, which is a measure of how many operations it can perform per second per watt.

Although TOPS gives a baseline indication of performance, actual inference speed can be significantly improved with the inclusion of a dedicated AI accelerator, which offloads vision AI workloads that rely on intensive matrix and tensor computations. This allows systems to operate faster and more efficiently, with fewer clock cycles and lower power draw.

  • Low-power operation: Many edge devices run on batteries or within strict thermal limits. Vision MPUs designed for edge AI often include dynamic voltage and frequency scaling (DVFS), which adjusts power use based on workload demands. Combined with techniques like neural network pruning—which compress model size and reduce unnecessary calculations—DVFS helps achieve a higher TOPS/W ratio, improving both runtime and battery life. The DRP-AI3 accelerator helps avoid the need for power-hungry GPUs, contributing to higher TOPS/W at the edge.
  • On-chip image processing: Vision microprocessors with optional built-in image signal processors (ISPs) can perform routine image cleaning tasks, such as black level correction, color correction, cropping, and shading correction. In security or surveillance applications, the ISP can also pre-filter frames. For example, in a continuous video stream, the system may discard static frames and only send frames with motion or activity (e.g., intruder detection) to the AI processor, reducing unnecessary inference and saving power.
  • On-chip memory: Memory is also an important factor for performance and efficiency. Keeping data local avoids the latency and power cost of accessing external memory, which can be significant during real-time AI inference. With 1.5 MB of on-chip SRAM and support for LPDDR4X memory, the RZ/V2N balances internal processing speed with expandable memory options.
  • Accelerating AI deployment: AI toolkits and evaluation boards that include preprogrammed applications and interfaces can help developers to quickly prototype and deploy vision AI applications. In addition, the MPU should be able to support standard AI model formats. The RZ/V2N is compatible with standard model formats, such as ONNX and TensorFlow Lite.
  • Security: In edge environments, every sensor or endpoint can represent a potential attack vector. Therefore, it's important for vision MPUs to be able to support built-in security features such as secure boot and encrypted data paths. The RZ/V2N includes secure boot and hardware-level encryption features, and it leverages Arm TrustZone for isolating secure operations, helping protect both model integrity and sensitive input data.

AI design-friendly features of the RZ/V2N MPU

Renesas’ proprietary AI accelerator, the DRP-AI3 (Dynamically Reconfigurable Processor), is rated at 10 TOPS/W but can be enhanced up to 15 TOPS/W with advanced pruning, which compresses the size of the models that the system must process. This can eliminate the need for a separate graphics processing unit (GPU) or field-programmable gate array (FPGA).

The RZ/V2N measures just 15 sq mm, which makes it a good option for compact devices. Combining a quad-core CPU, a dedicated AI accelerator, and support for dual camera inputs into a single device opens new opportunities for designers to integrate vision AI into applications such as smart cameras, security devices, robots, and even consumer appliances.

The MPU operates on low power, which reduces the amount of heat generated, eliminating the need for additional cooling systems and fans, and thereby reducing the size and cost of embedded systems. With the ability to accommodate two cameras, it enables applications to capture double-angle images and improve spatial recognition. One system can perform multiple operations, such as simultaneously counting cars in a parking lot and recognizing license plates.

The architecture of the RZ/V2N MPU

The RZ/V2N MPU provides a comprehensive array of features and functions designed for creating mid-range AI market applications that require high-performance AI at an affordable price (Figure 3).

Diagram of the Renesas RZ/V2N architecture (click to enlarge)Figure 3: Diagram of the RZ/V2N architecture. (Source: Renesas Electronics Corp.)

Some of the key features include:

  • Central processing unit (CPU): The hybrid architecture features the Cortex-A55 Quad 1.8 GHz, a high-performance CPU, and the Cortex-M33 200 MHz, a low-power core designed for real-time control and safety-related tasks.
  • Internal shared memory: 1.5 MB RAM for on-chip memory with error-correcting code (ECC), which helps data integrity. ECC algorithms detect and correct errors in data, both in storage and transmission. The 1.5 MB on-chip memory enables AI algorithms to run quickly, and the RZ/V2N also has an interface for external DDR memory that can be added if more memory is needed.
  • AI Accelerator: The Renesas DRP-A13 dedicated AI engine enables high-speed AI inference processing that achieves the low power and flexibility required by endpoints.
  • Video and graphics: Optional graphics processing unit (GPU) and ISP that help process images and render graphics more efficiently.
  • Timers: Timers support real-time operations, which are essential for motor control and other automation applications.
  • Audio block: Ideal for multi-channel audio applications, such as smart speakers and infotainment systems.
  • Interfaces: High-speed memory interfaces and high-bandwidth peripherals are among the many interfaces that can connect to the vision microprocessor module.
  • Analog block: A 12-bit analog-to-digital converter (ADC) eliminates the need for separate ADCs in control systems or monitoring applications.

Renesas also offers the RTK0EF0186C03000BJ evaluation board kit for the RZ/V2N to enable designers to prototype and evaluate vision AI applications (Figure 4). Designers can also access AI applications covering more than 50 use cases in the company's AI applications and AI SDK on GitHub.

Image of evaluation board kit for the Renesas RZ/V2N

Figure 4: The evaluation board kit for the RZ/V2N includes a CPU board, expansion board, and two sub-boards, along with an AI SDK. (Image source: Renesas Electronics Corp.)

Conclusion

The RZ/V2N from Renesas is a good fit for mid-range edge AI applications that need to deliver data-driven information with reduced latency at high speeds. Its compact size and ability to meet inference demands while running on low power, make it suitable for a wide range of embedded devices.

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Image of Poornima Apte

Poornima Apte

Poornima Apte 是一名训练有素的工程师,后转为技术作家。其专业领域涉及工程、人工智能、物联网、自动化、机器人、5G 和网络安全等多个技术主题。Poornima 对印度经济繁荣后移居印度的美籍印度人进行了原创性报道,为她赢得了南亚记者协会颁发的奖项。

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DigiKey 北美编辑