Focus on Power Module Margining and Pre-Bias Startup Features

As newer applications and systems tend to have multiple voltages to power digital signal processors (DSPs), microcontrollers (µCs), field-programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs), modern power supply designs must be able to control how and when these voltages ramp to their final values after the power switch is activated.

In many cases, these power supplies will also need to be able to ramp up into pre-existing voltages present at the load. Some designs will require the power supply to be able to modify its outputs at final test or at certain times to test the load over the specified tolerances of the system’s worst case variations in voltage, current and, hence, power to the load.

Many power module designers have integrated these solutions into their products. Power management integrated circuit solutions are also available with one or more of these functions integrated into a single chip. In this article, we will focus on the power module with integrated design solutions.

Margining

In order to test a power supply’s robustness in the face of supply voltage fluctuations, the load circuit should be dynamically tested over its worst case supply voltage range—this capability is defined as margining¹. Typically, this function is used during the manufacturing phase of telecommunications, storage, networking and server equipment so that future reliability of these systems can be assessed.

Some ways this is accomplished in the dc/dc converter regulator portion of the power module is to adjust the output voltage levels by altering the feedback loop with a digital-to-analog converter (DAC) usually through a digital interface bus.

Different degrees of margining control include the “pass/fail” method in which all power outputs are increased or decreased by ± 5 percent, ±10 percent or some other selected margin. A finer adjustment method is sometimes needed where the output voltages are incremented or decremented in smaller steps such as ±10 or ±100 mV, so that the system performance is evaluated in much greater detail.

An external analog-to-digital converter (ADC) is sometimes used to measure these values accurately, but of course, the ADC must be powered from independent power supply voltages other than those being margined or the ADC accuracy may be affected.

During margining, any reset functions must also be disabled so the system may continue to operate properly, otherwise the system may reset during a margining test. The power module designer must take all of these issues into consideration.

Emerson Network Power has the POLA alliance module PTH05060 series with both margin up/down controls and pre-bias startup capability. Texas Instruments (TI) also offers POLA parts; these are pin for pin compatible with other POLA modules — designated PTH05060WAD, here we link to their through-hole version, but they have surface mount versions as well.

With these types of power modules, there is usually an external resistor that is part of a voltage divider circuit connected internally to the V_OUT of the internal circuitry of the module. This external resistor is selected, via an equation in the data sheet, to set the output voltage of the power module.

The PTH series of power modules incorporate circuitry for performing output voltage margining. Two control inputs, “Margin Up” and “Margin Down,” are provided. Connecting the Margin-Up control to ground increases the module's output voltage by up to five percent. Similarly, connecting the Margin-Down pin to ground decreases the output voltage by up to five percent. The circuit of Figure 1 (from the data sheet) shows an example of how the output margining feature is used. Only two low-leakage transistors (usually FETs) are required. The resistors, RD and RU, are optional. They are included if the desired amount of adjustment is less than five percent.

Pre-bias startup

This condition occurs when an external voltage is present at the load before the output of the power module becomes fully active. This usually occurs in complex digital systems when current from another power source is back-fed through a dual supply logic component, such as an ASIC or FPGA. Another possible path may be through clamp diodes as part of a dual-supply power-up sequencing event. Power module designs that use synchronous rectifiers are especially susceptible to this condition. The reason for this is that under the vast majority of operating systems, synchronous rectifier drivers will sink as well as source output currents. The Emerson Network Power PTH03010W series is an example of a power module with the pre-bias feature (Figure 2).

During pre-bias startup, there is a short 10 ms delay prior to the output voltage rising. This is then followed by the rise of the output voltage typically under the modules soft-start control. Startup is complete when the output voltage has risen to either the set-point voltage or voltage at the “Track” pin, whichever is lowest (Figure 3).

Figure 3: Pre-bias startup waveform showing negligible current until output rises above that of the back-fed diodes DM₁ and D₂. (Courtesy of Texas Instruments.)

Summary

Simple external “housekeeping” techniques that allowed some power supplies to turn ON first and turn OFF last are no longer enough in the world of complex digital circuit solutions. The designer needs to beware of “sneak paths,” the need to sequence power supplies with the right “soft start” and proper ramp down of various power supplies without conflicting with other circuit needs and causing a system failure or restart condition. Each design has different power management needs and may require additional external solutions as well as the ones which the power module manufacturers integrated into their products. Careful pre-planning and understanding digital circuit needs will prevent serious circuit re-designs toward the end of a project. Carefully reading data sheets for all devices to be used in a design is a necessity.

References:

1. Texas Instruments Application report SLVA461, May 2011, “Plug-in Modules: Understanding Margining and Prebias Start-up,” by Nikhil Seshasayee.