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Image of NXP LPC551x/S1x Family of Arm® Cortex®-M33 based MCUs - Slide7

Security has become a must in some designs where it is extremely important to have a secure execution environment. This slide demonstrates a more detailed list of security features that NXP has integrated in the LPC5500 MCU series. The LPC5500 has multiple crypto accelerators including AES, SHA accelerator and a crypto co-processor able to offload asymmetric cryptography tasks. Also, the PRINCE module allows real-time encryption/decryption and decryption of the flash memory while also featuring a true random number generator where producing an unpredictable result is desirable. The SRAM PUF provides protection and the ability of generating, storing and reconstructing keys. These keys can be stored in the protected flash region. The secure boot function enables ROM-based boot that executes only authorized software, while the Arm® TrustZone®-M technology enables isolated secure and non-secure regions for trusted execution.

PTM Published on: 2020-05-07