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Introduction to Multi-Level Class-D

Conventional class D topology has two MOSFETs that form a half-bridge power stage. These two MOSFETs are powered by a bus voltage called PVDD. By controlling the on/off of these two MOSFETs, the output of the half-bridge is swinging between PVDD and ground at a certain frequency. The amount of switching losses of these two MOSFETs is related to the amplitude of PVDD and the frequency they are switching at. The Infineon MERUS™ multi-level class D topology, however, has four MOSFETs and a flying cap in a half-bridge power stage. By sophisticated control of these four MOSFETs, the half-bridge output has three voltage levels: PVDD, ground, and half PVDD. This means each of the four MOSFETs in a multilevel half bridge is switching with half-PVDD and at half of the output switching frequency. This results in reduced switching losses from the half-bridge class D power stage.

PTM Published on: 2023-07-26