设置
快速交货
免运费
国际贸易术语
支付类型
市场产品
Analog Devices Inc. 的 EVAL-ADGS5412SDZ Guide 规格书
ANALOG
DEVICES
EVAL-ADGS5412SDZ User Guide
UG-1141
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the ADGS5412 Serially Controlled, High Voltage, Latch-Up Proof,
Quad SPST Switch
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 12
FEATURES
SPI interface with error detection
Includes CRC, invalid read/write address, and SCLK count
error detection
Analog supply voltages
Dual-supply: ±9 V to ±22 V
Single-supply: 9 V to 40 V
PC control in conjunction with the evaluation software
EVAL-SDP-CB1Z SDP
EVALUATION KIT CONTENTS
EVAL-ADGS5412SDZ
DOCUMENTS NEEDED
ADGS5412 data sheet
EQUIPMENT NEEDED
EVAL-SDP-CB1Z controller board
ACE software with EVAL-ADGS5412SDZ plug-in
DC voltage source
±22 V for dual-supply
40 V for single-supply
Optional digital logic supply: 3.3 V
Analog signal source
Method to measure voltage, such as a digital multimeter (DMM)
GENERAL DESCRIPTION
The EVAL-ADGS5412SDZ is the evaluation board for the
ADGS5412. The ADGS5412 is a latch-up proof, quad single-pole,
single-throw (SPST) switch controlled by a serial peripheral
interface (SPI). The SPI has robust error detection features,
including cyclic redundancy check (CRC) error detection,
invalid read/write address detection, and serial clock (SCLK)
count error detection. It is possible to daisy-chain multiple
ADGS5412 devices together. This enables the configuration of
multiple devices with a minimal amount of digital lines. The
ADGS5412 also supports burst mode that decreases the time
between SPI commands.
Figure 1 shows the EVAL-ADGS5412SDZ in a typical evaluation
setup. The EVAL-ADGS5412SDZ is controlled by the EVAL-SDP-
CB1Z system demonstration platform (SDP), which connects to a
PC via a USB port. The ADGS5412 is on the center of the
evaluation board and wire screw terminals are provided to
connect to each of the source and drain pins. Three screw
terminals power the device, and a fourth terminal provides
users with a defined digital logic supply voltage, if required.
Alternatively, the digital logic supply voltage can be supplied
from the SDP.
Full specifications on the ADGS5412 are available in the
ADGS5412 data sheet available from Analog Devices, Inc., and
should be consulted in conjunction with this user guide when
using the evaluation board.
The evaluation board interfaces to the USB port of a PC via the
SDP board. The EVAL-SDP-CB1Z board (SDP-B controller
board) is available to order on the Analog Devices website at
www.analog.com.
UG-1141 EVAL-ADGS5412SDZ User Guide
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents ................................................................... 1
Documents Needed .......................................................................... 1
Equipment Needed ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
ADGS5412 Evaluation Board Layout ............................................ 3
Evaluation Board Hardware ............................................................ 4
Power Supplies .............................................................................. 4
Input Signals .................................................................................. 4
Link Options ................................................................................. 4
Evaluation Board Software ...............................................................5
Installing the Software ..................................................................5
Initial Set Up ..................................................................................5
Block Diagram And Description .....................................................6
Memory Map .................................................................................7
Evaluation Board Schematics and Artwork ...................................8
Ordering Information .................................................................... 12
Bill of Materials ........................................................................... 12
REVISION HISTORY
5/2017—Revision 0: Initial Version
UG-1141 EVAL-ADGS5412SDZ User Guide
Rev. 0 | Page 4 of 12
EVALUATION BOARD HARDWARE
POWER SUPPLIES
Connector J1 provides access to the supply pins of the
ADGS5412. VDD, GND, and VSS on J1 terminal block link to the
appropriate pins on the ADGS5412. For dual-supply voltages,
the evaluation board can be powered from ±9 V to ±22 V. For
single-supply voltages, the GND and VSS terminals must
connect together and power the evaluation board with 9 V to 40
V. Additionally, 3.3 V is supplied to the VL pin of the
ADGS5412 by the SDP when Link LK1 is in Position B. When
controlling the ADGS5412 by another method other than the
SDP, supply between 2.7 V and 5.5 V to the VL pin of the
ADGS5412 via the EXT_VL screw terminal input on J1. LK1 must
be in Position A.
INPUT SIGNALS
Two screw connectors, J2 and J3, are provided to connect to
both the source and drain pins of the ADGS5412. Additional
subminiature version B (SMB) connector pads are available if
extra connections are required.
Each trace on the source and drain side includes two sets of
0603 pads, which can place a load on the signal path to ground.
A 0 Ω resistor is placed in the signal path and can be replaced
with a user defined value. The resistor combined with the 0603
pads can create a simple resistor-capacitor (RC) filter.
LINK OPTIONS
A number of link options are provided on the EVAL-
ADGS5412SDZ evaluation board that must be set for the
required operating conditions before using. Table 1 describes
the positions of the links to control the evaluation board via the
SDP board using a PC and external power supplies. The
functions of these link options are described in detail in Table 2.
When using the SDP in conjunction with the EVAL-
ADGS5412SDZ, LK1 must be in Position B to avoid damage to
the SDP.
Table 1. Link Options for SDP Control (Default)
Link Number Option
LK1 B
LK2 B
Table 2. Link Functions
Link Number Function
LK1 This link selects the source of the VL voltage supplied to the ADGS5412.
Position A selects EXT_VL from J1.
Position B selects the 3.3 V from the SDP.
LK2 This link selects how a hardware reset is performed.
Position A indicates the SW1 push button performs a hardware reset.
Position B indicates the SDP can perform a hardware reset.
.l u:
EVAL-ADGS5412SDZ User Guide UG-1141
Rev. 0 | Page 5 of 12
EVALUATION BOARD SOFTWARE
INSTALLING THE SOFTWARE
The EVAL-ADGS5412SDZ evaluation board uses the Analog
Devices Analysis Control Evaluation (ACE) software. ACE is a
desktop software application that allows the evaluation and
control of multiple evaluation systems.
ACE installs the necessary SDP drivers and .NET Framework 4
by default. Install ACE before connecting the SDP. The ACE
software and access to full instructions on how to install and
use ACE can be found on the Analog Devices website.
After the installation is finished, the EVAL-ADGS5412SDZ
evaluation board plug-ins appear when opening ACE.
INITIAL SET UP
To set up the evaluation board, complete the following steps:
1. Connect the evaluation board to the SDP board and
connect the SDP board to the computer via a USB cable.
2. Power the evaluation board as described in the Power
Supplies section.
3. Run the ACE application. The EVAL-ADGS5412SDZ
board plug-ins appear in the attached hardware section of
the Start tab.
4. Double-click on the evaluation board plug-in to open the
evaluation board view seen in Figure 2.
5. The chip block diagram can be accessed by double-clicking
on the ADGS5412 icon (see Figure 2). This view provides a
basic representation of functionality of the evaluation board.
The main functions are labeled in Figure 3.
Figure 2. Evaluation Board View of the EVAL-ADGS5412SDZ
Figure 3. Chip Block Diagram View for the ADGS5412
15896-002
15896-003
UG-1141 EVAL-ADGS5412SDZ User Guide
Rev. 0 | Page 6 of 12
BLOCK DIAGRAM AND DESCRIPTION
The EVAL-ADGS5412SDZ software is organized so that it
appears similar to the functional block diagram shown in the
ADGS5412 data sheet. In this way, it is easy to correlate the
functions on the EVAL-ADGS5412SDZ board with the
description in the data sheets. A full description of each block,
register, and setting is given in the ADGS5412 data sheet.
Some of the blocks and their functions are described here as
they pertain to the evaluation board. The full screen block
diagram, shown in Figure 4, describes the functionality of each
Figure 4. EVAL-ADGS5412SDZ Block Diagram with Labels
Table 3. Block Diagram Functions
Label Function
A The dropdown menus configure SW1 to SW4 as open or closed.
B The INVALID RW ENABLE, SCLK COUNT ENABLE, and CRC ENABLE checkboxes enable or disable the error detection
features on the SPI interface.
C The BURST MODE ENABLE checkbox enables or disables burst mode.
D The RW ERROR FLAG, SCLK ERROR, and CRC ERROR FLAG indicators illuminate red if the relevant error flags assert in the
error flags register.
E The Clear Flags button clears the error flags register.
F The Apply Changes button applies all modified values to the devices.
F
A
BD
E
C
15896-004
- swpm
ERILCONIIG
- mums
wnsLm
50an
nAIsvjNAINiN
mmaum
Mum
- wuum
EFKCONFIS
- mums
BUISLEN
soruzsm
DAISVLHNNJN
Emswssxisn
EVAL-ADGS5412SDZ User Guide UG-1141
Rev. 0 | Page 7 of 12
MEMORY MAP
All registers are fully accessible from the Memory Map tab; this
allows registers to be edited at a bit level (see Figure 5 and Figure 6).
The bits shaded in dark gray are read-only bits and cannot be
accessed from ACE. All other bits are toggled. The Apply Changes
button transfers data to the device.
All changes here correspond to the block diagram; for example,
if the internal register bit is enabled, it displays as enabled on
the block diagram. Any bits or registers that are bold are
modified values that have not been transferred to the evaluation
board. After clicking Apply Changes, the data is transferred to
the evaluation board.
Figure 5. ADGS5412 Memory Map
Figure 6. ADGS5412 Memory Map with Unapplied Changes in the SW_DATA Register
15896-005
15896-006
mm “5:5“ um
5:2; w'mm gag
D , mm
mmnmw... “Hun”. ma
mm. m mm ram , u. m y m a: ... «.....n.‘ 1. mu" m , m w m... M mm
”:sz
(s5
«##4flmfijfififidfififiwM-‘M!
nu mm :55";
@ngwfldawmwwkfifi-Mw W-
“ ‘ Egg?
1:
gE
V V
m," v55 cm: W» m [:1 In m
n a ANALCg
”DEVIC
m
at] E3!»
' E‘m
n m =2 nu mg um um “
u gas—rm ":3 “:3 ..Ej .55:
5" xv 3_Lu gm 3.. gm g.“
mt] NIEj mEj mt]
Fa 5'
s‘ Ufl-‘Ufi
a
s‘ 5 En
‘2 DEED] [“3 am u E)»
51 |_Ir ‘ Sm E32!
5} » _ ”LL 1 1:: E)”
2 m2" “‘Ej w E3“:
51 HEjl"
54 u u " a": fl 1w
5 a“ EVAL—ADGSS412SDZ EEC?
s4 DEE-[DD EVAL—ADcsmzsnz D
EVAL—ADGSIGIZSDZ a" A cum
EVAL-ADGS5412SDZ User Guide UG-1141
Rev. 0 | Page 9 of 12
Figure 9. EVAL-ADGS5412SDZ Schematic 3
Figure 10. EVAL-ADGS5412SDZ Silk Screen
15896-009
15896-010
m
ANALOG
DEVICES
www.ana|ug.nnm
UG-1141 EVAL-ADGS5412SDZ User Guide
Rev. 0 | Page 12 of 12
ORDERING INFORMATION
BILL OF MATERIALS
Table 4.
Reference Designator Description
C1 to C2 50 V tantalum capacitor, 10 μF, D size
C3 to C6, C8 50 V, X7R multilayer ceramic capacitor, 0.1 μF, 0603
C7 Capacitor, 10 μF, 0805, 16 V
D1 to D4 Not placed
S1 to S4 Not placed
T1 to T8 Red test point
GND1, GND2 Black test point
J1 to J3 4-pin terminal block, 5 mm pitch
J4 120-way connector, 0.6 mm pitch
J5 Through hole, header, 4 × 2, 2.54 mm
LK1, LK2 3-pin single inline (SIL) header and shorting link
R2 to R7, R12 to R15, R17, R18, R21, R22, R27, R28, R32, R34, R35 Not placed
R8 to R11, R16, R19, R20, R23 to R26, R33 Resistor, 0 Ω, 0603, 1%
R1 Resistor, 10 kΩ, 0.063 W, 1%, 0603
R29 Resistor, 1 kΩ, 0.063 W, 1%, 0603
R30, R31 Resistor, 100 kΩ, 0.063 W, 1%, 0603
SW1 Surface mount device (SMD) push button switch
U1 ADGS5412, SPI controlled, quad SPST switch
U2 ADG819, 1.8 V to 5.5 V, 2:1 multiplexer/SPDT switch
U3 24LC32A-I/MS, 32 kΩ, I2 C serial EEPROM
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until
you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices,
Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer
may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written
notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED,
RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF
INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S
POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES
SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will
comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of
the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts,
and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is
expressly disclaimed.
©2017 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG15896-0-5/17(0)
