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Timer-Slide15

Now to look at the combined timer in this example PWM mode, where at least two channels operate together with one master and one slave. The master defines the interval time, and so the period of the PWM signal, and the slave operates in one-count mode to output the PWM duty cycle. The pulse period and the duty factor can be calculated as follows; the period is the master channel compare register TDR0 value plus one, multiplied by the count clock. The duty factor is the value written to the slave compare register, divided by the value of the master register plus one. On the next slide one can see the timing diagram of how this works.

PTM Published on: 2012-04-17