Vishay General Semiconductor - Diodes Division 的 VS-40L15CT(S,-1)PbF 规格书

— VISHAY. V ® RoHS comum uncam FREE is. «a,w m m www.vishay.com/doc?99912 DwodesAmencas©wshay£om DwodesAswa©wshay£om DwodesEumgemushauom www.v\shay.com/doc?91000
VS-40L15CTSPbF, VS-40L15CT-1PbF
www.vishay.com Vishay Semiconductors
Revision: 15-Aug-15 1Document Number: 94217
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
High Performance Schottky Rectifier, 2 x 20 A
FEATURES
• 125 °C TJ operation (VR < 5 V)
• Center tap module
• Optimized for OR-ing applications
• Ultralow forward voltage drop
• High frequency operation
• High purity, high temperature epoxy
encapsulation for enhanced mechanical
strength and moisture resistance
• Guard ring for enhanced ruggedness and long term
reliability
• Meets MSL level 1, per J-STD-020, LF maximum peak
of 260 °C
• AEC-Q101 qualified
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
The center tap Schottky rectifier module has been optimized
for ultralow forward voltage drop specifically for the OR-ing
of parallel power supplies. The proprietary barrier
technology allows for reliable operation up to 125 °C
junction temperature. Typical applications are in parallel
switching power supplies, converters, reverse battery
protection, and redundant power subsystems.
PRODUCT SUMMARY
IF(AV) 2 x 20 A
VR15 V
VF at IFsee datasheet
IRM max. 600 mA at 100 °C
TJ max. 125 °C
EAS 10 mJ
Package TO-263AB (D2PAK), TO-262AA
Diode variation Common cathode
TO-262AATO-263AB (D
2
PAK)
Base
common
cathode
A
node Anode
Common
cathode
13
2
2
Base
common
cathode
Anode Anode
Common
cathode
13
2
2
VS-40L15CTSPbF VS-40L15CT-1PbF
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL CHARACTERISTICS VALUES UNITS
IF(AV) Rectangular waveform 40 A
VRRM 15 V
IFSM tp = 5 μs sine 700 A
VF19 Apk, TJ = 125 °C (per leg, typical) 0.25 V
TJ-55 to +125 °C
VOLTAGE RATINGS
PARAMETER SYMBOL TEST CONDITIONS VS-40L15CTSPbF
VS-40L15CT-1PbF UNITS
Maximum DC reverse voltage VRTJ = 100 °C 15 V
Maximum working peak reverse voltage VRWM
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average forward
current, see fig. 5
per leg IF(AV) 50 % duty cycle at TC = 85 °C, rectangular waveform 20
A
per device 40
Maximum peak one cycle non-repetitive
surge current per leg, see fig. 7 IFSM
5 μs sine or 3 μs rect. pulse Following any rated load
condition and with rated
VRRM applied
700
10 ms sine or 6 ms rect. pulse 330
Non-repetitive avalanche energy per leg EAS TJ = 25 °C, IAS = 2 A, L = 6 mH 10 mJ
Repetitive avalanche current per leg IAR Current decaying linearly to zero in 1 μs
Frequency limited by TJ maximum VA = 1.5 x VR typical 2A
VISHAY. DwodesAmencas@\/wshay.com DwodesAswa@wshay.com DwodesEumgemushauom www.v\shay.com/doc?91000
VS-40L15CTSPbF, VS-40L15CT-1PbF
www.vishay.com Vishay Semiconductors
Revision: 15-Aug-15 2Document Number: 94217
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Note
(1) Pulse width < 300 μs, duty cycle < 2 %
ELECTRICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS TYP. MAX. UNITS
Maximum forward voltage drop per leg
See fig. 1 VFM (1)
19 A TJ = 25 °C -0.41
V
40 A - 0.52
19 A TJ = 125 °C 0.25 0.33
40 A 0.37 0.50
Reverse leakage current per leg
See fig. 2 IRM (1) TJ = 25 °C VR = Rated VR
-10
mA
TJ = 100 °C - 600
Threshold voltage VF(TO) TJ = TJ maximum 0.182 V
Forward slope resistance rt7.6 m:
Maximum junction capacitance per leg CTVR = 5 VDC (test signal range 100 kHz to 1 MHz), 25 °C - 2000 pF
Typical series inductance per leg LSMeasured lead to lead 5 mm from package body 8 - nH
Maximum voltage rate of change dV/dt Rated VR10 000 V/μs
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum junction temperature range TJ-55 to +125 °C
Maximum storage temperature range TStg -55 to +150
Maximum thermal resistance,
junction to case per leg RthJC DC operation
See fig. 4 1.5
°C/W
Typical thermal resistance,
case to heatsink RthCS Mounting surface, smooth and greased 0.50
Maximum thermal resistance,
junction to ambient RthJA DC operation 40
Approximate weight 2g
0.07 oz.
Mounting torque minimum Non-lubricated threads 6 (5) kgf cm
(lbf in)
maximum 12 (10)
Marking device Case style TO-263AB (D2PAK) 40L15CTS
Case style TO-262AA 40L15CT-1
VISHAY. ng‘e pu‘se a‘ resls|ancej mo DwodesAmencas©wshay£om DwodesAswa©wshay£om DwodesEumgemushauom www.v\shay.com/doc?91000
VS-40L15CTSPbF, VS-40L15CT-1PbF
www.vishay.com Vishay Semiconductors
Revision: 15-Aug-15 3Document Number: 94217
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 1 - Maximum Forward Voltage Drop Characteristics Fig. 2 - Typical Values of Reverse Current vs. Reverse Voltage
Fig. 3 - Typical Junction Capacitance vs. Reverse Voltage
Fig. 4 - Maximum Thermal Impedance ZthJC Characteristics
1
100
10
1000
I
F
- Instantaneous Forward Current (A)
V
FM
- Forward Voltage Drop (V)
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.60
TJ = 125 °C
TJ = 75 °C
TJ = 25 °C
0.1
100
10
1
1000
I
R
- Reverse Current (mA)
V
R
- Reverse Voltage (V)
3 6 12 159
0
TJ = 100 °C
TJ = 75 °C
TJ = 50 °C
TJ = 25 °C
100
1000
10 000
C
T
- Junction Capacitance (pF)
V
R
- Reverse Voltage (V)
10520150
TJ = 25 °C
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
t1 - Rectangular Pulse Duration (s)
ZthJC - Thermal Impedance (°C/W)
10 100
D = 0.75
D = 0.50
D = 0.33
D = 0.25
D = 0.20
Single pulse
(thermal resistance)
PDM
t1
t2
Notes:
1. Duty factor D = t1/t2
2. Peak TJ = PDM x ZthJC + TC
VISHAY. Iii DwodesAmencas©wshay£om DwodesAswa©wshay£om DwodesEumgemushauom www.v\shay.com/doc?91000
VS-40L15CTSPbF, VS-40L15CT-1PbF
www.vishay.com Vishay Semiconductors
Revision: 15-Aug-15 4Document Number: 94217
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 5 - Maximum Allowable Case Temperature vs.
Average Forward Current
Fig. 6 - Forward Power Loss Characteristics
Fig. 7 - Maximum Non-Repetitive Surge Current
Fig. 8 - Unclamped Inductive Test Circuit
Note
(1) Formula used: TC = TJ - (Pd + PdREV) x RthJC;
Pd = Forward power loss = IF(AV) x VFM at (IF(AV)/D) (see fig. 6);
PdREV = Inverse power loss = VR1 x IR (1 - D); IR at VR1 = 80 % rated VR
70
75
80
85
90
95
100
Allowable Case Temperature (°C)
I
F(AV)
- Average Forward Current (A)
8
412 16 20 24
0
See note (1)
Square wave (D = 0.50)
0
2
4
6
8
10
12
14
Average Power Loss (W)
IF(AV) - Average Forward Current (A)
10515202530
0
DC
RMS Limit
D = 0.20
D = 0.25
D = 0.33
D = 0.50
D = 0.75
100
1000
IFSM - Non-Repetitive Surge Current (A)
tp - Square Wave Pulse Duration (μs)
100 1000 10 000
10
At any rated load condition
and with rated VRRM applied
following surge
Current
monitor
High-speed
switch
D.U.T.
Rg = 25 Ω
+
Freewheel
diode Vd = 25 V
L
IRFP460
40HFL40S02
VISHAY. bb<><><><><5 el="" d="" d="" d="" d="" d="" d="" d="" d="" www.v|shay="" com/doc795046="" www.v|shay="" com/dac795419="" www.v|shay="" com/dac795008="" www.v|shay="" com/dac795032="" dwodesamencas©wshay£om="" dwodesaswa©wshay£om="" dwodeseumgemushauom="" www.v\shay.com/doc?91000="">
VS-40L15CTSPbF, VS-40L15CT-1PbF
www.vishay.com Vishay Semiconductors
Revision: 15-Aug-15 5Document Number: 94217
For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
ORDERING INFORMATION TABLE
ORDERING INFORMATION (Example)
PREFERRED P/N QUANTITY PER T/R MINIMUM ORDER QUANTITY PACKAGING DESCRIPTION
VS-40L15CTSPbF 50 1000 Antistatic plastic tubes
VS-40L15CTSTRRPbF 800 800 13" diameter plastic tape and reel
VS-40L15CTSTRLPbF 800 800 13" diameter plastic tape and reel
VS-40L15CT-1PbF 50 1000 Antistatic plastic tubes
LINKS TO RELATED DOCUMENTS
Dimensions TO-263AB (D2PAK) www.vishay.com/doc?95046
TO-262AA www.vishay.com/doc?95419
Part marking information www.vishay.com/doc?95008
Packaging information www.vishay.com/doc?95032
2- Current rating (40 A)
3- L = Schottky “L” series
4- Voltage rating (15 V)
5- C = common cathode
6- T = TO-220
7- S = D2PAK
-1 = TO-262
8- None = tube
TRL = tape and reel (left oriented - for D2PAK only)
TRR = tape and reel (right oriented - for D2PAK only)
- PbF = lead (Pb)-free
9
1- Vishay Semiconductors product
Device code
5
132 4 6 7 8 9
VS- 40 L 15 C T S TRL PbF
VISHAYN a1 T a‘ T’ ”i L 4 Secuun E - B and c - c DuodesAmencas®vushay.com DuodesAsua@vushay.com DIOdesEuroge®wshaycom
Document Number: 95014 For technical questions within your region, please contact one of the following: www.vishay.com
Revision: 31-Mar-09 DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com 1
D2PAK, TO-262
Outline Dimensions
Vishay Semiconductors
DIMENSIONS - D2PAK in millimeters and inches
Notes
(1) Dimensioning and tolerancing per ASME Y14.5 M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall
not exceed 0.127 mm (0.005") per side. These dimensions are
measured at the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Datum A and B to be determined at datum plane H
(6) Controlling dimension: inch
(7) Outline conforms to JEDEC outline TO-263AB
SYMBOL MILLIMETERS INCHES NOTES SYMBOL MILLIMETERS INCHES NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
A 4.06 4.83 0.160 0.190 D1 6.86 8.00 0.270 0.315 3
A1 0.00 0.254 0.000 0.010 E 9.65 10.67 0.380 0.420 2, 3
b 0.51 0.99 0.020 0.039 E1 7.90 8.80 0.311 0.346 3
b1 0.51 0.89 0.020 0.035 4 e 2.54 BSC 0.100 BSC
b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625
b3 1.14 1.73 0.045 0.068 4 L 1.78 2.79 0.070 0.110
c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 3
c1 0.38 0.58 0.015 0.023 4 L2 1.27 1.78 0.050 0.070
c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC
D 8.51 9.65 0.335 0.380 2 L4 4.78 5.28 0.188 0.208
c
B
Detail A
c2
AA
A
± 0.004 B
M
A
Lead tip
(3)
(3)
View A - A
(E)
(D1)
E1
B
H
A1
Detail “A”
Rotated 90 °CW
Scale: 8:1
L
Gauge
plane
0° to 8°
L3
L4
Seating
plane
Section B - B and C - C
Scale: None
(4)
(4)
(b, b2)
b1, b3
(c) c1
Base
Metal
Plating
Conforms to JEDEC outline D2PAK (SMD-220)
132
D
C
A
L2
E
(2)(3)
(2)
4
H
BB
2 x b
2 x b2
L1
0.010 AB
MM
(3)
e
2 x
Pad layout
MIN.
11.00
(0.43)
MIN.
9.65
(0.38)
MIN.
3.81
(0.15)
MIN.
2.32
(0.08)
17.90 (0.70)
15.00 (0.625)
2.64 (0.103)
2.41 (0.096)
Lead assignments
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
VISHAY.» T ; L 4 Sechon E - E and c - c DwodesAmencas@\/wshay.cam DwodesAsIa@\/\shay.cam DwodesEumgemushauom
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2DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Revision: 31-Mar-09
Outline Dimensions
Vishay Semiconductors D2PAK, TO-262
DIMENSIONS - TO-262 in millimeters and inches
Notes
(1) Dimensioning and tolerancing as per ASME Y14.5M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall
not exceed 0.127 mm (0.005") per side. These dimensions are
measured at the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Controlling dimension: inches
(6) Outline conform to JEDEC TO-262 except A1 (maximum), b
(minimum) and D1 (minimum) where dimensions derived the
actual package outline
SYMBOL MILLIMETERS INCHES NOTES
MIN. MAX. MIN. MAX.
A 4.06 4.83 0.160 0.190
A1 2.03 3.02 0.080 0.119
b 0.51 0.99 0.020 0.039
b1 0.51 0.89 0.020 0.035 4
b2 1.14 1.78 0.045 0.070
b3 1.14 1.73 0.045 0.068 4
c 0.38 0.74 0.015 0.029
c1 0.38 0.58 0.015 0.023 4
c2 1.14 1.65 0.045 0.065
D 8.51 9.65 0.335 0.380 2
D1 6.86 8.00 0.270 0.315 3
E 9.65 10.67 0.380 0.420 2, 3
E1 7.90 8.80 0.311 0.346 3
e 2.54 BSC 0.100 BSC
L 13.46 14.10 0.530 0.555
L1 - 1.65 - 0.065 3
L2 3.56 3.71 0.140 0.146
(4)
(4) Base
metal
Plating b1, b3
(b, b2)
c1
c
Section B - B and C - C
Scale: None
Section A - A
(3)
E1
(3)D1
E
B
A
A
A
c2
c
A1
Seating
plane
Lead tip
(3)
(2) (3)
(2)
A
E
(Datum A)
L1
L2
BB
CC
3
2
1
L
D
2 x e
3 x b2
3 x b
0.010 A B
MM
Modified JEDEC outline TO-262
Lead assignments
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
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Revision: 08-Feb-17 1Document Number: 91000
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