PDTA113E Series Datasheet by NXP USA Inc.

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1. Product profile

1.1 General description

PNP Resistor-Equipped Transistors (RET).

[1] Also available in SOT54A and SOT54 variant packages (see Section 2)

1.2 Features

1.3 Applications

1.4 Quick reference data

PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Rev. 05 — 2 September 2009 Product data sheet

Table 1. Product overview

Type number Package NPN

complement

NXP JEITA JEDEC

PDTA113EE SOT416 SC-75 - PDTC113EE

PDTA113EK SOT346 SC-59A TO-236 PDTC113EK

PDTA113EM SOT883 SC-101 - PDTC113EM

PDTA113ES[1] SOT54 (TO-92) SC-43A TO-92 PDTC113ES

PDTA113ET SOT23 - TO-236AB PDTC113ET

PDTA113EU SOT323 SC-70 - PDTC113EU

nBuilt-in bias resistors nReduces component count

nSimplifies circuit design nReduces pick and place costs

nGeneral purpose switching and

amplification

nCircuit drivers

nInverter and interface circuits

Table 2. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

VCEO collector-emitter voltage open base - - −50 V

IOoutput current (DC) - - −100 mA

R1 bias resistor 1 (input) 0.7 1 1.3 kΩ

R2/R1 bias resistor ratio 0.8 1 1.2

: :

Product data sheet Rev. 05 — 2 September 2009 2 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

2. Pinning information

Table 3. Pinning

Pin Description Simplified outline Symbol

SOT54

1 input (base)

2 output (collector)

3 GND (emitter)

SOT54A

1 input (base)

2 output (collector)

3 GND (emitter)

SOT54 variant

1 input (base)

2 output (collector)

3 GND (emitter)

SOT23, SOT323, SOT346, SOT416

1 input (base)

2 GND (emitter)

3 output (collector)

SOT883

1 input (base)

2 GND (emitter)

3 output (collector)

001aab347

006aaa148

001aab348

006aaa148

001aab447

006aaa148

006aaa144

sym003

1R1

Transparent

top view

sym003

1R1

de,

Product data sheet Rev. 05 — 2 September 2009 3 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

3. Ordering information

[1] Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9).

4. Marking

[1] * = -: made in Hong Kong

* = p: made in Hong Kong

* = t: made in Malaysia

* = W: made in China

Table 4. Ordering information

Type number Package

Name Description Version

PDTA113EE SC-75 plastic surface mounted package; 3 leads SOT416

PDTA113EK SC-59A plastic surface mounted package; 3 leads SOT346

PDTA113EM SC-101 leadless ultra small plastic package; 3 solder lands;

body 1.0 × 0.6 × 0.5 mm SOT883

PDTA113ES[1] SC-43A plastic single-ended leaded (through hole) package;

3 leads SOT54

PDTA113ET - plastic surface mounted package; 3 leads SOT23

PDTA113EU SC-70 plastic surface mounted package; 3 leads SOT323

Table 5. Marking codes

Type number Marking code[1]

PDTA113EE 16

PDTA113EK 17

PDTA113EM G4

PDTA113ES TA113E

PDTA113ET *15

PDTA113EU *14

Product data sheet Rev. 05 — 2 September 2009 4 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

5. Limiting values

[1] Refer to standard mounting conditions

[2] Reflow soldering is the only recommended soldering method.

[3] Refer to SOT883 standard mounting conditions; FR4 printed-circuit board with 60 µm copper strip line.

6. Thermal characteristics

[1] Refer to standard mounting conditions.

[2] Reflow soldering is the only recommended soldering method.

[3] Refer to SOT883 standard mounting conditions; FR4 printed-circuit board with 60 µm copper strip line.

Table 6. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCBO collector-base voltage open emitter - −50 V

VCEO collector-emitter voltage open base - −50 V

VEBO emitter-base voltage open collector - −10 V

VIinput voltage

positive - +10 V

negative - −10 V

IOoutput current (DC) - −100 mA

ICM peak collector current - −100 mA

Ptot total power dissipation Tamb ≤ 25 °C

SOT416 [1] - 150 mW

SOT346 [1] - 250 mW

SOT883 [2][3] - 250 mW

SOT54 [1] - 500 mW

SOT23 [1] - 250 mW

SOT323 [1] - 200 mW

Tstg storage temperature −65 +150 °C

Tjjunction temperature - 150 °C

Tamb ambient temperature −65 +150 °C

Table 7. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Rth(j-a) thermal resistance from

junction to ambient in free air

SOT416 [1] - - 833 K/W

SOT346 [1] - - 500 K/W

SOT883 [2][3] - - 500 K/W

SOT54 [1] - - 250 K/W

SOT23 [1] - - 500 K/W

SOT323 [1] - - 625 K/W

Product data sheet Rev. 05 — 2 September 2009 5 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

7. Characteristics

Table 8. Characteristics

amb

= 25

C unless otherwise specified

Symbol Parameter Conditions Min Typ Max Unit

ICBO collector-base cut-off

current VCB = −50 V; IE = 0 A - - −100 nA

ICEO collector-emitter

cut-off current VCE = −30 V; IB = 0 A - - −1µA

VCE = −30 V; IB = 0 A;

Tj= 150 °C--−50 µA

IEBO emitter-base cut-off

current VEB = −5 V; IC = 0 A - - −4mA

hFE DC current gain VCE = −5 V; IC = −40 mA 30 - -

VCEsat collector-emitter

saturation voltage IC = −30 mA; IB = −1.5 mA - - −150 mV

VI(off) off-state input voltage VCE = −5 V; IC = −100 µA-−1.3 −0.5 V

VI(on) on-state input voltage VCE = −300 mV; IC = −20 mA −2−1.7 - V

R1 bias resistor 1 (input) 0.7 1 1.3 kΩ

R2/R1 bias resistor ratio 0.8 1 1.2

Cccollector capacitance VCB = −10 V; IE = ie = 0 A;

f=1MHz --2pF

Product data sheet Rev. 05 — 2 September 2009 6 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

VCE = −5 V

(1) Tamb = 100 °C

(2) Tamb = 25 °C

(3) Tamb = −40 °C

IC/IB = 20

(1) Tamb = 100 °C

(2) Tamb = 25 °C

(3) Tamb = −40 °C

Fig 1. DC current gain as a function of collector

current; typical values Fig 2. Collector-emitter saturation voltage as a

function of collector current; typical values

VCE = −0.3 V

(1) Tamb = −40 °C

(2) Tamb = 25 °C

(3) Tamb = 100 °C

VCE = −5 V

(1) Tamb = −40 °C

(2) Tamb = 25 °C

(3) Tamb = 100 °C

Fig 3. On-state input voltage as a function of

collector current; typical values Fig 4. Off-state input voltage as a function of

collector current; typical values

IC (mA)

−10−1−102

−10−1

006aaa115

102

hFE

10−1

(1)

(2)

(3)

006aaa116

IC (mA)

−10 −102

−10−1

−1

VCEsat

(V)

−10−2

(1)

(3)

(2)

006aaa117

IC (mA)

−10−1−102

−10−1

−1

−10

VI(on)

(V)

−10−1

(1)

(2)

(3)

IC (mA)

−10−1−10−1

006aaa118

−1

−10

VI(off)

(V)

−10−1

(1)

(2)

(3)

Product data sheet Rev. 05 — 2 September 2009 7 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

8. Package outline

Fig 5. Package outline SOT416 (SC-75)

UNIT A1

max bpcDEe1HELpQw

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.1 0.30

0.15 0.25

0.10 1.8

1.4 0.9

0.7 0.5

11.75

1.45 0.2

0.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15 0.23

0.13

SOT416 SC-75

detail X

EAB

vMA

0 0.5 1 mm

scale

0.95

0.60

Plastic surface-mounted package; 3 leads SOT416

04-11-04

06-03-16

E©W

Product data sheet Rev. 05 — 2 September 2009 8 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 6. Package outline SOT346 (SC-59A/TO-236)

UNIT A1bpcDE e1HELpQwv

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.50

0.35 0.26

0.10 3.1

2.7 1.7

1.3 0.95

1.9 3.0

2.5 0.33

0.23 0.2

0.2

DIMENSIONS (mm are the original dimensions)

0.6

0.2

SOT346 TO-236 SC-59A

detail X

vMA

0 1 2 mm

scale

1.3

1.0 0.1

0.013

Plastic surface-mounted package; 3 leads SOT346

04-11-11

06-03-16

S©m

Product data sheet Rev. 05 — 2 September 2009 9 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 7. Package outline SOT883 (SC-101)

UNIT A1

max.

A(1) bb

1e1

eLL

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.50

0.46 0.20

0.12 0.55

0.47

0.03 0.62

0.55 0.35 0.65

DIMENSIONS (mm are the original dimensions)

Note

1. Including plating thickness

0.30

0.22

0.30

0.22

SOT883 SC-101 03-02-05

03-04-03

1.02

0.95

0 0.5 1 mm

scale

Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT883

S©m

Product data sheet Rev. 05 — 2 September 2009 10 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 8. Package outline SOT54 (SC-43A/TO-92)

UNIT A

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 5.2

5.0

0.48

0.40

0.45

0.38

4.8

4.4

1.7

1.4

4.2

3.6

14.5

12.7

2.54

1.27

L1(1)

max.

2.5

0.66

0.55

DIMENSIONS (mm are the original dimensions)

Note

1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

SOT54 TO-92 SC-43A 04-06-28

04-11-16

A L

0 2.5 5 mm

scale

b1L1

Plastic single-ended leaded (through hole) package; 3 leads SOT54

E I i‘Dl, [\rlt E: E@W

Product data sheet Rev. 05 — 2 September 2009 11 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 9. Package outline SOT54A

UNIT A

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 5.2

5.0

0.48

0.40

0.45

0.38

4.8

4.4

1.7

1.4

4.2

3.6

14.5

12.7 3

5.08

e1L2

2.54

L1(1)

max.

0.66

0.55

DIMENSIONS (mm are the original dimensions)

Note

1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

SOT54A 97-05-13

04-06-28

0 2.5 5 mm

scale

Plastic single-ended leaded (through hole) package; 3 leads (wide pitch) SOT54A

S©m

Product data sheet Rev. 05 — 2 September 2009 12 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 10. Package outline SOT54 variant

UNIT A

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 5.2

5.0

0.48

0.40

0.45

0.38

4.8

4.4

1.7

1.4

4.2

3.6

14.5

12.7

2.54

1.27

L1(1)

max

2.5 2.5

0.66

0.55

DIMENSIONS (mm are the original dimensions)

Note

1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

SOT54 variant

A L

0 2.5 5 mm

scale

b1L1

Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant

04-06-28

05-01-10

Rag—J E©

Product data sheet Rev. 05 — 2 September 2009 13 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 11. Package outline SOT23 (TO-236AB)

UNIT A1

max. bpcDE e1HELpQwv

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

04-11-04

06-03-16

IEC JEDEC JEITA

mm 0.1 0.48

0.38 0.15

0.09 3.0

2.8 1.4

1.2 0.95

1.9 2.5

2.1 0.55

0.45 0.1

0.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

SOT23 TO-236AB

detail X

vMA

0 1 2 mm

scale

1.1

0.9

Plastic surface-mounted package; 3 leads SOT23

Product data sheet Rev. 05 — 2 September 2009 14 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

Fig 12. Package outline SOT323 (SC-70)

UNIT A1

max bpcD Ee1HELpQwv

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.1

1.1

0.8 0.4

0.3 0.25

0.10 2.2

1.8 1.35

1.15 0.65

1.3 2.2

2.0 0.23

0.13 0.20.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

SOT323 SC-70

detail X

vMA

0 1 2 mm

scale

Plastic surface-mounted package; 3 leads SOT323

04-11-04

06-03-16

Product data sheet Rev. 05 — 2 September 2009 15 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

9. Packing information

[1] For further information and the availability of packing methods, see Section 12.

Table 9. Packing methods

The indicated -xxx are the last three digits of the 12NC ordering code.

[1]

Type number Package Description Packing quantity

3000 5000 10000

PDTA113EE SOT416 4 mm pitch, 8 mm tape and reel -115 - -135

PDTA113EK SOT346 4 mm pitch, 8 mm tape and reel -115 - -135

PDTA113EM SOT883 2 mm pitch, 8 mm tape and reel - - -315

PDTA113ES SOT54 bulk, straight leads - -412 -

SOT54A tape and reel, wide pitch - - -116

SOT54A tape ammopack, wide patch - - -126

SOT54 variant bulk, delta pinning - -112 -

PDTA113ET SOT23 4 mm pitch, 8 mm tape and reel -215 - -235

PDTA113EU SOT323 4 mm pitch, 8 mm tape and reel -115 - -135

Product data sheet Rev. 05 — 2 September 2009 16 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

10. Revision history

Table 10. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PDTA113E_SER_5 20090902 Product data sheet - PDTA113E_SER_4

Modifications: •This data sheet was changed to reflect the new company name NXP Semiconductors,

including new legal definitions and disclaimers. No changes were made to the technical

content.

•Figure 5 “Package outline SOT416 (SC-75)” updated

•Figure 6 “Package outline SOT346 (SC-59A/TO-236)” updated

•Figure 11 “Package outline SOT23 (TO-236AB)” updated

•Figure 12 “Package outline SOT323 (SC-70)” updated

PDTA113E_SER_4 20050405 Product data sheet - PDTA113ET_3

PDTA113ET_3 20040720 Objective data sheet - PDTA113ET_2

PDTA113ET_2 20040415 Objective data sheet - PDTA113ET_1

PDTA113ET_1 20040316 Objective data sheet - -

Product data sheet Rev. 05 — 2 September 2009 17 of 18

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

11. Legal information

11.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

11.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

11.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/profile/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conflict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

11.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

12. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

founded by PHILIPS

NXP Semiconductors PDTA113E series

PNP resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 2 September 2009

Document identifier: PDTA113E_SER_5

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

13. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1

2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2

3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5

8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

9 Packing information. . . . . . . . . . . . . . . . . . . . . 15

10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16

11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17

11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17

11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17

12 Contact information. . . . . . . . . . . . . . . . . . . . . 17

13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Products related to this Datasheet

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