74ABT16273 Datasheet by NXP USA Inc.

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74ABT16273
16-bit D-type flip-flop
Product data
Replaces data sheet 74ABT/H16273 of 1998 Feb 27 2004 Feb 12
INTEGRATED CIRCUITS
Qmescenl supply current
Philips Semiconductors Product data
74ABT1627316-bit D-type flip-flop
2
2004 Feb 12 853-1793 ECN 01-A15421
FEATURES
•16-bit D-type edge triggered flip-flops
•Output capability: +64 mA/–32 mA
•TTL input and output switching levels
•Live insertion/extraction permitted
•Power-up reset
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT16273 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
This part is a 16-bit edge triggered D-type flip-flop with non-inverting
high drive outputs. This device can be used as two 8-bit flip-flops or
one 16-bit flip-flop. When the clock (CP) goes High, the data on the
D inputs is stored and the Q outputs display the stored data.
This device also features a master reset (MR) that resets all
flip-flops to the Low state when MR is set to the Low state.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS
Tamb = 25°C; GND = 0V TYPICAL UNIT
tPLH
tPHL
Propagation delay
An to Bn or Bn to An CL = 50pF;
VCC = 5.0V 2.5
2.0 ns
CIN Input capacitance VI = 0V or VCC 4 pF
ICCH
Quiescent su
pp
ly current
Outputs High; VCC = 5.5V 200 µA
ICCL
Quiescent
su ly
current
Outputs low; VCC = 5.5V 8 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA DWG NUMBER
48-Pin Plastic SSOP Type III –40°C to +85°C74ABT16273 DL SOT370-1
48-Pin Plastic TSSOP Type II –40°C to +85°C74ABT16273 DGG SOT362-1
LOGIC SYMBOL
32
1Q0 1Q1 1Q2
65
1Q3
47 46 44 43
1D0 1D1 1D2 1D3
48
1
98
1Q4 1Q5 1Q6
1211
1Q7
41 40 38 37
1D4 1D5 1D6 1D7
CP
MR
1413 1716
36 35 33 32
25
24
2019 2322
30 29 27 26
2Q0 2Q1 2Q2 2Q3
2D0 2D21 2D2 2D3
2Q4 2Q5 2Q6 2Q7
2D4 2D5 2D6 2D7
CP
MR
SH00052
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND
FUNCTION
1, 24 1MR, 2MR Master reset input
(active-Low)
2, 3, 5, 6, 8, 9, 11, 12,13,
14, 16, 17, 19, 20, 22, 23 1Q0-1Q7
2Q0-2Q7 Data outputs
47, 46, 44, 43, 41, 40, 38, 37,
36, 35, 33, 32, 30, 29, 27, 26 1D0-1D7
2D0-2D7 Data inputs
25, 48 1CP, 2CP Clock pulse input
(active rising edge)
4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0V)
7, 18, 31, 42 VCC Positive supply
voltage
jjjjjjjjjjjjjjjjjjjjjjjj EEEEEEEEEEEEEEEEEEEEEEEE 7 7
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 3
LOGIC SYMBOL (IEEE/IEC)
1 ∇1D
2 ∇
2D
SH00053
1
48
24
25
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
R1
C1
R2
C2
1MR
1Q0
!Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q3
2Q4
2Q2
2Q5
2Q7
2MR
2Q6
CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
2D1
2D3
2D4
2D2
2D5
2D7
2CP
2D6
FUNCTION TABLE
Inputs Output operating
mode
nMR nCP nDX nQ0-nQ7 mo
d
e
L X X L Reset (clear)
H↑h H Load “1”
H↑I L Load “0”
H L X Q0Retain state
H = High voltage level
h = high voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
I = Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don’t care
↑= Low-to-High clock transition
Q0= Output as it was
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1MR
1Q0
!Q1
GND
1Q2
1Q3
1Q4
1Q5
GND
1Q6
1Q7
2Q0
2Q1
GND
2Q3
VCC
2Q4
VCC
2Q2
2Q5
GND
2Q7
2MR
2Q6
CP
1D0
1D1
GND
1D2
1D3
1D4
1D5
GND
1D6
1D7
2D0
2D1
GND
2D3
VCC
2D4
VCC
2D2
2D5
GND
2D7
2CP
2D6
SH00054
l # # # WL # # WE fl A>o a»
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 4
LOGIC DIAGRAM
CP
Q
RD
D
nD0
nQ0
CP
Q
RD
D
nD1
CP
Q
RD
D
nD2
CP
Q
RD
D
nD3
CP
Q
RD
D
nD4
CP
Q
RD
D
nD5
CP
Q
RD
D
nD6
CP
Q
RD
D
nD7
nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7
nCP
nMR
SH00055
n = 1 or 2
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to –7.0 V
IIK DC input diode current VI < 0 –18 mA
VIDC input voltage3–1.2 to +7.0 V
IOK DC output diode current VO < 0 –50 mA
VOUT DC output voltage3Output in Off or High state –0.5 to +5.5 V
IO
DC out
p
ut current
Output in Low state 128
mA
I
OUT
DC
o
u
tp
u
t
c
u
rrent
Output in High state –64
mA
Tstg Storage temperature range –65 to +150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
MIN MAX
VCC DC supply voltage 4.5 5.5 V
VIInput voltage 0 VCC V
VIH High-level input voltage 2.0 V
VIL Input voltage 0.8 V
IOH High-level output current –32 mA
IOL Low-level output current 64 mA
∆t/∆vInput transition rise or fall rate; Outputs enabled 0 10 ns/V
Tamb Operating free-air temperature range –40 +85 °C
Inp Heakage current vcc 5 av v‘ : vcc or GND :01 Q‘ wescem Suppl“ 22- went mA
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = +25°CTemp = -40°C
to +85°CUNIT
MIN TYP MAX MIN MAX
VIK Input clamp voltage VCC = 4.5V; IIK = –18mA 0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5
VOH High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V
VCC = 4.5V; IOH = –32mA; VIL or VIH 2.0 2.4 2.0
VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55
VRST Power-up output
voltage3VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V
I
p
VCC =55V
;
V=V
CC or GND
±01
±1
±1
µA
I
I
u
u
V
CC =
5
.
5V
;
V
I =
V
CC
or
GND
±0
.
1
±1
±1
µ
A
I
CC ICC
µ
IOFF Power-off leakage
current VCC= 0.0V; VO or VI t 4.5V ±5.0 ±100 ±100 µA
IOoutput current1VCC = 5.5V; VO = 2.5V –50 –70 –180 –50 –180 mA
ICEX Output High leakage
current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA
ICCH
pp
VCC = 5.5V; Outputs High, VI = GND or VCC 0.2 1 1
mA
ICCL
u
u
y
u
VCC = 5.5V; Outputs Low, VI = GND or VCC 8 19 19
mA
∆ICC Additional supply current
per input pin2VCC = 5.5V; One input at 3.4V.
Other inputs at VCC or GND 5 100 100 µA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω;
LIMITS
SYMBOL PARAMETER WAVEFORM Tamb = +25°C
VCC = +5.0V Tamb = –40 to +85 °C
VCC = +5.0V ±0.5V UNIT
MIN TYP MAX MIN MAX
tPLH
tPHL
Propagation delay
nCP to nQx 11.5
1.2 2.5
2.0 3.4
2.7 1.5
1.2 4.0
3.0 ns
tPHL Propagation delay
nMR to nQx 2 1.9 3.7 4.3 1.9 5.3 ns
fMAX Maximum clock frequency 1 150 240 150 MHz
W/A / j!
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 6
AC SETUP REQUIREMENTS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM Tamb = +25°C
VCC = +5.0V Tamb = –40 to +85 °C
VCC = +5.0V ±0.5V UNIT
MIN TYP MIN
tS(H)
tS(L) Setup time, High or Low
nDx to nCP 32.0
2.0 1.0
1.0 2.0
2.0 ns
th(H)
th(L) Hold time, High or Low
nDx to nCP 30
0–0.6
–0.6 0
0ns
tW(H)
tW(L) Clock pulse width
High or Low 13.3
3.3 1.2
1.0 3.3
3.3 ns
tW(L) Master Reset pulse width, Low 2 3.3 1.1 3.3 ns
tREC Recovery time
nMR + nCP 2 2.0 0.0 2.0 ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
VM
tPLH
tPHL
VMVM
VM
nCP
nQx
1/fMAX
tW(H) tW(L)
SH00056
VOL
VOH
0V
VM
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
VM
nMR VM
nQx
tw(L)
VM
tPHL
VM
tREC
nCP
SH00057
0V
0V
VOH
VOL
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
NOTE: The shaded areas indicate when the input is
permitted to change for predictable output performance.
VM
nDx
VMVM
VMVM
nCP
ts(H) th(H) ts(L) th(L)
SH00058
VM
0V
0V
Waveform 3. Data Setup and Hold Times
i
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 7
TEST CIRCUIT AND WAVEFORM
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CLRL
VCC
Test Circuit for Outputs
VMVM
tWAMP (V)
NEGATIVE
PULSE 10% 10%
90% 90%
0V
VMVM
tW
AMP (V)
POSITIVE
PULSE
90% 90%
10% 10% 0V
tTHL (tF)
tTLH (tR)t
THL (tF)
tTLH (tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ABT16
SH00059
Amplitude Rep. Rate tWtF
3.0V 1MHz 500ns 2.5ns
tR
2.5ns
5 10mm W DIMENSIONS (mm mm: orlqlnnl dlmenslona) uurr max. A, A: A; b, c DW E") e HE L Ll, v w y z") e m :3 2: s: 3?: :22: ii :3: .. a: 3:: s: Mme 1. Plasuc or mam prokruswons No.25 mm maxwmum per we are not included. ‘v’é'é's‘lgfi ,Ec JEDECREFEREWESJEM é‘é’ifififi‘u ISSUEWE sow/04 Morns E Q m
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 8
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
pvmindex +\a O | w. f L fitlHHflHHHgWHE’IflHHHHEflL E‘ W o 25 5mm LI—I—A—A—l—A—A—A—A—l same A mm mm A1 A: A; an e D") Em e N; L Lv 43 v w y z 9 0,15 1.05 023 0.2 12.5 6.2 3.3 0.0 0.50 0.0 5“ mm “2 0,05 mas 0'25 017 01 12.4 6.0 05 7.9 ‘ 0.4 035 “'25 “'05 0" 0A 0“ "Me: 1 Magic of man: prouusions arms mm maximum per side are not inc‘uded. 2 Wash: menead pmmsuons at 0.25 mm maxim um per side an n0! mcludea OUTLINE REFERENCES EUROPEAN lssllEDA‘l’E VERSION .EC JEDEC JEITA maJEcnou $073024 M0453 a @ 09937035
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 9
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 10
REVISION HISTORY
Rev Date Description
_3 20040212 Product data (9397 750 12892); 853-1793 ECN 01–A15421 of 26 January 2004.
Replaces data sheet 74ABT_H16273_2 of 1998 Feb 27 (9397 750 03489).
Modifications:
•Delete all references to 74ABTH16273 (product discontinued).
_2 19980227 Product data (9397 750 03489); ECN 853-1793 19027 of 27 February 1998. Supersedes initial version.
sales.addresses@www.semiconduclorsphilipsxmm, Mémmbm PHILIPS
Philips Semiconductors Product data
74ABT16273
16-bit D-type flip-flop
2004 Feb 12 11
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information please visit
http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Koninklijke Philips Electronics N.V. 2004
All rights reserved. Printed in U.S.A.
Date of release: 02-04
Document order number: 9397 750 12892
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Data sheet status[1]
Objective data
Preliminary data
Product data
Product
status[2] [3]
Development
Qualification
Production
Definitions
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Level
I
II
III

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