NCP/NCV380 Datasheet by ON Semiconductor

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© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 16 1Publication Order Number:
NCP380/D
NCP380, NCV380
Fixed/Adjustable
Current‐Limiting
Power‐Distribution
Switches
The NCP380 is a high side power-distribution switch designed for
applications where heavy capacitive loads and short-circuits are likely
to be encountered. The device includes an integrated 55 mW (DFN
package), P-channel MOSFET. The device limits the output current to
a desired level by switching into a constant-current regulation mode
when the output load exceeds the current-limit threshold or a short is
present. The current-limit threshold is either user adjustable between
500 mA and 2.1 A via an external resistor or internally fixed. The
power-switch rise and fall times are controlled to minimize current
ringing during switching.
An internal reverse-voltage detection comparator disables the
power-switch if the output voltage is higher than the input voltage to
protect devices on the input side of the switch.
The FLAG logic output asserts low during over current,
reverse-voltage or over temperature conditions. The switch is
controlled by a logic enable input active high or low.
Features
•2.5 V – 5.5 V Operating Range
•70 mW High-side MOSFET
•Current Limit:
♦User adjustable from 500 mA to 2.1 A
♦Fixed 500 mA, 1 A, 1.5 A, 2 A and 2.1 A
•Under Voltage Lock-out (UVLO)
•Built-in Soft-start
•Thermal Protection
•Soft Turn-off
•Reverse Voltage Protection
•Junction Temperature Range: −40°C to 125°C
•Enable Active High or Low (EN or EN)
•Compliance to IEC61000−4−2 (Level 4)
♦8.0 kV (Contact)
♦15 kV (Air)
•UL Listed − File No. E343275
•NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•These are Pb-Free Devices
Typical Applications
•Laptops
•USB Ports/Hubs
•TVs
UDFN6
CASE 517AB
MARKING DIAGRAMS
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XXMG
G
1
2
3
6
5
4
TSOP−5
CASE 483
1
5
XXXAYWG
G
(Note: Microdot may be in either location)
TSOP−6
CASE 318G
XXX = Specific Device Code
A =Assembly Location
M = Date Code
Y = Year
W = Work Week
G= Pb−Free Package
XXXAYWG
G
1
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
ORDERING INFORMATION
UDFN6
TSOP−5
TSOP−6
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Figure 1. Typical Application Circuit
*For Adjustable Version Only.
IN
GND
USB INPUT
5 V
FLAG
EN
Rfault
100 kW
1 mF
FLAG
EN
NCP380
OUT
ILIM*
USB
DATA
USB
Port
D+
D−
VBUS
GND
Rlim
120 mF
(Top view)
Figure 2. Pin Connections
1
2
3
6
5
4
OUT
ILIM*
FLAG
IN
GND
EN
PAD1
UDFN6
OUT
GND
FLAG
IN
EN
1
2
3
5
4
TSOP−5
1
2
3
6
4
OUT
ILIM*5
FLAG
IN
GND
EN
TSOP−6
*For adjustable version only, otherwise not connected.
Table 1. PIN FUNCTION DESCRIPTION
Pin Name Type Description
EN INPUT Enable input, logic low/high (i.e. EN or EN) turns on power switch
GND POWER Ground connection;
IN POWER Power-switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as close as pos-
sible to the IC.
FLAG OUTPUT Active-low open-drain output, asserted during overcurrent, overtemperature or reverse-voltage conditions.
Connect a 10 kW or greater resistor pull-up, otherwise leave unconnected.
OUT OUTPUT Power-switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1 mF or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM* INPUT External resistor used to set current-limit threshold; recommended 5 kW < RILIM < 250 kW.
PAD1** THERMAL Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
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Table 2. MAXIMUM RATINGS
Rating Symbol Value Unit
From IN to OUT Pins: Input/Output (Note 1) VIN , VOUT −7.0 to +7.0 V
IN, OUT, EN, ILIM, FLAG, Pins: Input/Output (Note 1) VEN, VILIM, VFLAG, VIN, VOUT −0.3 to +7.0 V
FLAG Sink Current ISINK 1 mA
ILIM Source Current ILIM 1 mA
ESD Withstand Voltage (IEC 61000−4−2)
(Output Only, when Bypassed with 1.0 mF Capacitor Minimum) ESD IEC 15 Air, 8 Contact kV
Human Body Model (HBM) ESD Rating (Note 2) ESD HBM 2,000 V
Machine Model (MM) ESD Rating (Notes 2 and 3) ESD MM 200 V
Latch-up Protection (Note 4)
Pins IN, OUT, EN, ILIM, FLAG LU 100 mA
Maximum Junction Temperature Range (Note 6) TJ−40 to +TSD °C
Storage Temperature Range TSTG −40 to +150 °C
Moisture Sensitivity (Note 5) MSL Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±200 V per JEDEC standard: JESD22−A115 for all pins.
3. Except EN pin, 150 V.
4. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
6. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
Table 3. OPERATING CONDITIONS
Symbol Parameter Conditions Min Typ Max Unit
VIN Operational Power Supply 2.5 − 5.5 V
VEN Enable Voltage 0 − 5.5
TAAmbient Temperature Range −40 25 +85 °C
TJJunction Temperature Range −40 25 +125 °C
RILIM Resistor from ILIM to GND Pin 5.0 − 250 kW
ISINK FLAG Sink Current − − 1.0 mA
CIN Decoupling Input Capacitor 1.0 − − mF
COUT Decoupling Output Capacitor USB Port per Hub 120 − − mF
RqJA Thermal Resistance Junction-to-Air UDFN−6 Package (Notes 7 and 8) − 120 − °C/W
TSOP−5 Package (Notes 7 and 8) − 305 − °C/W
TSOP−6 Package (Notes 7 and 8) − 280 − °C/W
IOUT Maximum DC Current UDFN−6 Package − − 2.1 A
TSOP−5, TSOP−6 Package − − 1.0 A
PDPower Dissipation Rating (Note 9) TA v 25°CUDFN−6 Package − 830 − mW
TSOP−5 Package − 325 − mW
TSOP−6 Package − 350 − mW
TA = 85°CUDFN−6 Package − 325 − mW
TSOP−5 Package − 130 − mW
TSOP−6 Package − 145 − mW
7. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
8. The RqJA is dependent of the PCB heat dissipation. Board used to drive this data was a 2” × 2” NCP380EVB board. It is a 2 layers board
with 2-once copper traces on top and bottom of the board. Exposed pad is connected to ground plane for UDFN−6 version only.
9. The maximum power dissipation (PD) is given by the following formula: PD+
TJMAX *TA
RqJA
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Table 4. ELECTRICAL CHARACTERISTICS
(Min & Max Limits apply for TA between −40°C to +85°C and TJ up to +125°C for VIN between 2.5 V to 5.5 V (Unless otherwise noted).
Typical values are referenced to TA= +25°C and VIN =5V.)
Symbol Parameter Conditions Min Typ Max Unit
POWER SWITCH
RDS(on) Static Drain-source On-state
Resistance DFN Package
TSOP Package
VIN = 5 V –40°C < TJ < 125°C − 55 75 mW
2.5 V < VIN < 5.5 V –40°C < TJ < 125°C − − 110
VIN = 5 V –40°C < TJ < 125°C − 70 95 mW
2.5 V < VIN < 5.5 V –40°C < TJ < 125°C − − 135
TROutput Rise Time VIN = 5 V CLOAD = 1 mF,
RLOAD = 100 W (Note 10) 0.3 1.0 1.5 ms
VIN = 2.5 V 0.2 0.65 1.0
TFOutput Fall Time VIN = 5 V 0.1 − 0.5
VIN = 2.5 V 0.1 − 0.5
ENABLE INPUT EN OR EN
VIH High-level Input Voltage 1.2 − − V
VIL Low-level Input Voltage − − 0.4 V
IEN Input Current VEN = 0 V, VEN = 5 V −0.5 − 0.5 mA
TON Turn On Time CLOAD = 1 mF, RLOAD = 100 W (Note 11) 2.0 3.0 4.0 ms
TOFF Turn Off Time 1.0 − 3.0 ms
CURRENT LIMIT
IOCP Current-limit Threshold
(Maximum DC Output Current
IOUT Delivered to Load)
VIN = 5 V RILIM = 20 kW (Note 11) 1.02 1.20 1.38 A
RILIM = 40 kW
(Notes 11 and 13)
0.595 0.700 0.805
Fixed 0.5 A (Note 12) 0.5 0.58 0.65 A
Fixed 1.0 A (Note 12) 1.0 1.15 1.3
Fixed 1.5 A (Note 12) 1.5 1.75 1.9
Fixed 2.0 A (Note 12) 2.0 2.25 2.5
Fixed 2.1 A (Note 12) 2.1 2.25 2.5
TDET Response Time to Short Circuit VIN = 5 V − 2.0 − ms
TREG Regulation Time 1.8 3.0 4.0 ms
TOCP Overcurrent Protection Time 14 20 26 ms
REVERSE-VOLTAGE PROTECTION
VREV Reverse-voltage Comparator
Trip Point (VOUT – VIN)− 100 − mV
TREV Time from Reverse-voltage
Condition to MOSFET Switch Off
& FLAG Low
VIN = 5 V 4.0 6.0 9.0 ms
TRREV Re-arming Time 7.0 10 15 ms
UNDERVOLTAGE LOCKOUT
VUVLO IN Pin Low-level Input Voltage VIN Rising 2.0 2.3 2.4 V
VHYST IN Pin Hysteresis TJ = 25°C 25 − 60 mV
TRUVLO Re-arming Time 7.0 10 15 ms
SUPPLY CURRENT
IINOFF Low-level Output Supply Current VIN = 5 V, No Load on OUT, Device OFF
VEN = 0 V or VEN = 5 V − 1.0 2.1 mA
IINON High-level Output Supply
Current VIN = 5 V, Device Enable
2 A and 2.1 A Versions
1 A and 1.5 A Current Versions
0.5 A Current Version
−
−
−
−
−
−
90
80
70
mA
IREV Reverse Leakage Current VOUT = 5 V, VIN = 0 V TJ = 25°C − − 1.0 mA
NCP380, NCV380 Table 4. ELECTRICAL CHARACTERISTICS teentrnuectt tMrn & Max errts appty lor TA between Arm to +35%: and TJ up to +125°ClorVrN be Typical vaiues are retereneert m TA = +2500 and VW = 5 v.) Symbol Parameter ‘ Conditions PEA—G PIN VOL Fm: Output Low Voitage tm = t mA ILEAK Oilrsiate Leakage vm = 5 v Tm FIIG Degtrtch m Derassemon Trme due in CV Reverse Voilage Canartra Tmcp Fm: Degtrtch FIIG Assertren due to Overt: THERMAL suumown TSD Thermat Shutdown Threshoid Tspocp Thermat Reguiauon Threshoid TRSD Thermat Shutdown Rearmmg Threshoid Product parametrrc pertarmance rs inrtrcatett rn the Electrrcat Characterrstres lor the trste pertormance may not be inarcatett by the Eiectricai Characterrstrcs rt operated under ditte to. Parameters are guaranteed lor Cm.) and RLOAD connected to the OUT pm wrth resp 1|. Actrustabte current versren, Rm tolerance :m. 12 Frxed current versren 13.Not productron test guaranteed by characterrzatren. OUT NCPSBD T $ Figure 3. Test Configuration
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Table 4. ELECTRICAL CHARACTERISTICS (continued)
(Min & Max Limits apply for TA between −40°C to +85°C and TJ up to +125°C for VIN between 2.5 V to 5.5 V (Unless otherwise noted).
Typical values are referenced to TA= +25°C and VIN =5V.)
Symbol UnitMaxTypMinConditionsParameter
FLAG PIN
VOL FLAG Output Low Voltage IFLAG = 1 mA 400 mV
ILEAK Off-state Leakage VFLAG = 5 V 1.0 mA
TFLG FLAG Deglitch FLAG De-assertion Time due to Overcurrent or
Reverse Voltage Condition 4.0 6.0 9.0 ms
TFOCP FLAG Deglitch FLAG Assertion due to Overcurrent 6.0 8.0 12 ms
THERMAL SHUTDOWN
TSD Thermal Shutdown Threshold 140 °C
TSDOCP Thermal Regulation Threshold 125 °C
TRSD Thermal Shutdown Rearming
Threshold 115 °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
10.Parameters are guaranteed for CLOAD and RLOAD connected to the OUT pin with respect to the ground, See Figure 3.
11. Adjustable current version, RILIM tolerance ±1%.
12.Fixed current version.
13.Not production test, guaranteed by characterization.
Figure 3. Test Configuration
IN
RLOAD
1 mF
NCP380
OUT
CLOAD
GND
VIN
Figure 4. Voltage Waveform
VEN
VEN
VOUT
TON
TOFF
50%
90%
10%
VOUT
TRTF
90%
10% 10%
———————————————
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BLOCK DIAGRAM
Figure 5. Block Diagram
Blocking Control
Gate Driver
Control Logic and Timer
EN Block
Vref
TSD UVLO Osc
Current
Limiter
Flag
IN
ILIM*
GND
EN
OUT
/FLAG
*For adjustable version only, otherwise not connected.
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Ton + TR
Figure 6. Ton Delay and Trise Time
Toff + Tfall
Figure 7. Toff Delay and Tfall
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Figure 8. Turn On a Short
Treg
TOCP
TSD
Warning
Figure 9. 2 W Short on Output. Complete Regulation Sequence
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Figure 10. OCP Regulation and TSD Warning Event
TFOCP TSD Warning
Treg
TOCP
Figure 11. Timer Regulation Sequence During 2 W Overload
VIN
VOUT
IIN
/FLAG
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Figure 12. Direct Short on OUT Pin
Figure 13. From Timer Regulation to Load Removal Sequence
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TFOCP
Figure 14. From No Load to Direct Short Circuit
VREV
TFREV
Figure 15. Reverse Voltage Detection
VOUT
IOUT
/FLAG
VOUT
VIN
/FLAG
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T RREV
Figure 16. Reverse Voltage Removal
Figure 17. Undervoltage Threshold (Falling) and Hysteresis
Temperature (°C)
UVLO (V)
−50
2.2
UVLO vs. Temperature
0 50 100 150
2.22
2.24
2.26
2.28
2.3
2.32
2.34
2.36
2.38
2.4
UVLO − hysteresis vs.
Temperature
55°C C 25 74090 23 mica. Vm‘VD C 85 2530 740°C 100 23 SE. 4.9 44 3.9 34 2,9 2.4 VIn(\/)
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Low−Level Output Supply Current vs Vin
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.4 2.9 3.4 3.9 4.4 4.9 5.4
Vin(V)
IINOFF (mA)
−40°C 25°C 85°C 125°C
Figure 18. Standby Current vs Vin
High−Level Output Supply Current vs Vin
0
10
20
30
40
50
60
70
80
90
100
2.4 2.9 3.4 3.9 4.4 4.9 5.4
Vin(V)
IINON (mA)
−40°C 25°C 85°C 125°C
Figure 19. Quiescent Current vs Vin
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Figure 20. RDS(on) vs Temperature, TSOP Package
Figure 21. RDS(on) vs Temperature, mDFN Package
TSOP Package
Temperature (°C)
RDS(on) (mW)
RDS(on) vs. Temperature
mDFN Package
Temperature (°C)
RDS(on) (mW)
−50 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140
40
45
50
55
60
65
70
75
80
85
90
95
100
RDS(on) vs. Temperature
−50 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140
40
45
50
55
60
65
70
75
80
85
90
95
100
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FUNCTIONAL DESCRIPTION
Overview
The NCP380 is a high side P channel MOSFET power
distribution switch designed to protect the input supply
voltage in case of heavy capacitive loads, short circuit or
over current. In addition, the high side MOSFET is turned
off during under voltage, thermal shutdown or reverse
voltage condition. Adjustable version allows the user to
program the current limit threshold using an external
resistor. Thanks to the soft start circuitry, NCP380 is able to
limit large current and voltage surges.
Overcurrent Protection
NCP380 switches into a constant current regulation mode
when the output current is above the IOCP threshold.
Depending on the load, the output voltage is decreased
accordingly.
•In case of hot plug with heavy capacitive load, the
output voltage is brought down to the capacitor voltage.
The NCP380 will limit the current to the IOCP threshold
value until the charge of the capacitor is completed.
Figure 22. Heavy capacitive load
VOUT
IOUT
Drop due to
Capacitor Charge
IOCP
•In case of overload, the current is limited to the IOCP
value and the voltage value is reduced according to the
load by the following relation:
VOUT +RLOAD IOCP (eq. 1)
Figure 23. Overload
IOUT
VOUT
IOCP × RLOAD
IOCP
•In case of short circuit or huge load, the current is
limited to the IOCP value within TDET time until the
short condition is removed. If the output remains
shorted or tied to a very low voltage, the junction
temperature of the chip exceeds TSDOCP value and the
device enters in thermal shutdown (MOSFET is
turned-off).
Figure 24. Short circuit
VOUT Thermal
Regulation
Threshold
Timer
Regulation
Mode
IOUT
IOCP
TOCP TREG
Then, the device enters in timer regulation mode, described
in 2 phases:
•Off-phase: Power MOSFET is off during TOCP to allow
the die temperature to drop.
•On-phase: regulation current mode during TREG. The
current is regulated to the IOCP level.
The timer regulation mode allows the device to handle
high thermal dissipation (in case of short circuit for
example) within temperature operating condition.
NCP380 stays in on-phase/off-phase loop until the over
current condition is removed or enable pin is toggled.
Remark: Other regulation modes can be available for
different applications. Please contact our
ON Semiconductor representative for availability.
FLAG Indicator
The FLAG pin is an open-drain MOSFET asserted low
during over current, reverse-voltage or over temperature
conditions. When an over current or a reverse voltage fault
is detected on the power path, FLAG pin is asserted low at
the end of the associate deglitch time (see electrical
characteristics). Thanks to this feature, the FLAG pin is not
tied low during the charge of a heavy capacitive load or a
voltage transient on output. Deglitch time is TFOCP for over
current fault and TREV for reverse voltage. The FLAG pin
remains low until the fault is removed. Then, the FLAG pin
goes high at the end of TFGL.
Undervoltage Lock-out
Thanks to a built-in under voltage lockout (UVLO)
circuitry, the output remains disconnected from input until
VIN voltage is below VUVLO. When VIN voltage is above
VUVLO, the system try to reconnect the output after a
rearming time. TRUVLO. This circuit has a VHYST hysteresis
witch provides noise immunity to transient.
Thermal Sense
Thermal shutdown turns off the power MOSFET if the die
temperature exceeds TSD. A Hysteresis prevents the part
from turning on until the die temperature cools at TRSD.
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Reverse Voltage Protection
When the output voltage exceeds the input voltage by
VREV voltage during TREV
, the reverse voltage circuitry
disconnects the output in order to protect the power supply.
The same time TREV is needed to turn on again the power
MOS plus a rearming time TRREV.
Enable Input
Enable pin must be driven by a logic signal (CMOS or
TTL compatible) or connected to the GND. VIN and EN
should not be connected together directly. VIN should be
well established and stablized prior to enabling the IC. If no
separate EN signal is available, a 10 kW/100 nF RC network
can be added between VIN and EN to delay the EN signal.
A logic low on EN or high on EN turns-on the device. A logic
high on EN or low on EN turns off device and reduces the
current consumption down to IINOFF.
Blocking Control
The blocking control circuitry switches the bulk of the
power MOS. When the part is off, the body diode limits the
leakage current IREV from OUT to IN. In this mode, anode
of the body diode is connected to IN pin and cathode is
connected to OUT pin. In operating condition, anode of the
body diode is connected to OUT pin and cathode is
connected to IN pin preventing the discharge of the power
supply.
APPLICATION INFORMATION
Power Dissipation
The junction temperature of the device depends on
different contributing factors such as board layout, ambient
temperature, device environment, etc... Yet, the main
contributor in terms of junction temperature is the power
dissipation of the power MOSFET. Assuming this, the
power dissipation and the junction temperature in normal
mode can be calculated with the following equations:
RD+RDS(on) ǒIOUTǓ2(eq. 2)
Where:
PD = Power dissipation (W)
RDS(on) = Power MOSFET on resistance (W)
IOUT = Output current (A)
TJ+PD RqJA )TA(eq. 3)
Where:
TJ= Junction temperature (°C)
RqJA = Package thermal resistance (°C/W)
TA= Ambient temperature (°C)
Power dissipation in regulation mode can be calculated by
taking into account the drop VIN−VOUT link to the load by
the following relation:
PD+ǒVIN *RLOAD IOCPǓ IOCP (eq. 4)
Where:
PD= Power dissipation (W)
VIN = Input Voltage (V)
RLOAD = Load Resistance (W)
IOCP = Output regulated current (A)
Adjustable Current-Limit Programming
(for adjustable version only)
The NCP380xMUAJAA and NCP380xSNAJAA,
respectively mDFN and TSOP6 packages, are proposed to
have current limit flexibility for end Customer. Indeed, Ilim
pin is available to connect pull down resistor to ground,
which participate to the current threshold adjustment. It’s
strongly recommended to use 0.1 or 1% resistor tolerance to
keep the over current accuracy.
For this resistance selection, Customer should define first
of all, the USB current to sustain, without the device enters
in the protection sequence. Main rule is to select this pull
down resistor in order to make sure min current limit is
above the USB current to provide continuously to the
upstream accessory.
Following, the main table selection contains the USB
current port for the accessory, the standard resistor selection
and typical/max over current threshold.
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Table 5. RESISTOR SELECTION FOR ADJUSTABLE CURRENT LIMIT VERSION
Min Current
Limit Value
(A) Theoric Resistor Value
(kW)
Selected Resistor Value
(kW)
1% or 0.1%
Typical OCP Target Value
(A)
Maximum
Current Value
(A)
0.5 44.2 44.2 0.59 0.67
0.6 37.5 37.4 0.71 0.81
0.7 32.2 31.6 0.825 0.95
0.8 27.7 27.4 0.94 1.08
0.9 24.0 23.7 1.06 1.22
1.0 21.0 21 1.18 1.35
1.1 18.5 18.2 1.3 1.49
1.2 16.6 16.5 1.41 1.62
1.3 14.6 14.3 1.53 1.76
1.4 13.0 13 1.65 1.9
1.5 11.4 11.3 1.78 2.05
1.6 10.4 10.2 1.88 2.17
1.7 9.2 9.09 2.01 2.31
1.8 8.3 8.25 2.12 2.438
1.9 7.4 7.32 2.23 2.56
2.0 6.5 6.49 2.36 2.7
2.1 5.6 5.49 2.48 2.85
The “Min current limit Value” column, represents the DC
current to provide to the accessory without over current
activation.
Second column is the theoretical resistor value obtained
with following formula to achieve typical current target:
Rlim +−5.2959 ILIM5)45.256 ILIM4*155.25 ILIM3)274.39 ILIM2*267.6 ILIM )134.21 (eq. 5)
Figure 25. RLIM Curve vs. Current Limit
Rlim Versus OCP Average
Current Limit (A)
RLIM (kW)
0
0
RLIM vs. OCP Average
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
NCP380, NCV380
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18
When the resistor is choosing to fit with the Customer
application, the limits of the over current threshold can be
calculated with the following formula:
)0.0000009 (Rlim *22.375)4
IOCP min +1.6915129 *0.0330328 Rlim )0.0011207(Rlim *22.375)2*0.0000451 (Rlim *22.375)3)(eq. 6)
IOCP max +2.2885175 *0.0446914 Rlim )0.0015163(Rlim *22.375)2*0.000061 (Rlim *22.375)3)
)0.0000012 (Rlim *22.375)4(eq. 7)
IOCPtyp +1.9900152 *0.0388621 Rlim )0.0013185(Rlim *22.375)2*0.0000531 (Rlim *22.375)3)
)0.0000011 (Rlim *22.375)4(eq. 8)
The minimum, typical and maximum current curves are
described in the following graph:
Figure 26. Current Threshold vs. Rlim Resistor
ILIM (A)
5
0
IOCP min vs. RLIM
RLIM (kW)
IOCP vs. RLIM
IOCP max vs. RLIM
7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
That is recommended to respect 6 kW−47 kW resistor
range for two reasons.
For the low resistor values, the current limit is pushed up
to high current level. Due to internal power dissipation
capability, a maximum of 2.4 A typical can be set for the
mDFN package if thermal consideration are respected. For
the TSOP6 version 1.2 A is the maximum recommended
value because the part could enter in thermal shutdown
mode before constant current regulation mode.
In the other side, if we want to keep 15% of accuracy, high
resistor values can be used up to 50 kW. With higher value,
the current threshold is lower than 500 mA, so in this case
degraded accuracy can be observed.
PCB Recommendations
The NCP380 integrates a PMOS FET rated up to 2 A, and
the PCB design rules must be respected to properly evacuate
the heat out of the silicon. The UDFN6 PAD1 must be
connected to ground plane to increase the heat transfer if
necessary. This pad must be connected to ground plane. By
increasing PCB area, the RqJA of the package can be
decreased, allowing higher power dissipation.
>> aw AH“ J—W ’—H—1|‘ aw u www.0nsemi.com
NCP380, NCV380
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19
Power Supply NCP380
IN
4.7 mF10 mF100 mF
OUT
ILIM
/FLAG
IN
GND
EN
1
2
3
6
5
4
GPM21BR61C106KE15L
GPM31CR60J107ME39L
LDO 3.3 V
OUTIN
GND
1
2
3
USB Port
VBUS
D+
D−
GND
5
2
3
4
1
10
12
11
GND
VCC
USB
Transceiver
VBUS(sense)
D+
D−
GND
CRTL[x:0]
DATA[x:0]
GND
VCC
CRTL_IN[x:0]
DATA_IN[x:0]
EN
STATUS
CRTL_OUT[x:0]
DATA_OUT[x:0]
SYS SYSTEM
USB Host
Controller
USB
Transceiver
12
11
10
5
2
3
4
1
D+
D−
GND
VBUS
USB Port
Downstream USB Port
VBUS(sense)
D+
D−
GND
GND
VCC
CRTL[x:0]
DATA[x:0]
Upstream USB Port
Figure 27. USB Host Typical Application
NCP380, NCV380
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20
Table 6. ORDERING INFORMATION
Device Marking
Active
Enable
Level
Over
Current
Limit Evaluation Board UL
Listed CB
Scheme Package Shipping†
NCP380LSNAJAAT1G AAC
Low
Adj. NCP380LSNAJAGEVB Y Y TSOP−6
(Pb−Free)
3,000
Tape / Reel
NCP380LSN05AAT1G AC5 0.5 A NCP380LSN05AGEVB Y Y TSOP−5
(Pb−Free)
NCP380LSN10AAT1G AC6 1.0 A NCP380LSN10AGEVB Y Y
NCP380LMUAJAATBG AA Adj. NCP380LMUAJAGEVB Y Y
UDFN6
(Pb−Free)
NCV380LMUAJAATBG* AN Adj. NCP380LMUAJAGEVB Y Y
NCP380LMU05AATBG AE 0.5 A NCP380LMU05AGEVB Y Y
NCP380LMU10AATBG AF 1.0 A NCP380LMU10AGEVB Y Y
NCP380LMU15AATBG AG 1.5 A NCP380LMU15AGEVB Y Y
NCV380LMU15AATBG* AQ 1.5 A NCP380LMU15AGEVB Y Y
NCP380LMU20AATBG AL 2.0 A NCP380LMU20AGEVB Y Y
NCP380HSNAJAAT1G AAD
High
Adj. NCP380HSNAJAGEVB Y Y TSOP−6
(Pb−Free)
NCP380HSN05AAT1G AC7 0.5 A NCP380HSN05AGEVB Y Y TSOP−5
(Pb−Free)
NCP380HSN10AAT1G ADA 1.0 A NCP380HSN10AGEVB Y Y
NCP380HMUAJAATBG AC Adj. NCP380HMUAJAGEVB Y Y
UDFN6
(Pb−Free)
NCV380HMUAJAATBG* AP Adj. NCP380HMUAJAGEVB Y Y
NCP380HMU05AATBG AH 0.5 A NCP380HMU05AGEVB Y Y
NCP380HMU10AATBG AJ 1.0 A NCP380HMU10AGEVB Y Y
NCP380HMU15AATBG AK 1.5 A NCP380HMU15AGEVB Y Y
NCP380HMU20AATBG AM 2.0 A NCP380HMU20AGEVB Y Y
NCP380HMU21AATBG AU 2.1 A NCP380HMU21AGEVB Y Y
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable
pm on: I nzrzazuc: , 7 , D U ‘0 C EEA E- C TOP VIEW _DE-YAILE if 3:: T\\ / "ME-4 SIDE VIEWA REE? ? DETAIL A m m m E 5 4 6X 7 1—4 F4 F $bqu® C \ \ \‘Eflj—E BOTTOM VIEW ““5@ C I \ ‘
NCP380, NCV380
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21
PACKAGE DIMENSIONS
UDFN6 2x2, 0.65P
CASE 517AB
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED
BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE
TERMINALS.
5. TIE BARS MAY BE VISIBLE IN THIS VIEW AND ARE CONNECTED
TO THE THERMAL PAD.
SEATING
PLANE
0.10 C
A3
A
A1
0.10 C
DIM
A
MIN MAX
MILLIMETERS
0.45 0.55
A1 0.00 0.05
A3 0.127 REF
b0.25 0.35
D2.00 BSC
D2 1.50 1.70
0.80 1.00
E2.00 BSC
E2
e0.65 BSC
L
--- 0.15
L1
PIN ONE
REFERENCE
0.08 C
0.10 C
6X
L
e
E2
b
3
66X
1
4
D2
BOTTOM VIEW
0.25 0.35
L1
DETAIL A
L
ALTERNATE TERMINAL
CONSTRUCTIONS
L
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
A1
A3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
2.30
0.65
0.47
6X
DIMENSIONS: MILLIMETERS
0.40
1.70
PITCH
0.95
6X
1
PACKAGE
OUTLINE
RECOMMENDED
TOP VIEW
SIDE VIEW
DETAIL B
NOTE 4
DETAIL A
END VIEW
A
M
0.10 BC
M
0.05 C
D
E
A B
NOTE 5
C
TOP VIEW i i@ c -‘[H 5 I SIDE VIEW F7 DEW” TRW‘MEDLEADNOTIOEXIENDMORETHANUZ DIM MIN \ MAX DE'IAILI c 090 1 ME 1 6 EMBED ) H um um T U .1 am 025 333% 5 “5“ 755 SOLDERING FDDTFRINT" f 1.9 0.074 0.95 0.037 \ w \ "TW'TW'TW7’ } } } ¢ ‘ ‘ i ,,L,, 7, ‘ W 7 0.039 \ \ T ‘ ‘ 4. 0.7 0.028 scum ($95) ‘Fm addmona‘ inmvmahun on out FbrFree snategy and soldenng detafls‘ p‘ease down‘oad the ON Semmonducmr Soldenng and Mounting Techniques Refierence Manua‘ SOLDERRM/D,
NCP380, NCV380
www.onsemi.com
22
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
DIM MIN MAX
MILLIMETERS
A3.00 BSC
B1.50 BSC
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
M0 10
S2.50 3.00
123
54 S
A
G
B
D
H
CJ
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
CSEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
TOP VIEW
SIDE VIEW
A
B
END VIEW
* EI—I 5m ‘H 7j $4L E1 /‘ $13gt% “fig ‘D‘DflS‘i A clzfl' (ED mu 15D we “J ¢ T r’ n 25 age RECO SOLDERI fik Tana memi 'For addmcma‘ Imormahon o detafls‘ p‘ease down‘oad 1 Mounting Techniques Race m J wwmm m sue gm palenwmg gm
NCP380, NCV380
www.onsemi.com
23
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
23
456
D
1
e
b
E1
A1
A
0.05
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
c
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
DIM
AMIN NOM MAX
MILLIMETERS
0.90 1.00 1.10
A1 0.01 0.06 0.10
b0.25 0.38 0.50
c0.10 0.18 0.26
D2.90 3.00 3.10
E2.50 2.75 3.00
e0.85 0.95 1.05
L0.20 0.40 0.60
0.25 BSC
L2 −
0°10°
1.30 1.50 1.70
E1
E
RECOMMENDED
NOTE 5
LC
M
H
L2
SEATING
PLANE
GAUGE
PLANE
DETAIL Z
DETAIL Z
0.60
6X
3.20 0.95
6X
0.95
PITCH
DIMENSIONS: MILLIMETERS
M
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
NCP380/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative
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