ADT7483A Datasheet by ON Semiconductor

0N Semlmnductor® ‘ «w “l E . E ALERT E n oumdc Ihc plogmmmcd 11mm. The THERM E W THEle E ALERT THERM E E E HHHHHH Up to 2 Ovcrlcmpcraturc Failrsafc Til-IERM H H H H H H H H

 Semiconductor Components Industries, LLC, 2012

July, 2012 − Rev. 2

1Publication Order Number:

ADT7483A/D

ADT7483A

Dual Channel Temperature

Sensor and Over

Temperature Alarm

The ADT7483A is a three-channel digital thermometer and

under/over temperature alarm, intended for use in PCs and thermal

management systems. It can measure the temperature in two remote

locations, for example, the remote thermal diode in a CPU or GPU, or

a discrete diode connected transistor. It can also measure its own

ambient temperature. The temperature of the remote thermal diode

and ambient temperature can be accurately measured to 1C. The

temperature measurement range defaults to 0C to 127C, compatible

with ADM1032, but can be switched to a wider measurement range,

from −64C to +191C.

The ADT7483A communicates over a 2-wire serial interface

compatible with system management bus (SMBus) standards. The

SMBus address is set by the ADD0 and ADD1 pins. As many as nine

different SMBus addresses are possible.

An ALERT output signals when the on-chip or remote temperature

is outside the programmed limits. The THERM output is a comparator

output that allows, for example, on/off control of a cooling fan. The

ALERT output can be reconfigured as a second THERM output, if

required.

Features

1 Local and 2 Remote Temperature Sensors

0.25C Resolution/1C Accuracy on Remote Channels

1C Resolution/1C Accuracy on Local Channel

Extended, Switchable Temperature Measurement Range

0C to 127C (Default) or –64C to +191C

2-wire SMBus Serial Interface with SMBus Alert Support

Programmable Over/Under Temperature Limits

Offset Registers for System Calibration

Up to 2 Overtemperature Fail-safe THERM Outputs

Small 16-lead QSOP Package

240 mA Operating Current, 5 mA Standby Current

This Device is Pb-Free, Halogen Free and is RoHS Compliant

Applications

Desktop and Notebook Computers

Industrial Controllers

Smart Batteries

Automotive

Embedded Systems

Burn-in Applications

Instrumentation

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 19 of this data sheet.

ORDERING INFORMATION

MARKING DIAGRAM

PIN ASSIGNMENT

ADT7483AARQZ = Specific Device Code

# = Pb-Free Package

YYWW = Date Code

ADT7483

AARQZ

#YYWW

QSOP−16

CASE 492

SDATA

ADD0

SCLK

ALERT/

THERM2

D2+

D2−

ADD1

VDD

D1+

D1−

THERM

GND

ADT7483A

(Top View)

NC = No Connect

Figure 1. Functional Block Diagram HEW/THEM Openrdr THEN hilp://onsemi.com 2

ADT7483A

http://onsemi.com

Figure 1. Functional Block Diagram

ON-CHIP

TEMPERATURE

SENSOR

ANALOG

MUX BUSY

11-BIT A-TO-D

CONVERTER

LOCAL TEMPERATURE

VALUE REGISTER

REMOTE 1 & 2 TEMP

OFFSET REGISTERS

RUN/STANDBY

EXTERNAL DIODE OPEN-CIRCUIT

STATUS REGISTERS

SMBUS INTERFACE

LIMIT COMPARATOR

DIGITAL MUX

INTERRUPT

MASKING

SDATA SCLK

1514

ONE-SHOT

CONVERSION RATE

LOCAL TEMPERATURE

THERM LIMIT REGISTER

LOCAL TEMPERATURE

LOW LIMIT REGISTER

LOCAL TEMPERATURE

HIGH LIMIT REGISTER

REMOTE 1 & 2 TEMP.

THERM LIMIT REG.

REMOTE 1 & 2 TEMP.

LOW LIMIT REGISTERS

REMOTE 1 & 2 TEMP.

HIGH LIMIT REGISTERS

CONFIGURATION

513

GND

VDD

ADT7483A

D1+

ALERT/THERM2THERM

D1−4

D2+ 12

D2−11

REMOTE 1 & 2 TEMP

VALUE REGISTERS

ADDRESS POINTER

ADD1

ADD0

Table 1. PIN ASSIGNMENT

Pin No. Mnemonic Description

1 ADD1 Address 1 Pin. Tri-state input to set the SMBus address.

2 VDDBPositive Supply, 3 V to 3.6 V.

3 D1+ Positive Connection. Connects to the first remote temperature sensor.

4 D1−Negative Connection. Connects to the first remote temperature sensor.

5 THERM Open-drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature

condition.

6 GND Supply Ground Connection.

7 NC No Connect.

8 NC No Connect.

9 NC No Connect.

10 NC No Connect.

11 D2−Negative Connection. Connects to the second remote temperature sensor.

12 D2+ Positive Connection. Connects to the second remote temperature sensor.

13 ALERT/THERM2 Open-drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second

THERM output. Requires a pull-up resistor.

14 SDATA Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor.

15 SCLK Logic Input, SMBus Serial Clock. Requires a pull-up resistor.

16 ADD0 Address 0 Pin. Tri-state input to set the SMBus address.

m m D S K L C s A, M D s m m m C m p m

ADT7483A

http://onsemi.com

Table 2. ABSOLUTE MAXIMUM RATINGS

Parameter Rating Unit

Positive Supply Voltage (VDD) to GND −0.3, +3.6 V

D+ −0.3 to VDD + 0.3 V

D− to GND −0.3 to +0.6 V

SCLK, SDATA, ALERT, THERM −0.3 to +3.6 V

Input Current, SDATA, THERM −1, +50 mA

Input Current, D−1 mA

ESD Rating, All Pins (Human Body Model) 1,500 V

Maximum Junction Temperature (TJ MAX) 150 C

Storage Temperature Range −65 to +150 C

IR Reflow Peak Temperature 220 C

IR Reflow Peak Temperature Pb-Free 260 C

Lead Temperature (Soldering 10 sec) 300 C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.

Table 3. THERMAL CHARACTERISTICS

Package Type qJA qJC Unit

16-lead QSOP 150 38.8 C/W

Table 4. SMBus TIMING SPECIFICATIONS (Note 1)

Parameter Limit at TMIN and TMAX Unit Description

fSCLK 400 kHz max

tLOW 4.7 ms min Clock Low Period, between 10% Points

tHIGH 4.0 ms min Clock High Period, between 90% Points

tR1.0 ms max Clock/Data Rise Time

tF300 ns max Clock/Data Fall Time

tSU; STA 4.7 ms min Start Condition Setup Time

tHD; STA

(Note 2)

4.0 ms min Start Condition Hold Time

tSU; DAT

(Note 3)

250 ns min Data Setup Time

tSU; STO

(Note 4)

4.0 ms min Stop Condition Setup Time

tBUF 4.7 ms min Bus Free Time between Stop and Start Conditions

1. Guaranteed by design, not production tested.

2. Time from 10% of SDATA to 90% of SCLK.

3. Time for 10% or 90% of SDATA to 10% of SCLK.

4. Time for 90% of SCLK to 10% of SDATA.

Figure 2. Serial Bus Timing

STOPSTART

tSU; DAT

tHIGH

tHD; DAT

tLOW

tSU; STO

STOP START

SCLK

SDATA

tBUF

tHD; STA

tSU; STA

Open-dram Dlgllal ompms (Tm. KEEN/THEM DH Vow : VDD ,4

ADT7483A

http://onsemi.com

Table 5. ELECTRICAL CHARACTERISTICS (TA=−40C to +125C, VDD = 3 V to 3.6 V, unless otherwise noted) (Note 1)

Parameter Test Conditions Min Typ Max Unit

Power Supply

Supply Voltage, VDD 3.0 3.3 3.6 V

Average Operating Supply Current, IDD 0.0625 Conversions/sec Rate (Note 1)

Standby Mode

−

240

350

Undervoltage Lockout Threshold VDD Input, Disables ADC, Rising Edge −2.55 −V

Power-On-Reset Threshold 1−2.5 V

Temperature-to-Digital Converter (Note 2)

Local Sensor Accuracy

Resolution

0C  TA  70C

0C  TA  85C

−40C  TA  +100C

−

1

1.5

2.5

−

C

Remote Diode Sensor Accuracy

Resolution

0C  TA  70C, −55C  TD  150C (Note 3)

0C  TA  85C, −55C  TD  150C (Note 3)

−40C  TA  +125C, −55C  TD  150C

(Note 3)

−

0.25

1

1.5

2.5

−

C

Remote Sensor Source Current (Note 3) High Level

Low Level

−

233

−

Conversion Time from Stop Bit to Conversion Complete

(All Channels), One-shot Mode with Averaging

Switched On

One-shot Mode with Averaging Off,

(Conversion Rate = 16, 32, or 64

Conversions/sec)

−

Open-drain Digital Outputs (THERM, ALERT/THERM2)

Output Low Voltage, VOL IOUT = −6.0 mA − − 0.4 V

High Level Output Current, IOH VOUT = VDD −0.1 1 mA

SMBus Interface (Notes 3 and 4)

Logic Input High Voltage, VIH, SCLK, SDATA 2.1 − − V

Logic Input Low Voltage, VIL, SCLK, SDATA − − 0.8 V

Hysteresis −500 −mV

SDA Output Low Voltage, VOL IOUT = −6.0 mA − − 0.4 V

Logic Input Current, IIH, IIL −1−+1 mA

SMBus Input Capacitance, SCLK, SDATA −5−pF

SMBus Clock Frequency − − 400 kHz

SMBus Timeout (Note 5) User Programmable −25 32 ms

SCLK Falling Edge to SDATA Valid Time Master Clocking in Data − − 1ms

1. See Table 11 for information on other conversion rates.

2. Averaging enabled.

3. Guaranteed by design, not production tested.

4. See SMBus Timing Specifications section for more information.

5. Disabled by default. See the Serial Bus Interface section for details to enable it.

ADT7483A

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 3. Local Temperature Error vs. Temperature Figure 4. Remote 1 Temperature Error

vs. Temperature

Figure 5. Remote 2 Temperature Error

vs. Temperature

Figure 6. Temperature Error vs. D+/D− Leakage

Resistance

Figure 7. Temperature Error vs. D+/D− Capacitance Figure 8. Operating Supply Current

vs. Conversion Rate

DEV 1

DEV 2

DEV 3

DEV 4

DEV 5

DEV 6

DEV 7

DEV 8

DEV 9

DEV 10

DEV 11

DEV 12

DEV 13

DEV 14

DEV 15

DEV 16

MEAN

HIGH 4S

LOW 4S

DEV 1

DEV 2

DEV 3

DEV 4

DEV 5

DEV 6

DEV 7

DEV 8

DEV 9

DEV 10

DEV 11

DEV 12

DEV 13

DEV 14

DEV 15

DEV 16

HIGH 4S

LOW 4S

DEV 1

DEV 2

DEV 3

DEV 4

DEV 5

DEV 6

DEV 7

DEV 8

DEV 9

DEV 10

DEV 11

DEV 12

DEV 13

DEV 14

DEV 15

DEV 16

MEAN

HIGH 4S

LOW 4S

TEMPERATURE (C)

−50

TEMPERATURE ERROR (C)

−1.0

0 50 100 150

−0.5

0.5

1.0

1.5

2.0

2.5

3.0

3.5

TEMPERATURE (C)

−50

TEMPERATURE ERROR (C)

−1.0

0 50 100 150

−0.5

0.5

1.0

1.5

2.0

2.5

3.0

3.5

TEMPERATURE (C)

−50

TEMPERATURE ERROR (C)

−1.0

0 50 100 150

−0.5

0.5

1.0

1.5

2.0

2.5

3.0

3.5

LEAKAGE RESISTANCE (MW)

TEMPERATURE ERROR (C)

−25

D+ To VDD

D+ To GND

10 100

−20

−15

−10

−5

CAPACITANCE (nF)

TEMPERATURE ERROR (C)

−18

5 10152025

−16

−14

−12

−10

−8

−6

−4

−2

DEV 2

DEV 4

DEV 3

CONVERTION RATE (Hz)

0.01

IDD (mA)

0.1 1 10 100

100

200

300

400

500

600

700

1000

900

800

DEV 4BC

DEV 3BC

DEV 2BC

ADT7483A

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)

Figure 9. Operating Supply Current vs. Voltage Figure 10. Standby Supply Current vs. Voltage

Figure 11. Standby Supply Current vs. SCLK

Frequency

Figure 12. Temperature Error vs. Common-Mode

Noise Frequency

Figure 13. Temperature Error vs. Differential Mode Noise Frequency

VDD (V)

3.0

408

IDD (mA)

3.1 3.2 3.3 3.4 3.5 3.6

410

412

414

416

418

420

422

DEV 4BC

DEV 3BC

DEV 2BC

VDD (V)

3.0

IDD (mA)

DEV 3

DEV 4

DEV 2

3.1 3.2 3.3 3.4 3.5 3.6

3.2

3.4

3.6

3.8

4.0

4.2

4.4

ISTBY (mA)

DEV 2BC

DEV 3BC

DEV 4BC

10 100 1000

FSCL (kHz) NOISE FREQUENCY (MHz)

TEMPERATURE ERROR (C)

100 200 300 400 500 600

50 mV

20 mV

100 mV

NOISE FREQUENCY (MHz)

TEMPERATURE ERROR (C)

−10 100 200 300 400 500 600

50 mV

20 mV

100 mV

wilh (he compondmg high, low. and TH m m Icmpcnnum limils causes the m m m Masking or Enabling mo ALERT 13 between AiLERT and Til-[ERMZ TRANS‘STOR | | | | | | 7 REMOTE L‘( i I E SENS‘NG T | | | | 32$ f I LVJ

ADT7483A

http://onsemi.com

Theory of Operation

The ADT7483A is a local and 2 remote temperature

sensor and over/under temperature alarm. When the

ADT7483A is operating normally, the on-board ADC

operates in a freerunning mode. The analog input

multiplexer alternately selects either the on-chip

temperature sensor or one of the remote temperature sensors

to measure its local temperature. The ADC digitizes these

signals, and the results are stored in the local, Remote 1, and

Remote 2 temperature value registers.

The local and remote measurement results are compared

with the corresponding high, low, and THERM temperature

limits stored in on-chip registers. Out-of-limit comparisons

generate flags that are stored in the status register. A result

that exceeds the high temperature limit, the low temperature

limit, or a remote diode open circuit causes the ALERT

output to assert low. Likewise, exceeding THERM

temperature limits causes the THERM output to assert low.

The ALERT output can be reprogrammed as a second

THERM output.

The limit registers can be programmed, and the device

controlled and configured, via the serial SMBus. The

contents of any register can also be read back via the SMBus.

Control and configuration functions consist of:

Switching the Device between Normal Operation and

Standby Mode

Selecting the Temperature Measurement Scale

Masking or Enabling the ALERT Output

Switching Pin 13 between ALERT and THERM2

Selecting the Conversion Rate

Temperature Measurement Method

A simple method of measuring temperature is to exploit

the negative temperature coefficient of a diode, measuring

the baseemitter voltage (VBE) of a transistor, operated at

constant current. Unfortunately, this technique requires

calibration to null the effect of the absolute value of VBE,

which varies from device to device. The technique used in

the ADT7483A is to measure the change in VBE when the

device is operated at two different currents.

Figure 14 shows the input signal conditioning used to

measure the output of a remote temperature sensor. This

figure shows the remote sensor as a substrate transistor, but

it could equally be a discrete transistor. If a discrete

transistor is used, the collector is not grounded and should

be linked to the base. To prevent ground noise interfering

with the measurement, the more negative terminal of the

sensor is not referenced to ground but is biased above ground

by an internal diode at the D− input. C1 can be optionally

added as a noise filter (recommended maximum value

1,000 pF).

To measure DVBE, the operating current through the sensor

is switched among two related currents, I and N I. The

currents through the temperature diode are switched

between I and N I, giving DVBE. The temperature is then

calculated using the DVBE measurement.

The resulting DVBE waveforms pass through a 65 kHz

low-pass filter to remove noise and then to a

chopper-stabilized amplifier. This amplifies and rectifies the

waveform to produce a dc voltage proportional to DVBE.

The ADC digitizes this voltage and produces a temperature

measurement. To reduce the effects of noise, digital filtering

is performed by averaging the results of 16 measurement

cycles for low conversion rates. At rates of 16, 32, and

64 conversions/second, no digital averaging takes place.

Signal conditioning and measurement of the local

temperature sensor is performed in the same manner.

Figure 14. Input Signal Conditioning

LOW-PASS FILTER

fC = 65 kHz

REMOTE

SENSING

TRANSISTOR

BIAS

DIODE

D+

D−

VDD

IBIAS

IN  I

VOUT+

VOUT−

To ADC

C1*

*CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS. C1 = 1,000 pF MAX

Temperature Measurement Results

The results of the local and remote temperature

measurements are stored in the local and remote temperature

value registers and are compared with limits programmed

into the local and remote high and low limit registers.

The local temperature measurement is an 8-bit

measurement with 1C resolution. The remote temperature

measurements are 10-bit measurements, with eight MSBs

stored in one register and two LSBs stored in another

ADT7483A

http://onsemi.com

Table 6. REGISTER ADDRESS FOR

THE TEMPERATURE VALUES

Temperature

Channel

MSBs

LSBs

Local 0x00 N/A

Remote 1 0x01 0x10 (2 MSBs)

Remote 2 0x30 0x33 (2 MSBs)

By setting Bit 3 of the Configuration 1 Register to 1, the

Remote 2 temperature values can be read from the following

Remote 2, MSBs = 0x01

Remote 2, LSBs = 0x10

The above is true only when Bit 3 of the Configuration 1

needs to be switched back to 0.

Only the two MSBs in the remote temperature low byte

are used. This gives the remote temperature measurement a

resolution of 0.25C. Table 7 shows the data format for the

remote temperature low byte.

Table 7. EXTENDED TEMPERATURE RESOLUTION

(REMOTE TEMPERATURE LOW BYTE)

Extended Resolution

Remote Temperature

Low Byte

0.00C0 000 0000

0.25C0 100 0000

0.50C1 000 0000

0.75C1 100 0000

When reading the full remote temperature value, both the

high and low byte, the two registers should be read LSB first

and then the MSB. This is because reading the LSB will

cause the MSB to be locked until it is read, guaranteeing that

the two values read are a result of the same temperature

measurement.

Temperature Measurement Range

The temperature measurement range for both local and

remote measurements is, by default, 0C to 127C.

However, the ADT7483A can be operated using an

extended temperature range from −64C to +191C. This

means, the ADT7483A can measure the full temperature

range of a remote thermal diode, from −55C to +150C. The

user can switch between these two temperature ranges by

setting or clearing Bit 2 in the Configuration 1 register. A

valid result is available in the next measurement cycle after

changing the temperature range.

In extended temperature mode, the upper and lower

temperatures that can be measured by the ADT7483A are

limited by the remote diode selection. The temperature

registers themselves can have values from −64C to +191C.

However, most temperature sensing diodes have a

maximum temperature range of −55C to +150C.

Note that although both local and remote temperature

measurements can be made while the part is in extended

temperature mode, the ADT7483A should not be exposed to

temperatures greater than those specified in theAbsolute

Maximum Ratings section. Further, the device is only

guaranteed to operate as specified at ambient temperatures

from −40C to +120C.

Temperature Data Format

The ADT7483A has two temperature data formats. When

the temperature measurement range is from 0C to 127C

(default), the temperature data format for both local and

remote temperature results is binary. When the

measurement range is in extended mode, an offset binary

data format is used for both local and remote results.

Temperature values in the offset binary data format are

offset by +64. Examples of temperatures in both data

formats are shown in Table 8.

Table 8. TEMPERATURE DATA FORMAT

(LOCAL AND REMOTE TEMPERATURE HIGH BYTE)

Temperature Binary

Offset Binary

(Note 1)

−55C0 000 0000

(Note 2)

0 000 1001

0C0 000 0000 0 100 0000

+1C0 000 0001 0 100 0001

+10C0 000 1010 0 100 1010

+25C0 001 1001 0 101 1001

+50C0 011 0010 0 111 0010

+75C0 100 1011 1 000 1011

+100C0 110 0100 1 010 0100

+125C0 111 1101 1 011 1101

+127C0 111 1111 1 011 1111

+150C0 111 1111

(Note 3)

1 101 0110

1. Offset binary scale temperature values are offset by +64.

2. Binary scale temperature measurement returns 0 for all

temperatures < 0C.

3. Binary scale temperature measurement returns 127 for all

temperatures > 127C.

The user may switch between measurement ranges at any

time. Switching the range also switches the data format. The

next temperature result following the switching is reported

back to the register in the new format. However, the contents

of the limit registers do not change. It is up to the user to

ensure that when the data format changes, the limit registers

are reprogrammed as necessary (for more information, see

the Limit Registers section).

Seltmg thws ml ‘01 masks a“ I ER 5 on me FLEH K ER 13 .s conﬁgured as m Semng (ms M m p‘aces me AD17453A m slandby mede‘ mm Is, suspends an temperature measure 1ADC). The SMBus vemams acme and va‘ues can be wrmen m‘ and read from me regxsters. THEFTM HEW are also as Tm arm This m 59 Tm Semng (ms m m masks KEERT Semng (ms m m masks MEET

ADT7483A

http://onsemi.com

Registers

The registers in the ADT7483A are eight bits wide. These

registers are used to store the results of remote and local

temperature measurements, and high and low temperature

limits, and to configure and control the device. A description

of these registers is provided in this section.

Address Pointer Register

The address pointer register does not have, nor does it

require, an address because the first byte of every write

operation is automatically written to this register. The data

in this first byte always contains the address of another

pointer register. It is to this other register address that the

second byte of a write operation is written, or to which a

subsequent read operation is performed.

The power-on default value of the address pointer register

is 0x00, so if a read operation is performed immediately after

power-on without first writing to the address pointer, the

value of the local temperature will be returned, since its

Temperature Value Registers

The ADT7483A has five registers to store the results of

local and remote temperature measurements. These

registers can only be written to by the ADC and can be read

by the user over the SMBus.

The local temperature value register is at Address 0x00

The Remote 1 temperature value high byte register is at

Address 0x01, with the Remote 1 low byte register at

Address 0x10

The Remote 2 temperature value high byte register is at

Address 0x30, with the Remote 2 low byte register at

Address 0x33

The Remote 2 temperature values can be read from

Address 0x01 for the high byte and Address 0x10 for

the low byte if Bit 3 of Configuration Register 1 is set

to 1

To read the Remote 1 temperature values, Bit 3 of

Configuration Register 1 should be set to 0

The power-on default for all five registers is 0x00

Table 9. CONFIGURATION 1 REGISTER (READ ADDRESS = 0x03, WRITE ADDRESS = 0x09)

Bit Mnemonic Function

7Mask Setting this bit to 1 masks all ALERTs on the ALERT pin. Default = 0 = ALERT enabled. This applies only if

Pin 13 is configured as ALERT, otherwise it has no effect.

6Mon/STBY Setting this bit to 1 places the ADT7483A in standby mode, that is, suspends all temperature measurements

(ADC). The SMBus remains active and values can be written to, and read from, the registers. THERM and

ALERT are also active in standby mode. Changes made to the limit registers in standby mode that affect the

THERM or ALERT outputs will cause these signals to be updated. Default = 0 = temperature monitoring

enabled.

5AL/TH This bit selects the function of Pin 13. Default = 0 = ALERT. Setting this bit to 1 configures Pin 13 as the

THERM2 pin.

4Reserved Reserved for future use.

3Remote 1/

Remote 2

Setting this bit to 1 enables the user to read the Remote 2 values from the Remote 1 registers.

Default = 0 = Remote 1 temperature values and limits are read from these registers. This bit is not lockable.

2Temp

Range

Setting this bit to 1 enables the extended temperature measurement range (−50C to +150C).

Default = 0 = 0C to +127C.

1Mask R1 Setting this bit to 1 masks ALERTs due to the Remote 1 temperature exceeding a programmed limit. Default = 0.

0Mask R2 Setting this bit to 1 masks ALERTs due to the Remote 2 temperature exceeding a programmed limit. Default = 0.

Table 10. CONFIGURATION 2 REGISTER (ADDRESS = 0x24)

Bit Mnemonic Function

7Lock Bit Setting this bit to 1 locks all lockable registers to their current values. This prevents settings being tampered

with until the device is powered down. Default = 0.

<6:0> Res Reserved for future use.

THERM THERM THERM g either Ihc local or rcmmc THERM THERM THERMZ THERMZ

ADT7483A

http://onsemi.com

Conversion Rate/Channel Selector Register

The conversion rate/channel selector register is at

Address 0x04 for reads, and Address 0x0A for writes. The

four LSBs of this register are used to program the conversion

times from 15.5 ms (Code 0x0A) to 16 seconds

(Code 0x00). To program the ADT7483A to perform

continuous measurements, set the conversion rate register to

0x0B. For example, a conversion rate of 8 conversions/

second means that beginning at 125 ms intervals, the device

performs a conversion on the local and the remote

temperature channels.

This register can be written to and read back over the

SMBus. The default value of this register is 0x07, giving a

rate of 8 conversions/second.

Bit 7 in this register can be used to disable averaging of the

temperature measurements. The ADT7483A can be

configured to take temperature measurements of either a

single temperature channel or all temperature channels.

Bit 5 and Bit 4 can be used to specify which temperature

channel or channels are measured.

Table 11. CONVERSION RATE/CHANNEL SELECTOR REGISTER

Bit Mnemonic Function

7 Averaging Setting this bit to 1 disables averaging of the temperature measurements at the slower conversion

rates (averaging cannot take place at the three faster rates, so setting this bit has no effect). When

default = 0, averaging is enabled.

6 Reserved Reserved for future use. Do not write to this bit.

<5:4> Channel Selector These bits are used to select the temperature measurement channels:

00 = Round Robin = Default = All Channels

01 = Local Temperature

10 = Remote 1 Temperature

11 = Remote 2 Temperature

<3:0> Conversion Rates These bits set how often the ADT7483A measures each temperature channel.

Conversions/second Time

0000 = 0.0625 16 s

0001 = 0.125 8 s

0010 = 0.25 4 s

0011 = 0.5 2 s

0100 = 1 1 s

0101 = 2 500 ms

0110 = 4 250 ms

0111 = 8 = Default 125 ms

1000 = 16 62.5 ms

1001 = 32 31.25 ms

1010 = Continuous Measurements

Limit Registers

The ADT7483A has three limits for each temperature

channel: high, low, and THERM temperature limits for

local, Remote 1, and Remote 2 temperature measurements.

The remote temperature high and low limits span two

registers each to contain an upper and lower byte for each

limit. There is also a THERM hysteresis register. All limit

registers can be written to and read back over the SMBus.

See Table 16 for details of the limit registers’ addresses and

their power-on default values.

When Pin 13 is configured as an ALERT output, the high

limit registers perform a > comparison while the low limit

registers perform a  comparison. For example, if the high

limit register is programmed with 80C, then measuring

81C will result in an out-of-limit condition, setting a flag in

the status register. If the low limit register is programmed

with 0C, measuring 0C or lower will result in an

out-of-limit condition.

Exceeding either the local or remote THERM limit asserts

THERM low. When Pin 13 is configured as THERM2,

exceeding either the local limit or remote high limit asserts

THERM2 low. A default hysteresis value of 10C is

provided that applies to both THERM channels. This

hysteresis value may be reprogrammed to any value after

power-up using Register Address 0x21.

It is important to remember that the data format for

temperature limits is the same as the temperature

measurement data format. Thus, if the temperature

measurement uses the default (binary), then the temperature

limits also use the binary scale. If the temperature

measurement scale is switched, however, the temperature

limits do not automatically switch. The user must reprogram

the limit registers to the desired value in the correct data

format. For example, if the remote low limit is set at 10C

and the default binary scale is being used, the limit register

value should be 0000 1010b. If the scale is switched to offset

binary, the value in the low temperature limit register should

be reprogrammed to be 0100 1010b.

Status Registers

The status registers are read-only registers, at

Address 0x02 (Status Register 1) and Address 0x23 (Status

ADT7483A.

1 when Remote1 THEN 1 when Loca‘ TFI'EFWI 2THEFWI 1? ER 1 when HERT AL RT ALERT [web is set and [lie ALERT ALERT ALERT 2 an: sci, Ihc THERM Cd limits. The THERM . Ilnlikc Ihc ALERT THERM c THERM falls below The THERM THERMZ THERMZ THERMZ THERMZ is mhcrwisc ihc Mime a5 THERM ALERT ALERT ALERT

ADT7483A

http://onsemi.com

Table 12. STATUS REGISTER 1 BIT ASSIGNMENTS

Bit Mnemonic Function ALERT

7 BUSY 1 when ADC Converting No

6LHIGH

(Note 1)

1 when Local High

Temperature Limit Tripped

Yes

5LLOW

(Note 1)

1 when Local Low

Temperature Limit Tripped

Yes

4 R1HIGH

(Note 1)

1 when Remote 1 High

Temperature Limit Tripped

Yes

3R1LOW

(Note 1)

1 when Remote 1 Low

Temperature Limit Tripped

Yes

2D1 OPEN

(Note 1)

1 when Remote 1 Sensor

Open Circuit

Yes

1 R1THRM1 1 when Remote1 THERM

Limit Tripped

0 LTHRM1 1 when Local THERM Limit

Tripped

1. These flags stay high until the status register is read, or they are

reset by POR.

Table 13. STATUS REGISTER 2 BIT ASSIGNMENTS

Bit Mnemonic Function ALERT

7 Res Reserved for Future Use No

6 Res Reserved for Future Use No

5 Res Reserved for Future Use No

4R2HIGH

(Note 1)

1 when Remote 2 High

Temperature Limit Tripped

Yes

3R2LOW

(Note 1)

1 when Remote 2 Low

Temperature Limit Tripped

Yes

2D2 OPEN

(Note 1)

1 when Remote 2 Sensor

Open Circuit

Yes

1 R2THRM1 1 when Remote 2 THERM

Limit Tripped

0 ALERT 1 when ALERT Condition

Exists

1. These flags stay high until the status register is read, or they are

reset by POR.

The eight flags that can generate an ALERT are NOR’d

together, so if any of them are high, the ALERT interrupt

latch is set and the ALERT output goes low (provided they

are not masked out).

Reading the Status 1 register will clear the five flags, Bit 6

to Bit 2 in Status Register 1, provided the error conditions

that caused the flags to be set have gone away. Reading the

Status 2 register will clear the three flags, Bit 4 to Bit 2 in

Status Register 2, provided the error conditions that caused

the flags to be set have gone away. A flag bit can only be reset

if the corresponding value register contains an in-limit

measurement or if the sensor is good.

The ALERT interrupt latch is not reset by reading the

status register. It is reset when the ALERT output has been

serviced by the master reading the device address, provided

the error condition has gone away and the status register flag

bits have been reset.

When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1

of Status Register 2 are set, the THERM output goes low to

indicate that the temperature measurements are outside the

programmed limits. The THERM output does not need to be

reset, unlike the ALERT output. Once the measurements are

within the limits, the corresponding status register bits are

automatically reset and the THERM output goes high. The

user may add hysteresis by programming Register 0x21.

The THERM output will be reset only when the temperature

falls below the THERM limit minus hysteresis.

When Pin 13 is configured as THERM2, only the high

temperature limits are relevant. If Flag 6, Flag 4 of Status

THERM2 output goes low to indicate that the temperature

measurements are outside the programmed limits. Flag 5

and Flag 3 of Status Register 1, and Flag 3 of Status

THERM2 is otherwise the same as THERM.

Bit 0 of Status Register 2 is set whenever the ALERT

output of the ADT7483A is asserted low. This means that the

user need only read Status Register 2 to determine if the

ADT7483A is responsible for the ALERT. Bit 0 of Status

ALERT output is masked, then this bit is not set.

Offset Register

Offset errors may be introduced into the remote

temperature measurement by clock noise or by the thermal

diode being located away from the hot spot. To achieve the

specified accuracy on this channel, these offsets must be

removed.

The offset values are stored as 10-bit, twos complement

values:

The Remote 1 offset MSBs are stored in Register 0x11,

and the LSBs are stored 0x12 (low byte, left justified).

The Remote 2 offset MSBs are stored in Register 0x34,

and the LSBs are stored 0x35 (low byte, left justified).

The Remote 2 offset can be written to, or read from, the

Remote 1 offset registers if Bit 3 of the Configuration 1

to read the Remote 1 offset values.

Only the upper 2 bits of the LSB registers are used. The

MSB of the MSB offset registers is the sign bit. The

minimum offset that can be programmed is −128C, and the

maximum is +127.75C.

The value in the offset register is added or subtracted to the

measured value of the remote temperature.

The offset register powers up with a default value of 0C

and will have no effect unless the user writes a different

value to it.

Consecutive NEEHT entrofrlimit monsummcms must occur bcfom an ALERT ALERT CONSECUTIVE KEERT a : Mask Internal FLEET

ADT7483A

http://onsemi.com

Table 14. SAMPLE OFFSET REGISTER CODES

Offset Value 0x11/0x34 0x12/0x35

−128C1000 0000 00 00 0000

−4C1111 1100 00 00 0000

−1C1111 1111 00 000000

−0.25C1111 1111 10 00 0000

0C0000 0000 00 00 0000

+0.25C0000 0000 01 00 0000

+1C0000 0001 00 00 0000

+4C0000 0100 00 00 0000

+127.75C0111 1111 11 00 0000

One-shot Register

The one-shot register is used to initiate a conversion and

comparison cycle when the ADT7483A is in standby mode,

after which the device returns to standby. Writing to the

one-shot register address (0x0F) causes the ADT7483A to

perform a conversion and comparison on both the local and

the remote temperature channels. This is not a data register

as such, and it is the write operation to Address 0x0F that

causes the one-shot conversion. The data written to this

address is irrelevant and is not stored.

Consecutive ALERT Register

The value written to this register determines how many

out-of-limit measurements must occur before an ALERT is

generated. The default value is that one out-of-limit

measurement generates an ALERT. The maximum value

that can be chosen is 4. The purpose of this register is to

allow the user to perform some filtering of the output. This

is particularly useful at the fastest three conversion rates,

where no averaging takes place. This register is at

Address 0x22.

Table 15. CONSECUTIVE ALERT REGISTER BIT

Amount of Out-of-Limit

Measurements Required

yzax 000x 1

yzax 001x 2

yzax 011x 3

yzax 111x 4

NOTES: y = SMBus SCL timeout bit. Default = 0. See the Serial

Bus Interface section for more information.

z = SMBus SDA timeout bit. Default = 0. See the Serial

Bus Interface section for more information.

a = Mask Internal ALERTs.

x = Don’t care bit.

Table 16. LIST OF REGISTERS

Read

Address

(Hex)

Write

Address

(Hex) Mnemonic Power-On Default Comment Lock

N/A N/A Address Pointer Undefined No

00 N/A Local Temperature Value 0000 0000 (0x00) No

01 N/A Remote 1 Temperature Value High Byte 0000 0000 (0x00) Bit 3 Conf. Reg. = 0 No

01 N/A Remote 2 Temperature Value High Byte 0000 0000 (0x00) Bit 3 Conf. Reg. = 1 No

02 N/A Status Register 1 Undefined No

03 09 Configuration Register 1 0000 0000 (0x00) Yes

04 0A Conversion Rate 0000 0111 (0x07) Yes

05 0B Local Temperature High Limit 0101 0101 (0x55) (85C) Yes

06 0C Local Temperature Low Limit 0000 0000 (0x00) (0C) Yes

07 0D Remote 1 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 0 Yes

07 0D Remote 2 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 1 Yes

08 0E Remote 1 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Bit 3 Conf. Reg. = 0 Yes

08 0E Remote 2 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Bit 3 Conf. Reg. = 1 Yes

N/A 0F

(Note 1)

One Shot N/A

10 N/A Remote 1 Temperature Value Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 No

10 N/A Remote 2 Temperature Value Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 No

11 11 Remote 1 Temperature Offset High Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes

11 11 Remote 2 Temperature Offset High Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes

12 12 Remote 1 Temperature Offset Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes

12 12 Remote 2 Temperature Offset Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes

13 13 Remote 1 Temperature High Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes

13 13 Remote 2 Temperature High Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes

14 14 Remote 1 Temperature Low Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 0 Yes

1 THEN 2 THEN Loca‘ TFI'EH'M TH'EFWI Consecuhve FEEHT 7 (SCL [inlcolll bil) of the cunsccmivc ALERT 6 (SDA ﬁmcnm bil) of [hc consccuﬁvc ALERT (www.mnhusnrl

ADT7483A

http://onsemi.com

Table 16. LIST OF REGISTERS (continued)

Read

Address

(Hex) LockCommentPower-On DefaultMnemonic

Write

Address

(Hex)

14 14 Remote 2 Temperature Low Limit Low Byte 0000 0000 Bit 3 Conf. Reg. = 1 Yes

19 19 Remote 1 THERM Limit 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 0 Yes

19 19 Remote 2 THERM Limit 0101 0101 (0x55) (85C) Bit 3 Conf. Reg. = 1 Yes

20 20 Local THERM Limit 0101 0101 (0x55) (85C) Yes

21 21 THERM Hysteresis 0000 1010 (0x0A) (10C) Yes

22 22 Consecutive ALERT 0000 0001 (0x01) Yes

23 N/A Status Register 2 0000 0000 (0x00) No

24 24 Configuration 2 Register 0000 0000 (0x00) Yes

30 N/A Remote 2 Temperature Value High Byte 0000 0000 (0x00) No

31 31 Remote 2 Temperature High Limit High Byte 0101 0101 (0x55) (85C) Yes

32 32 Remote 2 Temperature Low Limit High Byte 0000 0000 (0x00) (0C) Yes

33 N/A Remote 2 Temperature Value Low Byte 0000 0000 (0x00) No

34 34 Remote 2 Temperature Offset High Byte 0000 0000 (0x00) Yes

35 35 Remote 2 Temperature Offset Low Byte 0000 0000 (0x00) Yes

36 36 Remote 2 Temperature High Limit Low Byte 0000 0000 (0x00) (0C) Yes

37 37 Remote 2 Temperature Low Limit Low Byte 0000 0000 (0x00) (0C) Yes

39 39 Remote 2 THERM Limit 0101 0101 (0x55) (85C) Yes

FE N/A Manufacturer ID 0100 0001 (0x41) N/A

FF N/A Die Revision Code 1001 0100 (0x94) N/A

1. Writing to address 0F causes the ADT7482 to perform a single measurement. It is not a data register as such and it does not matter what

data is written to it.

Serial Bus Interface

Control of the ADT7483A is carried out via the serial bus.

The ADT7483A is connected to the serial bus as a slave

device, under the control of a master device.

The ADT7483A has an SMBus timeout feature. When

this is enabled, the SMBus typically times out after 25 ms of

no activity. However, this feature is not enabled by default.

Bit 7 (SCL timeout bit) of the consecutive ALERT register

(Address = 0x22) should be set to enable the SCL timeout.

Bit 6 (SDA timeout bit) of the consecutive ALERT register

(Address = 0x22) should be set to enable the SDA timeout.

The ADT7483A supports packet error checking (PEC)

and its use is optional. It is triggered by supplying the extra

clock for the PEC byte. The PEC byte is calculated using

CRC−8. The frame check sequence (FCS) conforms to

CRC−8 by the polynomial:

C(x) +x8)x2)x1)1(eq. 1)

Consult the SMBus 1.1 specification for more

information (www.smbus.org).

Addressing the Device

In general, every SMBus device has a 7-bit device address

(except for some devices that have extended, 10-bit

addresses). When the master device sends a device address

over the bus, the slave device with that address will respond.

The ADT7483A has two address pins, ADD0 and ADD1, to

allow selection of the device address, so that several

ADT7483As can be used on the same bus, and/or to avoid

conflict with other devices.

Although only two address pins are provided, these are

threestate, and can be grounded, left unconnected, or tied to

VDD, so that a total of nine different addresses are possible,

as shown in Table 17. It should be noted that the state of the

address pins is only sampled at power-up, so changing them

after power-up has no effect.

Table 17. SAMPLE OFFSET REGISTER CODES

ADD1 ADD0 Device Address

0 0 0011 000

0 NC 0011 001

0 1 0011 010

NC 0 0101 001

NC NC 0101 010

NC 1 0101 011

1 0 1001 100

1 NC 1001 101

1 1 1001 110

/W il. lf Ihc R/W slave device. If IhC R/W The device address ' scm over (he bus followed by R/W ACK BY sigl

ADT7483A

http://onsemi.com

The serial bus protocol operates as follows:

1. The master initiates data transfer by establishing a

start condition, defined as a high-to-low transition

on the serial data line (SDATA), while the serial

clock line (SCLK) remains high. This indicates

that an address/data stream follows. All slave

peripherals connected to the serial bus respond to

the start condition and shift in the next eight bits,

consisting of a 7-bit address (MSB first) plus an

R/W bit, which determines the direction of the

data transfer, that is, whether data will be written

to, or read from, the slave device. The peripheral

whose address corresponds to the transmitted

address responds by pulling the data line low

during the low period before the ninth clock pulse,

known as the acknowledge bit. All other devices

on the bus now remain idle while the selected

device waits for data to be read from or written to

it. If the R/W bit is a 0, the master writes to the

slave device. If the R/W bit is a 1, the master reads

from the slave device.

2. Data is sent over the serial bus in a sequence of

nine clock pulses, eight bits of data followed by an

acknowledge bit from the slave device. Transitions

on the data line must occur during the low period

of the clock signal and remain stable during the

high period, since a low-to-high transition when

the clock is high may be interpreted as a stop

signal. The number of data bytes that can be

transmitted over the serial bus in a single read or

write operation is limited only by what the master

and slave devices can handle.

3. When all data bytes have been read or written,

stop conditions are established. In write mode, the

master will pull the data line high during the tenth

clock pulse to assert a stop condition. In read

mode, the master device will override the

acknowledge bit by pulling the data line high

during the low period before the ninth clock pulse.

This is known as no acknowledge. The master will

then take the data line low during the low period

before the tenth clock pulse, then high during the

tenth clock pulse to assert a stop condition.

Any number of bytes of data may be transferred over the

serial bus in one operation, but it is not possible to mix read

and write in one operation because the type of operation is

determined at the beginning and cannot subsequently be

changed without starting a new operation. For the

ADT7483A, write operations contain either one or two

bytes, while read operations contain one byte.

To write data to one of the device data registers, or to read

data from it, the address pointer register must be set so that

the correct data register is addressed. The first byte of a write

operation always contains a valid address that is stored in the

address pointer register. If data is to be written to the device,

the write operation contains a second data byte that is written

to the register selected by the address pointer register (see

Figure 15).

The device address is sent over the bus followed by R/W

set to 0. This is followed by two data bytes. The first data

byte is the address of the internal data register to be written

to, which is stored in the address pointer register. The second

data byte is the data to be written to the internal data register.

Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register

SCLK

SDATA 00 1101D7 D6 D5 D4 D3 D2 D1 D0

ACK. BY

ADT7483A

START BY

MASTER

ACK. BY

ADT7483A

D7 D6 D5 D4 D3 D2 D1 D0

ACK. BY

ADT7483A STOP BY

MASTER

SCLK (CONTINUED)

SDATA (CONTINUED)

FRAME 1

SERIAL BUS ADDRESS BYTE FRAME 2

ADDRESS POINTER REGISTER BYTE

FRAME 3

DATA BYTE

R/W

1H . . ‘rﬁ‘ roll m l 1/ START BV S H ACK. BV ab ACK, EV S A at m . . ‘Fﬂ‘ war I W ‘ 7 STAR AS F7 the serial bus address, R/W 2. If the address pointer register is known to be already at the desired addret data can be read from the corresponding data register without first writing to the address pointer regi er and the bus tran .letion shown in Figure 16 can be omitted. No‘rEs.lt rs possrble to read a data byte tram a data regrster wllhoul trrst writing to the address pointer register. However. it the address pointer register is already at the correct value, it is not posstble to write data to a register wllhout writlng lo the address palrller reglster because the ﬁrst data byte at a wrlle rs always wrrtterr to the address pointer reglslel. Remember that some of the ADT74saA registers have drllerent addresses ldr read and wrlle opelallons. The write address at a regrster must be wnlten to the address pointer rt data is to be wrltlen to that regrster, but it may not be possible to read data tram that address. The read address of a register must be written to the address pdrnter belore data can be read tram that reglslel. KEERTOulpul This is applicable when Pin 13 is configured as alum output. The W output goes low whenever an oulrofrlimit me' urement is detected, or it the remote lenlpcraturet tur sopeneircuit It n upcnrdmin output and requires a pullrup tn vDD. Several m outputs can ACK. BV 4+7 ACK BY S 44 if one or more of the ALERT e ALERT proc ‘ )r, or it can be used as an SMBALERT they want to talk, but the SMBALERT ALERT S MBALERT c S‘MBALERT masrzn RECEIVES sum [Em Figure 13. Use of SMBIEERT SMBALERT The device whose ALERT If more than one device’s ALERT response address, it will reset its ALERT ALERT no longer exit If the SMEALERT hﬂp://onsemi.com l5

ADT7483A

http://onsemi.com

Figure 16. Writing to the Address Pointer Register Only

SCLK

SDATA 00

1101D7 D6 D5 D4 D3 D2 D1 D0

ACK. BY

ADT7483A

STOP BY

MASTER

START BY

MASTER FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

ADDRESS POINTER REGISTER BYTE

119

ACK. BY

ADT7483A

R/W

Figure 17. Reading Data from a Previously Selected Register

SCLK

SDATA 001101D7 D6 D5 D4 D3 D2 D1 D0

ACK. BY

MASTER STOP BY

MASTER

START BY

MASTER FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

DATA BYTE FROM ADT7483A

119

ACK. BY

ADT7483A

R/W

When reading data from a register there are two

possibilities:

1. If the address pointer register value of the

ADT7483A is unknown or not the desired value, it

is first necessary to set it to the correct value

before data can be read from the desired data

ADT7483A as before, but only the data byte

containing the register read address is sent, as data

is not to be written to the register (see Figure 16).

A read operation is then performed consisting of

the serial bus address, R/W bit set to 1, followed

by the data byte read from the data register (see

Figure 17).

2. If the address pointer register is known to be

already at the desired address, data can be read

from the corresponding data register without first

writing to the address pointer register and the bus

transaction shown in Figure 16 can be omitted.

NOTES:It is possible to read a data byte from a data register without

first writing to the address pointer register. However, if the

address pointer register is already at the correct value, it is

not possible to write data to a register without writing to the

address pointer register because the first data byte of a write

is always written to the address pointer register.

Remember that some of the ADT7483A registers have

different addresses for read and write operations. The write

address of a register must be written to the address pointer

if data is to be written to that register, but it may not be

possible to read data from that address. The read address

of a register must be written to the address pointer before

data can be read from that register.

ALERT Output

This is applicable when Pin 13 is configured as an ALERT

output. The ALERT output goes low whenever an

out-of-limit measurement is detected, or if the remote

temperature sensor is open circuit. It is an open-drain output

and requires a pull-up to VDD. Several ALERT outputs can

be wire-OR’ed together, so that the common line will go low

if one or more of the ALERT outputs goes low.

The ALERT output can be used as an interrupt signal to a

processor, or it can be used as an SMBALERT. Slave devices

on the SMBus cannot normally signal to the bus master that

they want to talk, but the SMBALERT function allows them

to do so.

One or more ALERT outputs can be connected to a

common SMBALERT line connected to the master. When

the SMBALERT line is pulled low by one of the devices, the

following procedure occurs, as shown in Figure 18.

Figure 18. Use of SMBALERT

ALERT RESPONSE

ADDRESS

MASTER SENDS

ARA AND READ

COMMAND DEVICE SENDS

ITS ADDRESS

RDSTART ACK DEVICE

ADDRESS

ACK STOP

MASTER

RECEIVES

SMBALERT

1. SMBALERT is pulled low.

2. Master initiates a read operation and sends the

alert response address (ARA = 0001 100). This is

a general call address that must not be used as a

specific device address.

3. The device whose ALERT output is low responds

to the alert response address, and the master reads

its device address. The device address is seven

bits, so an LSB of 1 is added. The address of the

device is now known and it can be interrogated in

the usual way.

4. If more than one device’s ALERT output is low,

the one with the lowest device address will have

priority, in accordance with normal SMBus

arbitration.

5. Once the ADT7483A has responded to the alert

response address, it will reset its ALERT output,

provided that the error condition that caused the

ALERT no longer exists. If the SMBALERT line

and so on, unﬁ] all devices whose ALERT Masking [he KEERT ALERT consecutive ALERT To mask ALERT cunsccmivc ALERT To mask ALERT To mask ALERT ALERT n ALERT ALERT cause ALERT ALERT THERM behavior. ALERT full“ on the rcmom diode. THERM ALERT causes ALERT to assert. ALERT Similarly, «he THERM THERM THERM . THERM falls back wimin me (THERM THERM THERM e hysteresis loop on the m m m can bc SCI up so that whenm be switched on m cool me sysmm. thnm rempermure hovers around the THERM Table 1B. THERM THER'M

ADT7483A

http://onsemi.com

remains low, the master will send the ARA again,

and so on, until all devices whose ALERT outputs

were low have responded.

Masking the ALERT Output

The ALERT output can be masked for local, Remote 1,

Remote 2, or all three channels. This is done by setting the

appropriate mask bits in either the Configuration 1 register

(read address = 0x03, write address = 0x09) or in the

consecutive ALERT register (address = 0x22)

To mask ALERTs due to local temperature, set Bit 5 of the

consecutive ALERT register to 1. Default = 0.

To mask ALERTs due to Remote 1 temperature, set Bit 1 of

the Configuration 1 register to 1. Default = 0.

To mask ALERTs due to Remote 2 temperature, set Bit 0 of

the Configuration 1 register to 1. Default = 0.

To mask ALERTs due to any channel, set Bit 7 of the

Configuration 1 register to 1. Default = 0.

Low Power Standby Mode

The ADT7483A can be put into low power standby mode

by setting Bit 6 (Mon/STBY bit) of the Configuration 1

When Bit 6 is 0, the ADT7483A operates normally. When

Bit 6 is 1, the ADC is inhibited, and any conversion in

progress is terminated without writing the result to the

corresponding value register.

The SMBus is still enabled. Power consumption in the

standby mode is reduced to less than 5 mA.

When the device is in standby mode, it is still possible to

initiate a one-shot conversion of both channels by writing to

the oneshot register (Address 0x0F), after which the device

will return to standby. It does not matter what is written to

the one-shot register, all data written to it is ignored.

It is also possible to write new values to the limit register

while in standby mode. If the values stored in the

temperature value registers are now outside the new limits,

an ALERT is generated, even though the ADT7483A is still

in standby.

Sensor Fault Detection

The ADT7483A has internal sensor fault detection

circuitry located at its D+ input. This circuit can detect

situations where a remote diode is not connected, or is

incorrectly connected, to the ADT7483A. A simple voltage

comparator trips if the voltage at D+ exceeds VDD −1V

(typical), signifying an open circuit between D+ and D−.

The output of this comparator is checked when a conversion

is initiated. Bit 2 (D1 OPEN flag) of the Status Register 1

(Address 0x02) is set if a fault is detected on the Remote 1

channel. Bit 2 (D2 OPEN flag) of the Status Register 2

(Address 0x23) is set if a fault is detected on the Remote 2

channel. If the ALERT pin is enabled, setting this flag will

cause ALERT to assert low.

If a remote sensor is not used with the ADT7483A, then

the D+ and D− inputs of the ADT7483A need to be tied

together to prevent the OPEN flag from being continuously

set.

Most temperature sensing diodes have an operating

temperature range of −55C to +150C. Above 150C, they

lose their semiconductor characteristics and approximate

conductors instead. This results in a diode short, setting the

OPEN flag. The remote diode in this case no longer gives an

accurate temperature measurement. A read of the

temperature result register will give the last good

temperature measurement. The user should be aware that,

while the diode fault is triggered, the temperature

measurement on the remote channels may not be accurate.

Interrupt System

The ADT7483A has two interrupt outputs, ALERT and

THERM. Both outputs have different functions and

behavior. ALERT is maskable and responds to violations of

software programmed temperature limits or an open-circuit

fault on the remote diode. THERM is intended as a fail-safe

interrupt output that cannot be masked.

If the Remote 1, Remote 2, or local temperature exceeds

the programmed high temperature limits, or equals or

exceeds the low temperature limits, the ALERT output is

asserted low. An open-circuit fault on the remote diode also

causes ALERT to assert. ALERT is reset when serviced by

a master reading its device address, provided the error

condition has gone away and the status register has been

reset.

Similarly, the THERM output asserts low if the Remote 1,

Remote 2, or local temperature exceeds the programmed

THERM limits. The THERM temperature limits should

normally be equal to or greater than the high temperature

limits. THERM is automatically reset when the temperature

falls back within the (THERM −Hysteresis) limit. The local

and remote THERM limits are set by default to 85C. An

hysteresis value can be programmed, in which case,

THERM resets when the temperature falls to the limit value

minus the hysteresis value. This applies to both local and

remote measurement channels. The power-on hysteresis

default value is 10C, but this may be reprogrammed to any

value after power-up.

The hysteresis loop on the THERM outputs is useful when

THERM is used for on/off control of a fan. The user’s

system can be set up so that when THERM asserts, a fan can

be switched on to cool the system. When THERM goes high

again, the fan can be switched off. Programming an

hysteresis value protects from fan jitter, wherein the

temperature hovers around the THERM limit and the fan is

constantly being switched.

Table 18. THERM HYSTERESIS

THERM Hysteresis Binary Representation

0C 0 000 0000

1C 0 000 0001

10C 0 000 1010

THERM ALERT . The ALERT outpul can be used a5 an S‘MBALERT risenl If (he (empemlure cnminues to incmuse, (he THERM (empemulre 1mm, the iALERT THERM limn, me THERM The THERM temperature falls m THERM The ALERT AL T THERM THERMZ THERM THERMZ THERM THERMZ TH RM2 lower than (he THERM limils. The THERMZ s the THERM limits, lhe THERM mm Wf Figure 20. Operation ol [he THEFM and THEFM'Z When [he THERMZ limil is exceeded, lhe THERMZ THERM limil, [he THERM The THERM iempemmre falls to THERM below the THERMZ limit, the THERMZ Again, no hydercsix value is shown {or THERMZ

ADT7483A

http://onsemi.com

Figure 19 shows how the THERM and ALERT outputs

operate. The ALERT output can be used as an SMBALERT

to signal to the host via the SMBus that the temperature has

risen. If the temperature continues to increase, the THERM

output can be used to turn on a fan to cool the system. This

method ensures that there is a fail-safe mechanism to cool

the system, without the need for host intervention.

Figure 19. Operation of the ALERT and THERM

Interrupts

1005C

THERM LIMIT

905C

805C

705C

605C

505C

405C

THERM LIMIT − HYSTERESIS

HIGH TEMP LIMIT

RESET BY MASTER

TEMPERATURE

ALERT

THERM

If the measured temperature exceeds the high

temperature limit, the ALERT output asserts low.

If the temperature continues to increase and exceeds the

THERM limit, the THERM output asserts low. This can

be used to throttle the CPU clock or switch on a fan.

The THERM output deasserts (goes high) when the

temperature falls to THERM limit minus hysteresis. In

Figure 19, the default hysteresis value of 10C is

shown.

The ALERT output deasserts only when the

temperature has fallen below the high temperature

limit, and the master has read the device address and

cleared the status register.

Pin 13 on the ADT7483A can be configured as either an

ALERT output or as an additional THERM output.

THERM2 will assert low when the temperature exceeds the

programmed local and/or remote high temperature limits. It

is reset in the same manner as THERM, and it is not

maskable. The programmed hysteresis value also applies to

THERM2. Figure 20 shows how THERM and THERM2

might operate together to implement two methods of cooling

the system. In this example, the THERM2 limits are set

lower than the THERM limits. The THERM2 output can be

used to turn on a fan. If the temperature continues to rise and

exceeds the THERM limits, the THERM output can provide

additional cooling by throttling the CPU.

Figure 20. Operation of the THERM and THERM2

Interrupts

THERM2 LIMIT

905C

805C

705C

605C

505C

405C

TEMPERATURE

THERM

305C

THERM LIMIT

THERM2

When the THERM2 limit is exceeded, the THERM2

signal asserts low.

If the temperature continues to increase and exceeds the

THERM limit, the THERM output asserts low.

The THERM output deasserts (goes high) when the

temperature falls to THERM limit minus hysteresis. In

Figure 20, there is no hysteresis value shown.

As the system cools further, and the temperature falls

below the THERM2 limit, the THERM2 signal resets.

Again, no hysteresis value is shown for THERM2.

The temperature measurement can be either the local or

the remote temperature measurement.

ADT7483A

http://onsemi.com

Applications

Noise Filtering

For temperature sensors operating in noisy environments,

previous practice was to place a capacitor across the D+ and

D− pins to help combat the effects of noise. However, large

capacitances affect the accuracy of the temperature

measurement, leading to a recommended maximum

capacitor value of 1,000 pF.

Factors Affecting Diode Accuracy

Remote Sensing Diode

The ADT7483A is designed to work with substrate

transistors built into processors or with discrete transistors.

Substrate transistors will generally be PNP types with the

collector connected to the substrate. Discrete types can be

either a PNP or NPN transistor connected as a diode (base

shorted to collector). If an NPN transistor is used, the

collector and base are connected to D+ and the emitter to D−.

If a PNP transistor is used, the collector and base are

connected to D− and the emitter to D+.

To reduce the error due to variations in both substrate and

discrete transistors, the following factors should be taken

into consideration:

The ideality factor, nf, of the transistor is a measure of

the deviation of the thermal diode from ideal behavior.

The ADT7483A is trimmed for an nf value of 1.008.

Use the following equation to calculate the error

introduced at a temperature,T (C) when using a

transistor whose nf does not equal 1.008. Consult the

processor data sheet for the nf values.

(eq. 2)

DT+ǒnf*1.008Ǔń1.008 ǒ273.15 Kelvin )TǓ

To factor this in, write the DT value to the offset register.

It is then automatically added to, or subtracted from, the

temperature measurement by the ADT7483A.

Some CPU manufacturers specify the high and low

current levels of the substrate transistors. The high

current level of the ADT7483A, IHIGH, is 200 mA, and

the low level current, ILOW, is 12 mA. If the ADT7483A

current levels do not match the current levels specified

by the CPU manufacturer, it may be necessary to

remove an offset. Refer to the CPU data sheet to

determine whether this offset needs to be removed and

how to calculate it. This offset is programmed to the

offset register. It is important to note that if more than

one offset must be considered, program the algebraic

sum of these offsets to the offset register.

If a discrete transistor is used with the ADT7483A, the

best accuracy is obtained by choosing devices according to

the following criteria:

Base-emitter voltage greater than 0.25 V at 6 mA, at the

highest operating temperature.

Base-emitter voltage less than 0.95 V at 100 mA, at the

lowest operating temperature.

Base resistance less than 100 W.

Small variation in hFE (50 to 150) that indicates tight

control of VBE characteristics.

Transistors such as 2N3904, 2N3906, or equivalents in

SOT−23 packages, are suitable devices to use.

Thermal Inertia and Self-heating

Accuracy depends on the temperature of the remote

sensing diode and/or the local temperature sensor being at

the same temperature as that being measured. A number of

factors can affect this. Ideally, the sensor should be in good

thermal contact with the part of the system being measured.

If it is not, the thermal inertia caused by the sensor’s mass

causes a lag in the response of the sensor to a temperature

change. In the case of the remote sensor, this should not be

a problem, since it will either be a substrate transistor in the

processor or a small package device, such as SOT−23,

placed in close proximity to it.

The on-chip sensor, however, is often remote from the

processor and only monitors the general ambient

temperature around the package. In practice, the

ADT7483A package will be in electrical, and hence thermal,

contact with a PCB and may also be in a forced airflow. How

accurately the temperature of the board and/or the forced

airflow reflects the temperature to be measured will also

affect the accuracy. Self-heating, due to the power dissipated

in the ADT7483A or the remote sensor, causes the chip

temperature of the device or remote sensor to rise above

ambient. However, the current forced through the remote

sensor is so small that self-heating is negligible. In the case

of the ADT7483A, the worst-case condition occurs when the

device is converting at 64 conversions per second while

sinking the maximum current of 1 mA at the ALERT and

THERM output. In this case, the total power dissipation in

the device is about 4.5 mW. The thermal resistance, qJA, of

the QSOP−16 package is about 150C/W.

Layout Considerations

Digital boards can be electrically noisy environments, and

the ADT7483A measures very small voltages from the

remote sensor, so care must be taken to minimize noise

induced at the sensor inputs. Follow these precautions:

1. Place the ADT7483A as close as possible to the

remote sensing diode. Provided that the worst

noise sources such as clock generators,

data/address buses, and CRTs are avoided, this

distance can be 4 inches to 8 inches.

2. Route the D+ and D– tracks close together, in

parallel, with grounded guard tracks on each side.

To minimize inductance and reduce noise pickup,

a 5 mil track width and spacing is recommended.

Provide a ground plane under the tracks, if

possible.

n SCLK, SDATA, and iALERT Vno TYP |D ks! i FAN ENABLE Flgure 22. Typlcal Appllcatlnn Clrcull hnp://onseml.com I9

ADT7483A

http://onsemi.com

Figure 21. Typical Arrangement of Signal Tracks

5 MIL

GND

D−

D+

GND

3. Minimize the number of copper/solder joints that

can cause thermocouple effects. Where

copper/solder joints are used, make sure that they

are in both the D+ and D− path and at the same

temperature.

Thermocouple effects should not be a major

problem as 1C corresponds to approximately

200 mV, and thermocouple voltages are about

3 mV/C of temperature difference. Unless there

are two thermocouples with a large temperature

differential between them, thermocouple voltages

should be much less than 200 mV.

4. Place a 0.1 mF bypass capacitor close to the VDD

pin. In extremely noisy environments, place an

input filter capacitor across D+ and D− close to the

ADT7483A. This capacitance can effect the

temperature measurement, so care must be taken

to ensure that any capacitance seen at D+ and D−

is a maximum of 1,000 pF. This maximum value

includes the filter capacitance, plus any cable or

stray capacitance between the pins and the sensor

diode.

5. If the distance to the remote sensor is more than

8 inches, the use of twisted pair cable is

recommended. A total of 6 feet to 12 feet is

needed.

6. For very long distances (up to 100 feet), use

shielded twisted pair, such as Belden No. 8451

microphone cable. Connect the twisted pair to D+

and D−, and the shield to GND close to the

ADT7483A. Leave the remote end of the shield

unconnected to avoid ground loops.

Because the measurement technique uses switched

current sources, excessive cable or filter capacitance can

affect the measurement. When using long cables, the filter

capacitance can be reduced or removed.

Application Circuit

Figure 22 shows a typical application circuit for the

ADT7483A, using discrete sensor transistors. The pull-ups

on SCLK, SDATA, and ALERT are required only if they are

not already provided elsewhere in the system.

The SCLK and SDATA pins of the ADT7483A can be

interfaced directly to the SMBus of an I/O controller, such

as the Intel820 chipset.

Figure 22. Typical Application Circuit

FAN ENABLE

VDD

TYP 10 kW

FAN

CONTROL

CIRCUIT

SMBUS

CONTROLLER

5.0 V or 12 V

3.0 V to 3.6 V

TYP 10 kW

0.1 mF

GND

2N3904/06

CPU THERMAL

DIODE

ADT7483A

SCLK

SDATA

ALERT

THERM

VDD

D1−

D1+

D2−

D2+

ADD1

ADD0

Table 19. ORDERING INFORMATION

Device Number* Temperature Range Package Type Package Option Shipping†

ADT7483AARQZ−RL −40C to +125C16-lead QSOP RQ−16 2,500 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*The “Z’’ suffix indicates Pb-Free part.

anus: mug E1 7 2x * L L DETAILA Q 020 C D ZXIHTIFS M H‘ III: :3— EQWMA) -E ﬁﬁmfgW J %;3’% DETAIL A M SOLDERING FOOTPRINT“ ‘sx ﬁx 1 r042 1.12 16 nunuuuuﬁi’ nuun‘umm L, 212%;4 F D‘MENS‘ONS MILUMEIERS 6,40

ADT7483A

http://onsemi.com

PACKAGE DIMENSIONS

QSOP16

CASE 492−01

ISSUE A

0.25 C

DETAIL A

h x 45 _

DIM MAXMIN

INCHES

A0.053 0.069

b0.008 0.012

L0.016 0.050

e0.025 BSC

h0.009 0.020

c0.007 0.010

A1 0.004 0.010

M0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION.

4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS, OR GATE BURRS. MOLD FLASH,

PROTRUSIONS, OR GATE BURRS SHALL NOT EX

CEED 0.005 PER SIDE. DIMENSION E1 DOES NOT

INCLUDE INTERLEAD FLASH OR PROTRUSION. IN

TERLEAD FLASH OR PROTRUSION SHALL NOT EX

CEED 0.005 PER SIDE. D AND E1 ARE DETERMINED

AT DATUM H.

5. DATUMS A AND B ARE DETERMINED AT DATUM H.

6.40

16X

0.42 16X

1.12

0.635

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

16X

SEATING

PLANE

0.10 C

A-B D

0.20 C

16 9

16X CM

D0.193 BSC

E0.237 BSC

E1 0.154 BSC

L2 0.010 BSC

0.25 C D

0.20 C D

2X 10 TIPS

0.10 C H

GAUGE

PLANE

A2 0.049 ----

1.35 1.75

0.20 0.30

0.40 1.27

0.635 BSC

0.22 0.50

0.19 0.25

0.10 0.25

0 8

4.89 BSC

6.00 BSC

3.90 BSC

0.25 BSC

1.24 ----

MAXMIN

MILLIMETERS

SEATING

PLANE

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,

copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC

reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any

particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without

limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications

and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC

does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for

surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where

personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and

its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,

any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture

of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

ADT7483A/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada