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© Semiconductor Components Industries, LLC, 2012
August, 2012 − Rev. 9
1Publication Order Number:
LMV931/D
LMV931, LMV932
Single and Dual Low
Voltage, Rail-to-Rail Input
and Output, Operational
Amplifiers
The LMV931 Single and LMV932 Dual are CMOS low−voltage
operational amplifiers which can operate on single−sided power
supplies (1.8 V to 5.0 V) with rail−to−rail input and output swing.
Both devices come in small state−of−the−art packages and require
very low quiescent current making them ideal for battery−operated,
portable applications such as notebook computers and hand−held
instruments. Rail−to−Rail operation provides improved signal−to−noise
performance plus the small packages allow for closer placement to
signal sources thereby reducing noise pickup.
The single LMV931 is offered in space saving SC70−5 package.
The dual LMV932 is in either a Micro8 or SOIC package. These small
packages are very beneficial for crowded PCB’s.
Features
•Performance Specified on Single−Sided Power Supply: 1.8 V, 2.7 V, and
5 V
•Small Packages:
LMV931 in a SC−70
LMV932 in a Micro8 or SOIC−8
•No Output Crossover Distortion
•Extended Industrial Temperature Range: −40°C to +125°C
•Low Quiescent Current 210 mA, Max Per Channel
•No Output Phase−Reversal from Overdriven Input
•These are Pb−Free Devices
Typical Applications
•Notebook Computers, Portable Battery−Operated Instruments, PDA’s
•Active Filters, Low−Side Current Monitoring
Figure 1. Output Voltage Swing vs. Supply Voltage
SUPPLY VOLTAGE (mV)
DV FROM RAIL (V)
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
RL = 600 W
TA = 25°C
VOH
VOL
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SC−70
CASE 419A
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
ORDERING INFORMATION
Micro8]
CASE 846A
MARKING
DIAGRAMS
LMV931 (Single)
LMV932 (Dual)
V932
AYWG
G
1
8
AAF MG
G
A = Assembly Location
Y = Year
L = Wafer Lot
W = Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
1
5
TSOP−5
CASE 483 1
5
ADF MG
G
M = Date Code
G= Pb−Free Package
(*Note: Microdot may be in either location)
1
8
SOIC−8
CASE 751
LMV932
ALYW
G
1
8
LMV931, LMV932
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2
PIN CONNECTIONS
(Top View)
SC70−5/TSOP−5
+IN
VEE
−IN
VCC
OUTPUT
−
+
2
1
3
5
4
OUT A 1
2
3
4
−+
+−
8
7
6
5
IN A−
IN A+
VEE
VCC
OUT B
IN B−
IN B+
A
B
Micro8/SOIC−8
(Top View)
MAXIMUM RATINGS
Symbol Rating Value Unit
VSSupply Voltage (Operating Range VS = 1.8 V to 5.5 V) 5.5 V
VIDR Input Differential Voltage $Supply Voltage V
VICR Input Common Mode Voltage Range −0.5 to (VCC) + 0.5 V
Maximum Input Current 10 mA
tSo Output Short Circuit (Note 1) Continuous
TJMaximum Junction Temperature (Operating Range −40°C to 85°C) 150 °C
qJA Thermal Resistance: SC−70
TSOP−5
Micro8
280
333
238
°C/W
Tstg Storage Temperature −65 to 150 °C
Mounting Temperature (Infrared or Convection v 30 sec) 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
ESD data available upon request.
1. Continuous short−circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction
temperature of 150°C. Output currents in excess of 45 mA over long term may adversely affect reliability. Shorting output to either VCC
or VEE will adversely affect reliability.
LMV931, LMV932
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3
1.8 V DC ELECTRICAL CHARACTERISTICS (Note 2) Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C,
VS = 1.8 V, VCM = VS/2, VO = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm.
Parameter Symbol Condition Min Typ Max Unit
Input Offset Voltage VIO LMV931 (Single) (−40°C to +125°C) 1 6 mV
LMV932 (Dual) (−40°C to +125°C) 1 7.5
Input Offset Voltage
Average Drift
TCVIO 5.5 mV/°C
Input Bias Current IB−40°C to +125°C < 1 nA
Input Offset Current IIO −40°C to +125°C < 1 nA
Supply Current
(per Channel)
ICC In Active Mode 75 185 mA
−40°C to +125°C 205
Common Mode
Rejection Ratio
CMRR 0 V v VCM v 0.6 V, 1.4 V v VCM v 1.8 V 50 70 dB
− 40°C to +125°C 50
−0.2 V v VCM v 0 V, 1.8 V v VCM v 2 V 50 70
Power Supply
Rejection Ratio
PSRR 1.8 V v V+ v 5 V, VCM = 0.5 V 50 70 dB
−40°C to +125°C 50
Input Common−Mode
Voltage Range
VCM For CMRR w 50 dB and TA = 25°C VEE
− 0.2
−0.2
to 2.1
VCC
+ 0.2
V
For CMRR w 50 dB and TA = − 40°C to +85°C VEE VCC
For CMRR w 50 dB and TA = − 40°C to +125°C VEE
+ 0.2
VCC
− 0.2
Large Signal Voltage
Gain LMV931
(Single)
AVRL = 600 W to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V 77 101 dB
−40°C to +125°C 73
RL = 2 kW to 0.9V, VO = 0.2 V to 1.6 V, VCM = 0.5 V 80 105
−40°C to +125°C 75
Large Signal Voltage
Gain LMV932 (Dual)
RL = 600 W to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V 75 90
−40°C to +125°C 72
RL = 2 kW to 0.9 V, VO = 0.2 V to 1.6 V,VCM = 0.5 V 78 100
−40°C to +125°C 75
Output Swing VOH RL = 600 W to 0.9V, VIN = $100 mV 1.65 1.72 V
−40°C to +125°C 1.63
VOL RL = 600 W to 0.9V, VIN = $100 mV 0.077 0.105
−40°C to +125°C 0.12
VOH RL = 2 kW to 0.9V, VIN = $100 mV 1.75 1.77
−40°C to +125°C 1.74
VOL RL = 2 kW to 0.9 V, VIN = $100 mV 0.24 0.035
−40°C to +125°C 0.04
Output Short Circuit
Current
IOSourcing, Vo = 0 V, VIN = +100 mV 4.0 30 mA
−40°C to +125°C 3.3
Sinking, Vo = 1.8V, VIN = −100 mV 7.0 60
−40°C to +125°C 5.0
2. Guaranteed by design and/or characterization.
NH?
LMV931, LMV932
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4
1.8 V AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are guaranteed for TA = 25°C, VS = 1.8 V,
VCM = VS/2, Vo = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are
guaranteed by testing, characterization, or statistical analysis.
Parameter Symbol Condition Min Typ Max Unit
Slew Rate SR (Note 3) 0.35 V/mS
Gain Bandwidth
Product
GBWP 1.4 MHz
Phase Margin Qm 67 °
Gain Margin Gm 7 dB
Input−Referred
Voltage Noise
enf = 50 kHz, VCM = 0.5 V 60 nV/√Hz
Total Harmonic
Distortion
THD f = 1 kHz, AV = +1, RL = 600 W, VO = 1 VPP 0.023 %
Amplifier−to−Amplifier
Isolation
(Note 4) 123 dB
3. Connected as voltage follower with input step from VEE to VCC. Number specified is the slower of the positive and negative slew rates.
4. Input referred, RL = 100 kW connected to VS/2. Each amp excited in turn with 1 kHz to produce VO = 3 VPP
. (For Supply Voltages < 3 V,
VO = VCC).
LMV931, LMV932
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2.7 V DC ELECTRICAL CHARACTERISTICS (Note 5) Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C,
VS = 2.7 V, VCM = VS/2, VO = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm.
Parameter Symbol Condition Min Typ Max Unit
Input Offset Voltage VIO LMV931 (Single) (−40°C to +125°C) 1 6 mV
LMV932 (Dual) (−40°C to +125°C) 1 7.5
Input Offset Voltage
Average Drift
TCVIO 5.5 mV/°C
Input Bias Current IB −40°C to +125°C < 1 nA
Input Offset Current IIO −40°C to +125°C < 1 nA
Supply Current (per
Channel)
ICC In Active Mode 80 190 mA
−40°C to +125°C 210
Common Mode
Rejection Ratio
CMRR 0 V v VCM v 1.5 V, 2.3 V v VCM v 2.7 V 50 70 dB
−40°C to +125°C 50
−0.2 V v VCM v 0 V, 2.7 V v VCM v 2.9 V 50 70
Power Supply
Rejection Ratio
PSRR 1.8 V v V+ v 5 V, VCM = 0.5 V 50 70 dB
−40°C to +125°C 50
Input Common−Mode
Voltage Range
VCM For CMRR w 50 dB and TA = 25°C VEE
− 0.2
−0.2
to 3.0
VCC
+ 0.2
V
For CMRR w 50 dB and TA = −40°C to +85°C VEE VCC
For CMRR w 50 dB and TA = −40°C to +125°C VEE
+ 0.2
VCC
− 0.2
Large Signal Voltage
Gain LMV931
(Single)
AVRL = 600 W to 1.35 V, VO = 0.2 V to 2.5 V 87 104 dB
−40°C to +125°C 86
RL = 2 kW to 1.35 V, VO = 0.2 V to 2.5 V 92 110
−40°C to +125°C 91
Large Signal Voltage
Gain LMV932 (Dual)
AVRL = 600 W to 1.35 V, VO = 0.2 V to 2.5 V 78 90
−40°C to +125°C 75
RL= 2 kW to 1.35 V, VO = 0.2 V to 2.5 V 81 100
−40°C to +125°C 78
Output Swing VOH RL = 600 W to 1.35 V, VIN = $100 mV 2.55 2.62 V
−40°C to +125°C 2.53
VOL RL = 600 W to 1.35 V, VIN = $100 mV 0.083 0.11
−40°C to +125°C 0.13
VOH RL = 2 kW to 1.35 V, VIN = $100 mV 2.65 2.675
−40°C to +125°C 2.64
VOL RL = 2 kW to 1.35 V, VIN = $100 mV 0.025 0.04
−40°C to +125°C 0.045
Output Short Circuit
Current
IOSourcing, Vo = 0 V, VIN = $100 mV 20 65 mA
−40°C to +125°C 15
Sinking, Vo = 0 V, VIN = −100 mV 18 75
−40°C to +125°C 12
5. Guaranteed by design and/or characterization.
NH?
LMV931, LMV932
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6
2.7 V AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are guaranteed for TA = 25°C, VS = 2.7 V,
VCM = VS/2 ,Vo = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are
guaranteed by testing, characterization, or statistical analysis.
Parameter Symbol Condition Min Typ Max Unit
Slew Rate SR (Note 6) 0.4 V/uS
Gain Bandwidth
Product
GBWP 1.4 MHz
Phase Margin Qm 70 °
Gain Margin Gm 7.5 dB
Input−Referred
Voltage Noise
enf = 50 kHz, VCM = 1.0 V 57 nV/√Hz
Total Harmonic
Distortion
THD f = 1 kHz, AV = +1, RL = 600 W, VO = 1 VPP 0.022 %
Amplifier−to−Amplifier
Isolation
(Note 7) 123 dB
6. Connected as voltage follower with input step from VEE to VCC. Number specified is the slower of the positive and negative slew rates.
7. Input referred, RL = 100 kW connected to VS/2. Each amp excited in turn with 1 kHz to produce VO = 3 VPP
. (For Supply Voltages < 3 V,
VO = VCC).
LMV931, LMV932
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5 V DC ELECTRICAL CHARACTERISTICS (Note 8) Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C,
VS = 5 V, VCM = VS/2, VO = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm.
Parameter Symbol Condition Min Typ Max Unit
Input Offset Voltage VIO LMV931 (Single) (−40°C to +125°C) 1 6 mV
LMV932 (Dual) (−40°C to +125°C) 1 7.5
Input Offset Voltage
Average Drift
TCVIO 5.5 mV/°C
Input Bias Current IB −40°C to +125°C < 1 nA
Input Offset Current IIO −40°C to +125°C < 1 nA
Supply Current (per
Channel)
ICC In Active Mode 95 210 mA
−40°C to +125°C 230
Common−Mode
Rejection Ratio
CMRR 0 V v VCM v 3.8 V, 4.6 V v VCM v 5.0 V 50 70 dB
−40°C to +125°C 50
−0.2 V v VCM v 0 V, 5.0 V v VCM v 5. 2V 50 70
Power Supply
Rejection Ratio
PSRR 1.8 V v V+ v 5 V, VCM = 0.5 V 50 70 dB
−40°C to +125°C 50
Input Common−Mode
Voltage Range
VCM For CMRR w 50 dB and TA = 25°C VEE
− 0.2
−0.2
to 5.3
VCC
+ 0.2
V
For CMRR w 50 dB and TA = −40°C to +85°C VEE VCC
For CMRR w 50 dB and TA = −40°C to +125°C VEE
+ 0.3
VCC
− 0.3
Large Signal Voltage
Gain LMV931
(Single)
AVRL = 600 W to 2.5 V, VO = 0.2 V to 4.8 V 88 102 dB
−40°C to +125°C 87
RL = 2 kW to 2.5 V, VO = 0.2 V to 4.8 V 94 113
−40°C to +125°C 93
Large Signal Voltage
Gain LMV932 (Dual)
AVRL = 600 W to 2.5 V, VO = 0.2 V to 4.8 V 81 90
−40°C to +125°C 78
RL = 2 kW to 2.5 V, VO = 0.2 V to 4.8 V 85 100
−40°C to +125°C 82
Output Swing VOH RL = 600 W to 2.5 V, VIN = $100 mV 4.855 4.89 V
−40°C to +125°C 4.835
VOL RL = 600 W to 2.5 V, VIN = $100 mV 0.12 0.16
−40°C to +125°C 0.18
VOH RL = 2 kW to 2.5 V, VIN = $100 mV 4.945 4.967
−40°C to +125°C 4.935
VOL RL = 2 kW to 2.5 V, VIN = $100 mV 0.037 0.065
−40°C to +125°C 0.075
Output Short−Circuit
Current
IOSourcing, Vo = 0 V, VIN = +100 mV 55 65 mA
−40°C to +125°C 45
Sinking, Vo = 5 V, VIN = −100 mV 58 80
−40°C to +125°C 45
8. Guaranteed by design and/or characterization.
NH?
LMV931, LMV932
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8
5 V AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are guaranteed for TA = 25°C, VS = 5 V,
VCM = VS/2, Vo = VS/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm.
Parameter Symbol Condition Min Typ Max Unit
Slew Rate SR (Note 9) 0.48 V/uS
Gain Bandwidth
Product
GBWP 1.5 MHz
Phase Margin Qm 65 °
Gain Margin Gm 8 dB
Input−Referred
Voltage Noise
enf = 50 kHz, VCM = 2 V 50 nV/√Hz
Total Harmonic
Distortion
THD f = 1 kHz, AV = +1, RL = 600 W, VO = 1 VPP 0.022 %
Amplifier−to−
Amplifier Isolation
(Note 10) 123 dB
9. Connected as voltage follower with input step from VEE to VCC. Number specified is the slower of the positive and negative slew rates.
10.Input referred, RL = 100 kW connected to VS/2. Each amp excited in turn with 1 kHz to produce VO = 3 VPP
. (For Supply Voltages < 3 V,
VO = VCC).
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LMV931, LMV932
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9
TYPICAL CHARACTERISTICS
(TA = 25°C and VS = 5 V unless otherwise specified)
25°C
0
0.02
0.04
0.06
0.08
0.10
0.12
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
Figure 2. Supply Current vs. Supply Voltage
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
25°C
125°C−40°C
VS = 2.7 V
VS = 5.0 V
VS = 1.8 V
OUTPUT VOLTAGE REFERENCED TO VCC (mV)
OUTPUT CURRENT (mA)
VS = 2.7 V
VS = 5.0 V
VS = 1.8 V
OUTPUT VOLTAGE REFERENCED TO VEE (mV)
OUTPUT CURRENT (mA)
SUPPLY VOLTAGE (mV)
DV FROM RAIL (V)
SUPPLY VOLTAGE (mV)
DV FROM RAIL (V)
LMV931 (Single)
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.10
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
RL = 600 W
TA = 25°C
VOH
VOL
0
0.002
0.004
0.006
0.008
0.010
0.012
0.014
0.016
0.018
0.020
1.8 2.2 2.6 3.0 3.4 3.8 4.2 4.6 5.0
VOH
VOL
RL = 2.0 W
TA = 25°C
0.01
0.1
1
10
100
0.001 0.01 0.1 1.0 10
0.01
0.1
1
10
100
0.001 0.01 0.1 1.0 10
0
0.02
0.04
0.06
0.08
0.10
0.12
1.8 2.2 2.6 3.4 4.2 5.0
Figure 3. Supply Current vs. Supply Voltage
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
Figure 4. Sourcing Current vs. Output Voltage
(TA = 255C)
Figure 5. Sinking Current vs. Output Voltage
(TA = 255C)
Figure 6. Output Voltage Swing vs. Supply
Voltage
Figure 7. Output Voltage vs. Supply Voltage
125°C
−40°C
85°C
3.0 3.8 4.6
LMV932 (Dual)
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LMV931, LMV932
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10
TYPICAL CHARACTERISTICS
(TA = 25°C and VS = 5 V unless otherwise specified)
Figure 8. Open Loop Gain and Phase Figure 9. Frequency Response vs. CL
FREQUENCY (Hz) FREQUENCY (Hz)
10 M1 M100 K10 K
−20
0
20
40
60
1 M100 K10 K
−20
0
20
40
60
Figure 10. Frequency Response vs. CL Figure 11. Gain and Phase vs. Temp
Figure 12. Gain and Phase vs. Temp
FREQUENCY (Hz)
1 M100 K10 K
−20
0
20
40
60
GAIN (dB)
GAIN (dB)
GAIN (dB)
PHASE MARGIN (°)
0
45
90
135
180
Gain (1.8 V)
Gain (5 V)
Phase (1.8 V)
Phase (5 V)
PHASE MARGIN (°)
GAIN
PHASE
RL = 1 MW
0
45
90
135
180
GAIN
PHASE
VS = 1.8 V
RL = 600 W
Gain 0 pF
Gain 300 pF
PM 0 pF
PM 300 pF
FREQUENCY (Hz) FREQUENCY (Hz)
1 M100 K10 K
−20
0
20
40
60
1 M100 K10 K
−20
0
20
40
60
GAIN (dB)
GAIN (dB)
PHASE MARGIN (°)
0
45
90
135
180
PHASE MARGIN (°)
GAIN
PHASE
0
45
90
135
180
VS = 1.8 V
RL = 600 W
CL = 150 pF
VS = 5 V
RL = 600 W
Gain 0 pF
Gain 300 pF
PM 0 pF
PM 300 pF
−40 Gain
25 Gain
85 Gain
125 Gain
−40 Phase
25 Phase
85 Phase
125 Phase
PHASE MARGIN (°)
0
45
90
135
180
VS = 5 V
RL = 600 W
CL = 150 pF
−40 Gain
25 Gain
85 Gain
125 Gain
−40 Phase
25 Phase
85 Phase
125 Phase
NIL/35 mw_OZ m0 FDA;
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TYPICAL CHARACTERISTICS
(TA = 25°C and VS = 5 V unless otherwise specified)
0
0.1
0.2
0.3
0.4
0.5
0.6
1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5
0
20
40
60
80
100
10 100 1 K 10 K
CMRR (dB)
Figure 13. CMRR vs. Frequency
FREQUENCY (Hz)
VS = 5 V
VS = 2.7 V
VS = 1.8 V
0
10
20
30
40
50
60
70
80
10 100 1 K 10 K
Figure 14. PSRR vs. Frequency
FREQUENCY (Hz)
PSRR (dB)
VS = 5 V
10.E−9
100.E−9
1.E−6
10.E−6
10 100 1 K 10 K 100 K
INPUT VOLTAGE NOISE (nV/√HZ)
Figure 15. Input Voltage Noise vs. Frequency
FREQUENCY (Hz)
0.001
0.1
1
10
10 100 1 K 10 K
Figure 16. THD vs. Frequency
FREQUENCY (Hz)
THD (%)
SLEW RATE (V/ms)
SUPPLY VOLTAGE (V)
Figure 17. Slew Rate vs. Supply Voltage
Falling Edge
Rising Edge
0.01
VS = 5 V
VS = 2.7 V
VS = 1.8 V
VS = 5 V
AV = 1000 RTI
RL = 600 W
AV = +1
Input = 1 Vp−p
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TYPICAL CHARACTERISTICS
(TA = 25°C and VS = 5 V unless otherwise specified)
Figure 18. Small Signal Transient Response Figure 19. Small Signal Transient Response
TIME (0.25 ms / DIV)
Figure 20. Small Signal Transient Response Figure 21. Large Signal Transient Response
Figure 22. Large Signal Transient Response Figure 23. Large Signal Transient Response
INPUT (50 mV / div)
OUTPUT (50 mV / div)
TIME (0.25 ms / DIV)
INPUT (50 mV / div)
OUTPUT (50 mV / div)
TIME (0.25 ms / DIV)
INPUT (50 mV / div)
OUTPUT (50 mV / div)
TIME (0.25 ms / DIV)
INPUT (900 mV / div)
OUTPUT (900 mV / div)
TIME (0.25 ms / DIV)
INPUT (1.35 V / div)
OUTPUT (1.35 V / div)
TIME (0.25 ms / DIV)
INPUT (2.5 V / div)
OUTPUT (2.5 V / div)
VS = 1.8 V
RL = 2 kW
AV = +1 INPUT
OUTPUT
VS = 2.7 V
RL = 2 kW
AV = +1 INPUT
OUTPUT
VS = 5 V
RL = 2 kW
AV = +1 INPUT
OUTPUT
INPUT
OUTPUT
VS = 2.7 V
RL = 2 kW
AV = +1
INPUT
OUTPUT
VS = 5 V
RL = 2 kW
AV = +1
VS = 1.8 V
RL = 2 kW
AV = +1
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TYPICAL CHARACTERISTICS
(TA = 25°C and VS = 5 V unless otherwise specified)
SHORT−CIRCUIT CURRENT (mA)
Figure 24. Short−Circuit vs. Temperature
(Sinking)
TEMPERATURE (°C)
Figure 25. Short−Circuit vs. Temperature
(Sourcing)
TEMPERATURE (°C)
SHORT−CIRCUIT CURRENT (mA)
−1
0
1
2
3
4
5
6
−0.5 0 0.5 1 1.5 2 2.5
Figure 26. Offset Voltage vs. Common Mode
Range VDD
VCM (V)
VOS (mV)
25°C
125°C−40°C
85°C
VS = 1.8 V
−3
−2
−1
0
1
2
3
4
5
6
7
−0.5 0 0.5 1 1.5 2 2.5 3 3.5
VOS (mV)
Figure 27. Offset Voltage vs. Common Mode
Range
VCM (V)
VS = 2.7 V
85°C
25°C
125°C
−40°C
0
10
20
30
40
50
60
70
80
90
100
110
−40 −20 0 20 40 60 80 100 120
VS = 5 V
VS = 2.7 V
VS = 1.8 V
0
10
20
30
40
50
60
70
80
90
100
110
−40 −20 0 20 40 60 80 100 120
VS = 2.7 V
VS = 5 V
VS = 1.8 V
0°C
0°C
−6
−4
−2
0
2
4
6
8
−10123456
VOS (mV)
Figure 28. Offset Voltage vs. Common Mode
Range
VCM (V)
VS = 5.0 V
85°C
25°C125°C
−40°C
0°C
W
i &
flfle
9%
LMV931, LMV932
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14
APPLICATION INFORMATION
+
−
R1
R2
VO
Vref
Vin
VOH
VO
VOL
Hysteresis
VinL VinH
Vref
MC1403
LMV931
−
+
R1
VCC
VCC
VO
2.5 V
R2
50 k
10 k
Vref
5.0 k
RC
RC
+
−
VO
For: fo = 1.0 kHz
R = 16 kW
C = 0.01 mF
VCC
LMV931
LMV931
Figure 29. Voltage Reference Figure 30. Wien Bridge Oscillator
Figure 31. Comparator with Hysteresis
VO+2.5 V(1 )R1
R2)
Vref +1
2VCC
fO+1
2pRC
VinL+R1
R1 )R2 (VOL *Vref) )Vref
VinH+R1
R1 )R2 (VOH *Vref) )Vref
H+R1
R1 )R2 (VOH *VOL)
For less than 10% error from operational amplifier,
((QO fO)/BW) < 0.1 where fo and BW are expressed in Hz.
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.
Given: fo= center frequency
A(fo) = gain at center frequency
Choose value fo, C
Vin
Figure 32. Multiple Feedback Bandpass Filter
−
+
VCC
R3
R1
R2
Vref
CC
VO
CO = 10 C
CO
LMV931
Then : R3 +Q
pfOC
R1 +R3
2A(f
O)
R2 +
R1 R3
4Q2R1 *R3
ORDERING INFORMATION
Order Number
Number of
Channels Number of Pins Package Type Shipping†
LMV931SQ3T2G Single 5 SC70−5
(Pb−Free)
3000 / Tape & Reel
LMV931SN3T1G Single 5 TSOP−5
(Pb−Free)
3000 / Tape & Reel
LMV932DMR2G* Dual 8 Micro8
(Pb−Free)
4000 / Tape & Reel
LMV932DR2G Dual 8 SOIC−8
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Consult Sales.
LMV931, LMV932
http://onsemi.com
15
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A, SOT−353, SC−70
CASE 419A−02
ISSUE J
%\T::r -III
nnnnnn
ddddd
LMV931, LMV932
http://onsemi.com
16
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
DIM MIN MAX
MILLIMETERS
A3.00 BSC
B1.50 BSC
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
L1.25 1.55
M0 10
S2.50 3.00
123
54 S
A
G
L
B
D
H
C
J
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
T
SEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
um MOM
A
m nos um
I: 033 mm
9 ma new
n m: una
E m: ans
e 6553 oszSc
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us \ osu \ sus mafl Lusa‘ may
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mime:
hllp://onsemi.com
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LMV931, LMV932
http://onsemi.com
17
PACKAGE DIMENSIONS
Micro8t
CASE 846A−02
ISSUE H
S
B
M
0.08 (0.003) A S
T
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
b
e
PIN 1 ID
8 PL
0.038 (0.0015)
−T−
SEATING
PLANE
A
A1 cL
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
8X 8X
6X ǒmm
inchesǓ
SCALE 8:1
1.04
0.041
0.38
0.015
5.28
0.208
4.24
0.167
3.20
0.126
0.65
0.0256
DIM
A
MIN NOM MAX MIN
MILLIMETERS
−− −− 1.10 −−
INCHES
A1 0.05 0.08 0.15 0.002
b0.25 0.33 0.40 0.010
c0.13 0.18 0.23 0.005
D2.90 3.00 3.10 0.114
E2.90 3.00 3.10 0.114
e0.65 BSC
L0.40 0.55 0.70 0.016
−− 0.043
0.003 0.006
0.013 0.016
0.007 0.009
0.118 0.122
0.118 0.122
0.026 BSC
0.021 0.028
NOM MAX
4.75 4.90 5.05 0.187 0.193 0.199
HE
HE
DD
E
I:
H’H’H’H
H
H—H HHHHi fl%
HL— %i[|§:lLI%H
[HHHHE
HHHHH H
LMV931, LMV932
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18
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
SEATING
PLANE
1
4
58
N
J
X 45 _
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) ZSXS
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
LMV931/D
Micro8 is a trademark of International Rectifier.
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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