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September 2016 DocID029702 Rev 1 1/19
L6389E
High voltage high and low-side driver
Datasheet - production data
Features
High voltage rail up to 600 V
dV/dt immunity ± 50 V/nsec in full temperature
range
Driver current capability:
– 400 mA source
– 650 mA sink
Switching times 70/40 nsec rise/fall with 1 nF
load
3.3 V, 5 V, 15 V CMOS/TTL input comparators
with hysteresis and pull-down
Internal bootstrap diode
Outputs in phase with inputs
Deadtime and interlocking function
Applications
Home appliances
Industrial applications and drives
Motor drivers
– DC, AC, PMDC and PMAC motors
Induction heating
HVAC
Factory automation
Lighting applications
Power supply systems
Description
The L6389E is a high voltage gate driver,
manufactured with the BCD ™ “offline”
technology, and able to drive a half-bridge of
power MOSFET/IGBT devices. The high-side
(floating) section is enabled to work with voltage
rail up to 600 V. Both device outputs can sink and
source 650 mA and 400 mA respectively and
cannot be simultaneously driven high thanks to an
integrated interlocking function. Further
prevention from outputs cross conduction is
guaranteed by the deadtime function.
The L6389E device has two input and two output
pins, and guarantees the outputs switch in phase
with inputs. The logic inputs are CMOS/TTL
compatible (3.3 V, 5 V and 15 V) to ease the
interfacing with controlling devices.
The bootstrap diode is integrated in the driver
allowing a more compact and reliable solution.
The L6389E device features the UVLO protection
on both supply voltages (VCC and VBOOT)
ensuring greater protection against voltage drops
on the supply lines.
The device is available in an SO-8 tube, and tape
and reel packaging options.
SO-8
www.st.com
Contents L6389E
2/19 DocID029702 Rev 1
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Waveform definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Input logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
7 Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9.1 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
HI-
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DocID029702 Rev 1 3/19
L6389E Block diagram
19
1 Block diagram
Figure 1. Block diagram
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Electrical data L6389E
4/19 DocID029702 Rev 1
2 Electrical data
2.1 Absolute maximum ratings
2.2 Thermal data
2.3 Recommended operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter
Value
Unit
Min. Max.
V
OUT
Output voltage VBOOT -18 VBOOT V
V
CC
Supply voltage - 0.3 18 V
V
BOOT
Floating supply voltage - 0.3 618 V
V
hvg
High-side gate output voltage VOUT -0.3 VBOOT V
V
lvg
Low-side gate output voltage -0.3 VCC +0.3 V
V
i
Logic input voltage -0.3 VCC +0.3 V
dV
OUT
/d
t
Allowed output slew rate 50 V/ns
P
tot
Total power dissipation (T
A
= 25 °C) 750 mW
T
J
Junction temperature -45 150 °C
T
s
Storage temperature -50 150 °C
ESD Human body model 2 kV
Table 2. Thermal data
Symbol Parameter SO-8 Unit
R
th(JA)
Thermal resistance junction to ambient 150 °C/W
Table 3. Recommended operating conditions
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
V
OUT
6 Output voltage (1)
1. If the condition VBOOT - VOUT < 18 V is guaranteed, VOUT can range from -3 to 580 V.
580 V
V
BS
(2)
2. VBS = VBOOT - VOUT
.
8 Floating supply voltage (1) 17 V
f
sw
Switching frequency HVG, LVG load C
L
= 1 nF 400 kHz
V
CC
3 Supply voltage 17 V
T
J
Junction temperature -45 125 °C
LIN E
HIN E
Vcc E
GND C
oumd
UVOI‘IW
|_l|_l|_l|_l
VBOOT
HVG
OUT
LVG
DocID029702 Rev 1 5/19
L6389E Pin connection
19
3 Pin connection
Figure 2. Pin connection (top view)
Table 4. Pin description
No. Pin Type Function
1 LIN I Low-side driver logic input
2 HIN I High-side driver logic input
3 VCC P Low-voltage power supply
4 GND P Ground
5 LVG(1)
1. The circuit guarantees 0.3 V maximum on the pin (at Isink = 10 mA). This allows the omission of the
“bleeder” resistor connected between the gate and the source of the external MOSFET normally used to
hold the pin low.
O Low-side driver output
6 OUT P High-side driver floating reference
7 HVG(1) O High-side driver output
8 VBOOT P Bootstrap supply voltage
Electrical characteristics L6389E
6/19 DocID029702 Rev 1
4 Electrical characteristics
4.1 AC operation
4.2 DC operation
Table 5. AC operation electrical characteristics (VCC = 15 V; TJ = 25 °C)
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
ton 1 vs. 5
2 vs. 7
High/low-side driver turn-on
propagation delay VOUT = 0 V 225 300 ns
toff
High/low-side driver turn-off
propagation delay VOUT = 0 V 160 220 ns
tr5, 7 Rise time CL = 1000 pF 70 100 ns
tf5, 7 Fall time CL = 1000 pF 40 80 ns
DT 5, 7 Deadtime 325 470 615 ns
Table 6. DC operation electrical characteristics
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
Low supply voltage section
VCCth1
3
VCC UV turn-on threshold 9.1 9.6 10.1 V
VCCth2 VCC UV turn-off threshold 7.9 8.3 8.8 V
VCChys VCC UV hysteresis 0.9 V
IQCCU
Undervoltage quiescent supply
current VCC 9 V 250 330 A
IQCC Quiescent current VCC = 15 V 350 450 A
RDS(on) Bootstrap driver on resistance(1) VCC 12.5 V 125
Bootstrapped supply voltage section
V
BSth1
8
V
BS
UV turn-on threshold 8.5 9.5 10.5 V
V
BSth2
V
BS
UV turn-off threshold 7.2 8.2 9.2 V
V
BShys
V
BS
UV hysteresis 0.9 V
IQ
BS
V
BS
quiescent current HVG ON 250 A
ILK High voltage leakage current Vhvg = VOUT = VBOOT = 600 V 10 A
High/low-side driver
Iso 5, 7
Source short-circuit current VIN = Vih (tp < 10 s) 300 400 mA
Isi Sink short-circuit current VIN = Vil (tp < 10 s) 500 650 mA
DocID029702 Rev 1 7/19
L6389E Electrical characteristics
19
Logic inputs
Vil
1, 2
Low logic level input voltage 1.1 V
Vih High logic level input voltage 1.8 V
Iih High logic level input current VIN = 15 V 13 20 25 A
Iil Low logic level input current VIN = 0 V -1 A
RP-DN Logic inputs pull-down resistor VIN = 15 V 600 750 1150 kΩ
1. RDS(on) is tested in the following way:
where:
I
1
is pin 8 current when V
BOOT
= V
BOOT1
, I
2
when V
BOOT
= V
BOOT2
.
Table 6. DC operation electrical characteristics (continued)
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
RDSON
VCC VBOOT1
–VCC VBOOT2
––
I1VCC,VBOOT1
I2VCC,VBOOT2
–
-----------------------------------------------------------------------------------------------=
Waveform definitions L6389E
8/19 DocID029702 Rev 1
5 Waveform definitions
Figure 3. Input to output waveform definition
Figure 4. Propagation delay waveform definition
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DocID029702 Rev 1 9/19
L6389E Waveform definitions
19
Figure 5. Deadtime waveform definition
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Input logic L6389E
10/19 DocID029702 Rev 1
6 Input logic
Input logic is provided with an interlocking circuitry which avoids the two outputs (LVG, HVG)
being active at the same time when both the logic input pins (LIN, HIN) are at a high logic
level. In addition, to prevent cross conduction of the external MOSFETs, after each output is
turned off, the other output cannot be turned on before a certain amount of time (DT) (see
Figure 3).
7 Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 6 a). In the L6389E device,
a patented integrated structure replaces the external diode. It is realized by a high voltage
DMOS, driven synchronously with the low-side driver (LVG), with a diode in series, as
shown in Figure 6 b. An internal charge pump (Figure 6 b) provides the DMOS driving
voltage. The diode connected in series to the DMOS has been added to avoid an
undesirable turn-on.
CBOOT selection and charging
To choose the proper C
BOOT
value, the external MOSFET can be seen as an equivalent
capacitor. This capacitor C
EXT
is related to the MOSFET total gate charge:
Equation 1
The ratio between the capacitors C
EXT
and C
BOOT
is proportional to the cyclical voltage loss.
It must be:
C
BOOT
>>>C
EXT
E.g.: if Q
gate
is 30 nC and V
gate
is 10 V, C
EXT
is 3 nF. With C
BOOT
= 100 nF the drop is
300 mV.
If HVG must be supplied for a long period, the C
BOOT
selection must also take the leakage
losses into account.
Table 7. Truth table
Input Output
HIN LIN HVG LVG
0000
0101
1010
1100
CEXT
Qgate
Vgate
---------------=
DocID029702 Rev 1 11/19
L6389E Bootstrap driver
19
E.g.: HVG steady-state consumption is typical 250 A, so, if HVG T
ON
is 5 ms, C
BOOT
must
supply 1.25 C to C
EXT
. This charge on a 1 F capacitor means a voltage drop of 1.25 V.
The internal bootstrap driver offers important advantages: the external fast recovery diode
can be avoided (it usually has a high leakage current).
This structure can work only if V
OUT
is close to GND (or lower) and, at the same time, the
LVG is on. The charging time (T
charge
) of the C
BOOT
is the time in which both conditions are
fulfilled and it must be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS R
DS(on
) (typical value:
125 ). This drop can be neglected at low switching frequency, but it should be taken into
account when operating at high switching frequency.
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 2
where Q
gate
is the gate charge of the external power MOSFET, R
DS(on
) is the on-resistance
of the bootstrap DMOS, and T
charge
is the charging time of the bootstrap capacitor.
For example: using a power MOSFET with a total gate charge of 30 nC, the drop on the
bootstrap DMOS is about 1 V, if the T
charge
is 5 s.
In fact:
Equation 3
V
drop
should be taken into account when the voltage drop on C
BOOT
is calculated: if this drop
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Vdrop Ich earg Rdson Vdrop
Qgate
Tch earg
------------------- Rdson
==
Vdrop
30nC
5s
---------------1250.8V=
Bootstrap driver L6389E
12/19 DocID029702 Rev 1
Figure 6. Bootstrap driver
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Figure 7. Typical rise and fall times
Figure 5. Quiescent Current vs. supply voltage
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Figure 9. V UV turn-on threshold Figure 10. V UV turn-off threshold
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DocID029702 Rev 1 13/19
L6389E Typical characteristics
19
8 Typical characteristics
Figure 7. Typical rise and fall times
vs. load capacitance
Figure 8. Quiescent current vs. supply voltage
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Figure 9. VBOOT UV turn-on threshold
vs. temperature
Figure 10. VCC UV turn-off threshold
vs. temperature
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Figure 11. V
1 UV turn-off threshold
Figure 12. Output source current
Figure 13. V UV turn-on threshold
Figure 14. Output sink current
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Typical characteristics L6389E
14/19 DocID029702 Rev 1
Figure 11. VBOOT UV turn-off threshold
vs. temperature
Figure 12. Output source current
vs. temperature
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Figure 14. Output sink current
vs. temperature
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DocID029702 Rev 1 15/19
L6389E Package information
19
9 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
9.1 SO-8 package information
Figure 15. SO-8 package outline
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Package information L6389E
16/19 DocID029702 Rev 1
Table 8. SO-8 package mechanical data
Symbol
Dimensions (mm)
Min. Typ. Max.
A1.75
A1 0.10 0.25
A2 1.25
b 0.28 0.48
c 0.17 0.23
D 4.80 4.90 5.00
E 5.80 6.00 6.20
E1 3.80 3.90 4.00
e1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
k0° 8°
ccc 0.10
DocID029702 Rev 1 17/19
L6389E Order codes
19
10 Order codes
Table 9. Order codes
Part number Package Packaging
L6389ED SO-8 Tube
L6389EDTR SO-8 Tape and reel
Revision history L6389E
18/19 DocID029702 Rev 1
11 Revision history
Table 10. Document revision history
Date Revision Changes
08-Sep-2016 1 First release
DocID029702 Rev 1 19/19
L6389E
19
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