DSC60xx Datasheet by Microchip Technology

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‘ MICRQICHIP DSC60XX
2017-2018 Microchip Technology Inc. DS20005625C-page 1
DSC60XX
Features
• Wide Frequency Range: 2 kHz to 80 MHz
• Ultra-Low Power Consumption: 1.3 mA/12 µA
(Active/Standby)
• Ultra-Small Footprints
-1.6mm
1.2 mm
-2.0mm
1.6 mm
-2.5mm2.0 mm
-3.2mm
2.5 mm
• Frequency Select Input Supports Two
Pre-Defined Frequencies
• High Stability: ±25 ppm, ±50 ppm
• Wide Temperature Range
- Industrial: –40°C to 85°C
- Ext. Commercial: –20° to 70°C
• Excellent Shock and Vibration Immunity
- Qualified to MIL-STD-883
• High Reliability
- 20x Better MTF Than Quartz Oscillators
• Supply Range of 1.71V to 3.63V
• Short Sample Lead Time: <2 weeks
• Lead Free & RoHS Compliant
Applications
• Low Power/Portable Applications: IoT,
Embedded/Smart Devices
• Consumer: Home Healthcare, Fitness Devices,
Home Automation
• Automotive: Rear View/Surround View Cameras,
Infotainment System
• Industrial: Building/Factory Automation,
Surveillance Camera
General Description
The DSC60xx family of MEMS oscillators combines
industry-leading low-power consumption, ultra-small
packages with exceptional frequency stability, and jitter
performance over temperature. The single-output
DSC60xx MEMS oscillators are excellent choices for
use as clock references in small, battery-powered
devices such as wearable and Internet of Things (IoT)
devices in which small size, low power consumption,
and long-term reliability are paramount. They also meet
the stringent mechanical durability and reliability
requirements within Automotive Electronics Council
standard Q100 (AEC-Q100), so they are well suited for
under-hood applications as well.
The DSC60xx family is available in ultra-small
1.6 mm x 1.2 mm and 2.0 mm x 1.6 mm packages.
Other package sizes include: 2.5 mm x 2.0 mm and
3.2 mm x 2.5 mm. These packages are “drop-in”
replacements for standard 4-pin CMOS quartz crystal
oscillators.
Package Types
DSC60XX
3.2 mm x 2.5 mm DFN
2.5 mm x 2.0 mm LGA
2.0 mm x 1.6 mm LGA
1.6 mm x 1.2 mm LGA
(Top View)
OE/STBY/FS
4
GND
VDD
OUT
3
2
1
Ultra-Small, Ultra-Low Power MEMS Oscillator
DSC60XX
DS20005625C-page 2 2017-2018 Microchip Technology Inc.
Block Diagrams
DSC6001/03/11/13/21/23/41/43/51/53/61/63
DSC6083 (kHz Output)
MEMS
RESONATOR
TEMP SENSOR
CONTROL &
COMPENSATION
PLL
VCO OUTPUT
DIVIDER DRIVER
SUPPLY
REGULATION
PIN 1
OE/STBY/FS
PIN 2
GND
PIN 4
VDD
PIN 3
OUTPUT
DIGITAL
CONTROL
MEMS
RESONATOR
TEMP SENSOR
CONTROL &
COMPENSATION
PLL
VCO OUTPUT
DIVIDER
SUPPLY
REGULATION
P1
OUTPUT
P2
GND
P4
VDD
P3
DNC
DRIVER
DD :1.av75%m 3.3V +10% TA 0.3 vaD 0.2 vaD
2017-2018 Microchip Technology Inc. DS20005625C-page 3
DSC60XX
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
Input Voltage (VIN) ..............................................................................................................................–0.3V to VDD+0.3V
ESD Protection ............................................................................................................ 4 kV HBM, 400V MM, 2 kV CDM
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to 85°C.
Parameters Symbol Min. Typ. Max. Units Conditions
Supply Voltage Note 1 VDD 1.71 — 3.63 V —
Active Supply Current IDD
—1.3 —
mA
FOUT = 24 MHz, VDD = 1.8V,
No Load
—1.19 —
FOUT = 32.768 kHz
(DSC6083), VDD = 1.8V, No
Load
Power Supply Ramp tPU 0.1 — 100 ms Note 9
Standby Supply Current
Note 2 ISTBY
—12 — µA VDD = 1.8/2.5V
—80 — V
DD = 3.3V
Frequency Stability Note 3 Δf — — ±25
±50 ppm All temp ranges
Aging Δf —— ±5 ppm 1st year @25°C
— — ±1 Per year after first year
Startup Time tSU —— 1.3 ms
From 90% VDD to valid clock
output, T = 25°C
Input Logic Levels Note 4 VIH 0.7 x VDD — — V Input Logic High
VIL — — 0.3 x VDD V Input Logic Low
Output Disable Time
Note 5 tDA — — 200+Period µs —
Output Enable Time
Note 6 tEN —— 1 µs—
Enable Pull-Up Resistor
Note 7 — — 300 — kΩ If configured
Output Logic Levels,
Low Drive
VOH 0.8 x VDD — — V Output Logic High, I = 1 mA
VOL — — 0.2 x VDD V Output Logic Low, I = –1 mA
Note 1: Pin 4 VDD should be filtered with 0.1 µF capacitor.
2: Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at
>3.3V VDD.
3: Includes frequency variations due to initial tolerance, temp. and power supply voltage.
4: Input waveform must be monotonic with rise/fall time < 10 ms
5: Output Disable time takes up to one period of the output waveform + 200 ns.
6: For parts configured with OE, not Standby.
7: Output is enabled if pad is floated or not connected.
8: Output Duty Cycle will be 40% to 60% when output frequency is between 40 MHz to 60 MHz.
9: Time to reach 90% of target VDD. Power ramp rise must be monotonic.
DD :1.8V75%|o 3.3V +10% TA
DSC60XX
DS20005625C-page 4 2017-2018 Microchip Technology Inc.
Output Transition Time
Rise Time/Fall Time
tRX/tFX
—2.5 3.5
ns
DSC60x3
Low Drive,
20% to 80%
CL = 5 pF
VDD = 1.8V
—1.5 2.2 VDD =
2.5V/3.3V
tRY/tFY
—1.2 2.0
ns
DSC60x1
Std. Drive,
20% to 80%
CL = 10 pF
VDD = 1.8V
—0.6 1.2 VDD =
2.5V/3.3V
Frequency f00.002 — 80 MHz Output on Pin 1 for < 1 MHz
Output Duty Cycle, Note 8 SYM 45 — 55 % —
Period Jitter, RMS JPER
—32 40
psRMS
DSC60x3
Low Drive,
FOUT =
27 MHz
VDD = 1.8V
—25 32 VDD =
2.5V/3.3V
—23 30 DSC60x1
Std. Drive,
FOUT =
27 MHz
VDD = 1.8V
—20 28 VDD =
2.5V/3.3V
Cycle-to-Cycle Jitter
(peak) JCy–Cy
— 180 240
ps
DSC60x3
Low Drive,
FOUT =
27 MHz
VDD = 1.8V
— 120 170 VDD =
2.5V/3.3V
— 115 190 DSC60x1,
Std. Drive,
FOUT =
27 MHz
VDD = 1.8V
— 90 150 VDD =
2.5V/3.3V
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to 85°C.
Parameters Symbol Min. Typ. Max. Units Conditions
Note 1: Pin 4 VDD should be filtered with 0.1 µF capacitor.
2: Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at
>3.3V VDD.
3: Includes frequency variations due to initial tolerance, temp. and power supply voltage.
4: Input waveform must be monotonic with rise/fall time < 10 ms
5: Output Disable time takes up to one period of the output waveform + 200 ns.
6: For parts configured with OE, not Standby.
7: Output is enabled if pad is floated or not connected.
8: Output Duty Cycle will be 40% to 60% when output frequency is between 40 MHz to 60 MHz.
9: Time to reach 90% of target VDD. Power ramp rise must be monotonic.
2017-2018 Microchip Technology Inc. DS20005625C-page 5
DSC60XX
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Maximum Junction Temperature TJ— — +150 °C —
Ambient Operating Temperature TA–40 — +85 °C Industrial
Ambient Operating Temperature TA–20 — +70 °C Extended Commercial
Storage Ambient Temperature Range TA–55 — +150 °C —
Soldering Temperature TS— +260 — °C 40 sec. max.
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the max-
imum allowable power dissipation will cause the device operating junction temperature to exceed the max-
imum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
Note 1: DSCSOOx/1x/2x has 300 k0 imerna‘ pullrup resxslor on pxn1. DSCGOAx/Sx/Sx has no imerna‘ pullrup resismr (e : ypass p capacxlor p a as c use my pin as possib‘e.
DSC60XX
DS20005625C-page 6 2017-2018 Microchip Technology Inc.
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1 and Table 2-2.
Note 1: DSC600x/1x/2x has 300 kΩ internal pull-up resistor on pin1. DSC604x/5x/6x has no internal pull-up resistor
on pin1 and needs an external pull-up or to be driven by another chip.
2: Two pre-programmed frequencies can be configured at http://clockworks.microchip.com/timing/.
3: Bypass with 0.1 µF capacitor placed as close to the VDD pin as possible.
Note 1: Bypass with 0.1 µF capacitor placed as close to VDD pin as possible.
2.1 Output Buffer Options
The DSC60xx family is available in multiple output driver configurations.
The low-drive DSC60x3 is configured with a low-power driver that minimizes current consumption and EMI while
delivering greater than 1 mA output current at 20%/80% of the supply voltage. The standard-drive DSC60x1 delivers
greater than 3 mA output current at 20%/80% of the supply voltage.
TABLE 2-1: DSC6001/03/11/13/21/23/41/43/51/53/61/63 PIN FUNCTION TABLE (OUTPUT ≥1 MHZ)
Pin Number Pin Name Pin Type Description
1
OE
I
Output Enable: H = Specified Frequency Output, Note 1
L = Output is high impedance
STBY
Standby: H = Specified Frequency Output, Note 1
L = Output is high impedance, Device is in low power
mode, Supply current is at ISTBY
FS Frequency Select: H = Output Frequency 1, Note 2
L = Output Frequency 2
2 GND Power Power supply ground
3 Output O Oscillator clock output
4 VDD Power Power supply, Note 3
TABLE 2-2: DSC6083 PIN FUNCTION TABLE (OUTPUT FREQUENCY <1 MHZ)
Pin Number Pin Name Pin Type Description
1 Output O Oscillator clock output
2 GND Power Power supply ground
3 DNC DNC Do Not Connect
4 VDD Power Power supply, Note 1
1) C) ”C _F' a on
2017-2018 Microchip Technology Inc. DS20005625C-page 7
DSC60XX
3.0 DIAGRAMS
FIGURE 3-1: Output Waveform.
FIGURE 3-2: Test Circuit.
FIGURE 3-3: Recommended Board Layout.
VOH
VOL
VIL
1/fo
OUTPU
T
ENABLE
tDA
tEN
tF
tR
VIH
VDD
C1
GND
Enable
Output
Via to GND Layer
Via to GND Layer
DSC60XX
DS20005625C-page 8 2017-2018 Microchip Technology Inc.
4.0 SOLDER REFLOW PROFILE
FIGURE 4-1: Solder Reflow Profile.
60-180
Seconds
Temperature (°C)
260
°C
3
°
C/sec max.
217
°C
200
°C
150
°C
25
°C
8 minutes max.
Pre-Heat
3
°
C/sec max.
Reflow
Cool
Time
6
°
C/sec max.
60-150
Seconds
20-40
Seconds
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/sec. max.
Preheat Time 150°C to 200°C 60 to 180 sec.
Time maintained above 217°C 60 to 150 sec.
Peak Temperature 255°C to 260°C
Time within 5°C of actual Peak 20 to 40 sec.
Ramp-Down Rate 6°C/sec. max.
Time 25°C to Peak Temperature 8 minutes max.
EEK TOP VIEW // 0.10 C I I SEATING _ _ _ 7 PLANE 4x I SIDE VIEW @008 # ¢ 0.o7® c AIBI ’I 2 $ om® c I I OTLQLE I _1 D I N I I——D—-I BOTTOM VIEW MicrochIp Technangy Drawing 50471199}! Shem 1 on
2017-2018 Microchip Technology Inc. DS20005625C-page 9
DSC60XX
5.0 PACKAGING INFORMATION
4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline
0.07 C A B
0.03 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1199A Sheet 1 of 2
4X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA]
D
E
B
A
0.05 C
0.05 C
2X
2X
4X L
b2
e
CH
CH
A
(A3)
A1
e1
e1
2
3X b1
3
DSC60XX
DS20005625C-page 10 2017-2018 Microchip Technology Inc.
4-Lead VFLGA 1.6 mm x 1.2 mm Package Outline
Microchip Technology Drawing C04-1199A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Overall Width
Terminal Length
Substrate Thickness (with Terminals)
Terminal Pitch
Standoff
Units
Dimension Limits
A1
A
b2
A3
e
L
E
N
1.20 BSC
0.20 REF
0.325
0.30
0.79
0.00
0.35
0.375
0.84
0.02
1.20 BSC
MILLIMETERS
MIN NOM
4
0.425
0.40
0.89
0.05
MAX
CH 0.125--Terminal 1 Index Chamfer
Overall Length D 1.60 BSC
Terminal Width
b1 0.25 0.30 0.35Terminal Width
Terminal Pitch e1 0.75 BSC
‘ | L
2017-2018 Microchip Technology Inc. DS20005625C-page 11
DSC60XX
4-Lead VFLGA 1.6 mm x 1.2 mm Recommended Land Pattern
RECOMMENDED LAND PATTERN
Dimension Limits
Units
X2
Contact Width
Contact Pitch
MILLIMETERS
1.20 BSC
MIN
E1
MAX
Space Between Contacts (X4)
Contact Pad Length (X6)
G1
Y0.50
Microchip Technology Drawing C04-3199A
NOM
4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA]
SILK SCREEN
12
4
X1Contact Width (X3)
Space Between Contacts (X3) G2 0.25
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
X1
Y
G2
(CH)
CContact Spacing 0.75
0.43
0.35
0.85
Contact 1 Index Chamfer CH 0.13 X 45° REF
C
E2
Contact Pitch 1.16 BSCE2
X2
G1
E1
(DATUM A) \ i (DATUM B) \N NOTE1N7 . .____ ;;///J Q 0,05 c //g E 0.05 0 TOP VIEW 4 WW SEAT‘NG- 4 E J 7 7 PLANE 1 NOTE 1 ’ T {w E2? F BOTTOM VIEW Mmmcmp Techn
DSC60XX
DS20005625C-page 12 2017-2018 Microchip Technology Inc.
4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline
0.07 C A B
0.03 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1200A Sheet 1 of 2
4X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA]
D
E
B
A
0.05 C
0.05 C
2X
2X
4X L
b2
e
CH
CH
A
(A3)
A1
e1
e1
2
3X b1
2017-2018 Microchip Technology Inc. DS20005625C-page 13
DSC60XX
4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline (Continued)
Microchip Technology Drawing C04-1200A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Overall Width
Terminal Length
Substrate Thickness (with Terminals)
Terminal Pitch
Standoff
Units
Dimension Limits
A1
A
b2
A3
e
L
E
N
1.55 BSC
0.20 REF
0.40
0.50
0.79
0.00
0.55
0.45
0.84
0.02
1.60 BSC
MILLIMETERS
MIN NOM
6
0.50
0.60
0.89
0.05
MAX
CH 0.15--Terminal 1 Index Chamfer
Overall Length D 2.00 BSC
Terminal Width
b1 0.30 0.35 0.40Terminal Width
Terminal Pitch e1 0.95 BSC
E]
DSC60XX
DS20005625C-page 14 2017-2018 Microchip Technology Inc.
4-Lead VFLGA 2.0 mm x 1.6 mm Package Outline
RECOMMENDED LAND PATTERN
Dimension Limits
Units
X2
Contact Width (X2)
Contact Pitch
MILLIMETERS
1.55 BSC
MIN
E
MAX
Space Between Contacts (X4)
Contact Pad Length (X6)
G1
Y0.70
Microchip Technology Drawing C04-3200A
NOM
4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA]
SILK SCREEN
12
4
X1Contact Width (X4)
Space Between Contacts (X3) G2 0.25
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
X1
YG2
G1
E
(CH)
CContact Spacing 0.95
0.40
0.50
1.05
Contact 1 Index Chamfer CH 0.13 X 45° REF
C
TUM A) TUM B) // /A \ / NOTE1\XZ-{/jr*i*ii \ Q i I 2 EEE TOP VIEW $ // o, $ SEATING i PLANE 5-- ¢ 7 ‘ z exaggng‘B' 7 \‘4 i,i,i j K§\ *NOTE1/®§4‘ i”i'iE #l i _'T'_ f IN \ |~w\ BOTTOM VIEW
2017-2018 Microchip Technology Inc. DS20005625C-page 15
DSC60XX
4-Lead VLGA 2.5 mm x 2.0 mm Package Outline
0.07 C A B
0.03 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C
0.08 C
Microchip Technology Drawing C04-1202A Sheet 1 of 2
4X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA]
D
E
B
A
0.05 C
0.05 C
2X
2X
4X L
e
CH
CH
A
(A3)
A1
e1
e1
2
4X b1
DSC60XX
DS20005625C-page 16 2017-2018 Microchip Technology Inc.
4-Lead VLGA 2.5 mm x 2.0 mm Package Outline (Continued)
Microchip Technology Drawing C04-1202A Sheet 2 of 2
REF: Reference Dimension, usually without tolerance, for information purposes only.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
1.
2.
3.
Notes:
Pin 1 visual index feature may vary, but must be located within the hatched area.
Package is saw singulated
Dimensioning and tolerancing per ASME Y14.5M
4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Number of Terminals
Overall Height
Overall Width
Terminal Length
Substrate Thickness (with Terminals)
Terminal Pitch
Standoff
Units
Dimension Limits
A1
A
A3
e
L
E
N
1.65 BSC
0.20 REF
0.60
0.79
0.00
0.65
0.84
0.02
2.00 BSC
MILLIMETERS
MIN NOM
4
0.70
0.89
0.05
MAX
CH 0.225--Terminal 1 Index Chamfer
Overall Length D 2.50 BSC
b1 0.60 0.65 0.70Terminal Width
Terminal Pitch e1 1.25 BSC
E]
2017-2018 Microchip Technology Inc. DS20005625C-page 17
DSC60XX
4-Lead VLGA 2.5 mm x 2.0 mm Recommended Land Pattern
RECOMMENDED LAND PATTERN
Dimension Limits
Units
Contact Pitch
MILLIMETERS
1.65 BSC
MIN
E
MAX
Space Between Contacts (X4)
Contact Pad Length (X6)
G1
Y0.80
Microchip Technology Drawing C04-3202A
NOM
4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA]
SILK SCREEN
12
4
XContact Width (X4)
Space Between Contacts (X3) G2 0.45
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M1.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
X
Y
G2C
E
(CH)
CContact Spacing 1.25
0.70
0.95
Contact 1 Index Chamfer CH 0.13 X 45° REF
G1
TITLE DRAWING HCDFN322574LD7PL71 UNIT MM 111,4 '4 , l r" 11,
DSC60XX
DS20005625C-page 18 2017-2018 Microchip Technology Inc.
4-Lead CDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
TITLE
4 LEAD CDFN 3.2x2.5mm COL PACKAGE OUTLINE & RECOMMENDED LAND PATTERN
DRAWING # CDFN3225-4LD-PL-1 UNIT MM
NOTE:
1. Green shaded rectangles in Recommended Land Pattern are solder stencil opening.
2017-2018 Microchip Technology Inc. DS20005625C-page 19
DSC60XX
APPENDIX A: REVISION HISTORY
Revision A (September 2016)
• Initial creation of DSC60xx Microchip data sheet
DS20005625A.
Revision B (September 2017)
• Added Power Supply Ramp value in Electrical
Characteristics table.
• Redrew diagrams for clarity. No technical content
affected.
Revision C (November 2018)
• Added a new condition to the Active Supply
Current parameter with a new typical value in the
Electrical Characteristics table.
DSC60XX
DS20005625C-page 20 2017-2018 Microchip Technology Inc.
NOTES:
xT av! n. x u x.\ x.\ xT 5‘ 5‘ x T PART ND *Vi Dev
2017-2018 Microchip Technology Inc. DS20005625C-page 21
DSC60XX
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Note 1: Please visit Microchip ClockWorks® Configurator Website to configure the part number for customized fre-
quency. http://clockworks.microchip.com/timing/.
Examples:
a) DSC6013JI2A-100.0000:
Ultra–Low Power MEMS Oscillator, Pin1 = Standby
with Internal Pull-Up, Low Drive Strength, 4-Lead
2.5 mm x 2.0 mm VLGA, Industrial Temperature,
±25 ppm Stability, Revision A, 100 MHz Frequency,
100/Bag
b) DSC6001HE1A-016.0000T:
Ultra–Low Power MEMS Oscillator, Pin1 = OE with
Internal Pull–Up, Standard Drive Strength, 4-Lead
1.6 mm x 1.2 mm VFLGA, Extended Commercial
Temp., ±50 ppm Stability, Revision A, 16 MHz
Frequency, 1,000/Reel
c) DSC6021MI2A-005Q:
Ultra–Low Power MEMS Oscillator, Pin1 = Freq. Select
with Internal Pull-Up, Standard Drive Strength, 4-Lead
2.0 mm x 1.6 mm VFLGA, Industrial Temperature,
±25 ppm Stability, Revision A, Two Frequencies
Configured through ClockWorks, 100/Bag
PART NO. X
Package
Device
Device: DSC60xx: Ultra-Low Power MEMS Oscillator
Pin Definition: Selection Pin 1 Internal Pull-Up Register
0 OE Pull-up
1 STDBY Pull-up
2 FS Pull-up
4OENone
5STDBYNone
6FSNone
8kHz
Output
None
Output Drive
Strength:
1
3
Standard
Low
Packages: C = 4-Lead 3.2 mm x 2.5 mm DFN
J = 4-Lead 2.5 mm x 2.0 mm VLGA
M = 4-Lead 2.0 mm x 1.6 mm VFLGA
H = 4-Lead 1.6 mm x 1.2 mm VFLGA
Temperature
Range:
E = –20C to +70C (Extended Commercial)
I= –40C to +85C (Industrial)
Frequency
Stability:
1=± 50 ppm
2=± 25 ppm
Revision: A = Revision A
Frequency: xxx.xxxx = User-Defined Frequency between
001.0000 MHz and 80.0000 MHz
xxxkxxx = User-Defined Frequency between 002.000 kHz
and 999.999 kHz
xxxx = Frequency configuration code when pin 1 = FS.
Configure the part online through ClockWorks
configurator.
Tape and Reel: <blank>= 100/Bag
T = 1,000/Reel
X
Pin 1
Definition
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
X
Output
Drive
Strength
X
Temperature
Range
X
Frequency
Stability
X
Revision
XXX.XXXX
Frequency
X
Tape
and
Reel
–
DSC60XX
DS20005625C-page 22 2017-2018 Microchip Technology Inc.
NOTES:
YSTEM
2017-2018 Microchip Technology Inc. DS20005625C-page 23
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3842-7
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
6‘ ‘MICROCHIP AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
DS20005625C-page 24 2017-2018 Microchip Technology Inc.
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08/15/18

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