NCV8705 Datasheet by ON Semiconductor

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© Semiconductor Components Industries, LLC, 2017
February, 2017 − Rev. 8 1Publication Order Number:
NCV8705/D
NCV8705
500 mA, Ultra-Low
Quiescent Current, IQ 13 mA,
Ultra-Low Noise, LDO
Voltage Regulator
The NCV8705 is a low noise, low power consumption and low
dropout Linear Voltage Regulator. With its excellent noise and PSRR
specifications, the device is ideal for use in products utilizing RF
receivers, imaging sensors, audio processors or any component
requiring an extremely clean power supply. The NCV8705 uses an
innovative Adaptive Ground Current circuit to ensure ultra low
ground current during light load conditions.
Features
•Operating Input Voltage Range: 2.5 V to 5.5 V
•Available − Fixed Voltage Option: 0.8 V to 3.5 V
Available − Adjustable Voltage Option: 0.8 V to 5.5 V−VDROP
•Reference Voltage 0.8 V
•Ultra−Low Quiescent Current of Typ. 13 mA
•Ultra−Low Noise: 12 mVRMS from 100 Hz to 100 kHz
•Very Low Dropout: 230 mV Typical at 500 mA
•±2% Accuracy Over Load/Line/Temperature
•High PSRR: 71 dB at 1 kHz
•Internal Soft−Start to Limit the Turn−On Inrush Current
•Thermal Shutdown and Current Limit Protections
•Stable with a 1 mF Ceramic Output Capacitor
•Active Output Discharge for Fast Turn−Off
•Wettable Flank Package Option Available
•NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applicaitons
•ADAS, Infotainment & Cluster, and Telematics
•General Purpose Automotive & Industrial
•Building & Factory Automation, Smart Meters
Figure 1. Typical Application Schematic
1 mF
NCV8705
IN
EN
GND
OUT
1 mFOFF ON N/C
Fixed Voltage Version
CIN
VIN
COUT
VOUT
NCV8705
IN
EN
GND
OUT
OFF ON ADJ
VIN VOUT
COUT
1 mF
C1
R1
R2
CIN
1 mF
Adjustable Voltage Version
See detailed ordering, marking and shipping information in the
package dimensions section on page 20 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
WDFN6, 2x2
CASE 511BR
PIN CONNECTIONS
WDFN6 2x2 mm
(Top View)
1
2
3
EXP
XX M
1
XX = Specific Device Code
M = Date Code
6
5
4
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DFN8/DFNW8 3x3 mm
(Top View)
1
2
4
EXP
8
7
5
36
OUT
N/C
GND
N/C or ADJ
IN
N/
C
EN
N/
C
8705W
XXX
ALYWG
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
1
DFN8, 3x3
CASE 506DB
8705L
XXX
ALYWG
G
1
DFNW8, 3x3
CASE 507AD
1
NCV8705
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Figure 2. Simplified Schematic Block Diagrams
IN
THERMAL
SHUTDOWN
UVLO
MOSFET
DRIVER WITH
CURRENT LIMIT
AUTO LOW
POWER MODE
INTEGRATED
SOFT−START
ACTIVE
DISCHARGE
EN
BANDGAP
REFERENCE
ENABLE
LOGIC
EN
OUT
GND
IN
THERMAL
SHUTDOWN
UVLO
MOSFET
DRIVER WITH
CURRENT LIMIT
AUTO LOW
POWER MODE
INTEGRATED
SOFT−START
ACTIVE
DISCHARGE
EN
BANDGAP
REFERENCE
ENABLE
LOGIC
EN
OUT
GND
ADJ
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Table 1. PIN FUNCTION DESCRIPTION
Pin
Name
Pin No. −
Fixed
DFN8/DFNW8
Pin No. −
Adjustable
DFN8/DFNW8
Pin No. −
Fixed
WDFN6
Pin No. −
Adjustable
WDFN6 Description
OUT 1 1 1 1 Regulated output voltage pin. A small 1 mF ceramic capac-
itor is needed from this pin to ground to assure stability.
GND 4 4 3 3 Power supply ground. Expose pad must be tied with
GND pin. Soldered to the copper plane allows for effective
heat dissipation.
EN 5 5 4 4 Enable pin. Driving EN over 0.9 V turns on the regulator.
Driving EN below 0.4 V puts the regulator into shutdown
mode.
IN 8 8 6 6 Input pin. A small capacitor is needed from this pin to
ground to assure stability.
ADJ − 3 − 2 Feedback pin for set−up output voltage. Use resistor di-
vider for voltage selection.
N/C 2, 3, 6, 7 2, 6, 7 2, 5 5Not connected. This pin can be tied to ground to improve
thermal dissipation.
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 V to 6 V V
Output Voltage VOUT −0.3 V to VIN + 0.3 V V
Enable Input VEN −0.3 V to VIN + 0.3 V V
Adjustable Input VADJ −0.3 V to VIN + 0.3 V V
Output Short Circuit Duration tSC Indefinite s
Maximum Junction Temperature TJ(MAX) 125 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
Table 3. THERMAL CHARACTERISTICS (Note 3)
Rating Symbol Value Unit
Thermal Characteristics, WDFN6 2x2 mm
Thermal Resistance, Junction−to−Air
Thermal Resistance Parameter, Junction−to−Board qJA
YJB
116.5
30
°C/W
Thermal Characteristics, DFN8 3x3 mm / DFNW8 3x3 mm
Thermal Resistance, Junction−to−Air
Thermal Resistance Parameter, Junction−to−Board qJA
YJB
92.6
35.1
°C/W
3. Single component mounted on 1 oz, FR 4 PCB with 645 mm2 Cu area.
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Table 4. ELECTRICAL CHARACTERISTICS
−40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 0.5 V or 2.5 V, whichever is greater; VEN = 0.9 V, IOUT = 10 mA, CIN = COUT = 1 mF unless
otherwise noted. Typical values are at TJ = +25°C. (Note 4)
Parameter Test Conditions Symbol Min Typ Max Unit
Operating Input Voltage VIN 2.5 5.5 V
Output Voltage Range (Adjustable) VOUT 0.8 5.5−
VDO
V
Undervoltage Lock−out VIN rising UVLO 1.2 1.6 1.9 V
Output Voltage Accuracy VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 0 − 500 mA VOUT −2 +2 %
Reference Voltage VREF 0.8 V
Reference Voltage Accuracy IOUT = 10 mA VREF −2 +2 %
Line Regulation VOUT + 0.5 V ≤ VIN ≤ 4.5 V, IOUT = 10 mA
VOUT + 0.5 V ≤ VIN ≤ 5.5 V, IOUT = 10 mA RegLINE 550
750 mV/V
Load Regulation IOUT = 0 mA to 500 mA RegLOAD 12 mV/mA
Load Transient IOUT = 1 mA to 500 mA or 500 mA to 1 mA in
1 ms, COUT = 1 mFTranLOAD ±120 mV
Dropout Voltage (Note 5) IOUT = 500 mA, VOUT(nom) = 2.8 V VDO 230 350 mV
Output Current Limit VOUT = 90% VOUT(nom) ICL 510 750 950 mA
Quiescent Current IOUT = 0 mA IQ13 25 mA
Ground Current IOUT = 500 mA IGND 260 mA
Shutdown Current VEN ≤ 0.4 V, TJ = +25°C IDIS 0.12 mA
VEN ≤ 0 V, VIN = 2.0 to 4.5 V, TJ = −40 to +85°C IDIS 0.55 2 mA
EN Pin Threshold Voltage
High Threshold
Low Threshold VEN Voltage increasing
VEN Voltage decreasing VEN_HI
VEN_LO
0.9 0.4
V
EN Pin Input Current VEN = 5.5 V IEN 100 500 nA
ADJ Pin Current VADJ = 0.8 V 1 nA
Turn−On Time COUT = 1.0 mF, from assertion EN pin to 98%
VOUT(nom)
tON 150 ms
Power Supply Rejection Ratio VIN = 3.8 V, VOUT = 2.8 V
(Fixed), IOUT = 500 mA f = 100 Hz
f = 1 kHz
f = 10 kHz
PSRR 73
71
56
dB
Output Noise Voltage VOUT = 2.5 V (Fixed), VIN = 3.5 V, IOUT = 500 mA
f = 100 Hz to 100 kHz VN12 mVrms
Thermal Shutdown Temperature Temperature increasing from TJ = +25°C TSD 160 °C
Thermal Shutdown Hysteresis Temperature falling from TSD TSDH − 20 − °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TJ = TA
= 25_C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
5. Characterized when VOUT falls 100 mV below the regulated voltage at VIN = VOUT(NOM) + 0.5 V.
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TYPICAL CHARACTERISTICS
Figure 3. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 1 mF
FREQUENCY (kHz)
10001010.10.01
0.001
0.01
0.1
1
10
Figure 4. Output Voltage Noise Spectral Density for VOUT = 0.8 V, COUT = 10 mF
Figure 5. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 1 mF
OUTPUT VOLTAGE NOISE (mV/rtHz)
VIN = 2.5 V
VOUT = 0.8 V
CIN = COUT = 1 mF
MLCC, X7R,
1206 size
IOUT = 10 mA
IOUT = 300 mA
IOUT = 500 mA
10 mA 19.06 18.21
100 mA 15.99 15.04
300 mA 14.42 13.39
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
FREQUENCY (kHz)
0.001
0.01
0.1
1
10
OUTPUT VOLTAGE NOISE (mV/rtHz)
FREQUENCY (kHz)
0.001
0.01
0.1
1
10
OUTPUT VOLTAGE NOISE (mV/rtHz)
VIN = 3.8 V
VOUT = 3.3 V
CIN = COUT = 1 mF
MLCC, X7R,
1206 size
500 mA 13.70 12.60
10 mA 16.17 15.28
100 mA 16.41 15.65
300 mA 14.94 14.10
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
500 mA 14.08 13.11
10 mA 18.12 15.39
100 mA 16.42 13.50
300 mA 16.35 12.47
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
500 mA 16.00 12.10
100
10001010.10.01 100
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF
COUT = 10 mF
MLCC, X7R,
1206 size
IOUT = 10 mA
IOUT = 300 mA
IOUT = 100 mA
IOUT = 500 mA
10001010.10.01 100
IOUT = 300 mA
IOUT = 500 mA
IOUT = 100 mA
IOUT = 10 mA
IOUT = 100 mA
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TYPICAL CHARACTERISTICS
Figure 6. Output Voltage Noise Spectral Density for VOUT = 3.3 V, COUT = 10 mF
FREQUENCY (kHz)
10001010.10.01
0.001
0.01
0.1
1
10
OUTPUT VOLTAGE NOISE (mV/rtHz)
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 10 mF
MLCC, X7R,
1206 size
IOUT = 10 mA IOUT = 100 mA
IOUT = 500 mA
1 mA 17.35 14.07
100 mA 17.43 14.29
300 mA 16.55 13.33
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
500 mA 16.48 13.20
100
IOUT = 300 mA
Figure 7. Output Voltage Noise Spectral Density for Adjustable Version – Different Output Voltage
FREQUENCY (kHz)
10001010.10.01
0.001
0.01
0.1
1
10
OUTPUT VOLTAGE NOISE (mV/rtHz)
VIN = VOUT =+1 V
CIN = 1 mF
COUT = 10 mF
IOUT = 10 mA
VOUT = 3.3 V, R1 = 25k,
R2 = 8.2k
1.5 V 31.40 30.33
3.3 V 49.14 44.30
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
VOUT
100
VOUT = 1.5 V, R1 = 15k,
R2 = 13k
Figure 8. Output Voltage Noise Spectral Density for Adjustable Version for Various C1
FREQUENCY (kHz)
10001010.10.01
0.001
0.01
0.1
1
10
OUTPUT VOLTAGE NOISE (mV/rtHz)
none 50.17 43.85
100 pF 46.90 40.39
1 nF 36.92 27.99
10 Hz − 100 kHz 100 Hz − 100 kHz
RMS Output Noise (mV)
IOUT
10 nF 27.02 18.31
100
C1 = none
C1 = 100 pF
C1 = 1 nF
C1 = 10 nF
VIN = 4.3 V
VOUT = 3.3 V
R1 = 255k, R2 = 82k
CIN = COUT = 1 mF
IOUT = 10 mA
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TYPICAL CHARACTERISTICS
Figure 9. Ground Current vs. Output Current Figure 10. Ground Current vs. Output Current
from 0 mA to 2 mA
IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA)
500450200150100500
450
Figure 11. Ground Current vs. Output Current
at Temperatures Figure 12. Ground Current vs. Output Current
0 mA to 2 mA at Temperature
IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA)
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
160
160
300
400
350
300
250
200
150
100
50
0250 400350300
VOUT = 0.8 V
VOUT = 3.3 V
VOUT = 2.5 V
140
120
100
80
60
40
20
020 1.751.51.2510.750.50.25
VOUT = 2.5 V
VOUT = 3.3 V
VOUT = 0.8 V
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
250
200
150
100
50
0500450200150100500 250 400350300
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
TJ = 125°C
TJ = −40°C
TJ = 25°C
20 1.751.51.2510.750.50.25
TJ = 125°C
TJ = 25°C
TJ = −40°C
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
140
120
100
80
60
40
20
0
Figure 13. Quiescent Current vs. Temperature Figure 14. Dropout Voltage vs. Output Current
at Temperature (2.5 V)
TJ, JUNCTION TEMPERATURE (°C) IOUT, OUTPUT CURRENT (mA)
1401201008060−20 0−40
16
500350300250150100500
320
IQ, QUIESCENT CURRENT (mA)
VDROP, DROPOUT VOLTAGE (mV)
200 400 450
TJ = 25°C
TJ = −40°C
TJ = 125°C
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VOUT = 0.8 V
VOUT = 2.5 V
VOUT = 3.3 V
14
12
10
8
6
4
2
04020
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
280
240
200
160
120
80
40
0
MLCC X7R
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TYPICAL CHARACTERISTICS
Figure 15. Dropout Voltage vs. Output Current
at Temperatures (3.3 V) Figure 16. Dropout Voltage vs. Temperature
(2.5 V)
IOUT, OUTPUT CURRENT (mA) TJ, JUNCTION TEMPERATURE (°C)
400
Figure 17. Dropout Voltage vs. Temperature,
(3.3 V) Figure 18. Input Voltage vs. Output Voltage
TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V)
54210
4
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
VOUT, OUTPUT VOLTAGE (V)
TJ = 25°C
TJ = −40°C
TJ = 125°C
36
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
500350300250150100500 200 400 450
320
280
240
200
160
120
80
40
0
350
300
250
200
150
100
50
01401201008060−20 0−40 4020
IOUT = 500 mA
IOUT = 300 mA
IOUT = 0 mA
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
1401201008060−20 0−40 4020
400
350
300
250
200
150
100
50
0
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size IOUT = 500 mA
IOUT = 300 mA
IOUT = 0 mA
3.5
3
2.5
2
1.5
1
0.5
0
IIN = 0 mA
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VOUT = 0.8 V
VOUT = 2.5 V
VOUT = 3.3 V
Figure 19. Output Voltage vs. Temperature,
(0.8 V) Figure 20. Output Voltage vs. Temperature,
(2.5 V)
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201008040200−20−40
0.8014
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
60 140 1201008040200−20−40 60 140
1.804
VIN = 2.5 V
VOUT = 0.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0.8012
0.8010
0.8008
0.8006
0.8004
0.8002
0.8000
0.7998
0.7996
0.7994
0.7992
0.7990
1.803
1.802
1.801
1.800
1.799
1.798
1.797
1.796
1.795
1.794
1.793
1.792
VIN = 3 V
VOUT = 2.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
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TYPICAL CHARACTERISTICS
Figure 21. Output Voltage vs. Temperature,
(3.3 V) Figure 22. Line Regulation vs. Temperature,
(1.8 V)
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201008040200−20−40
3.305
Figure 23. Line Regulation vs. Temperature,
(3.3 V) Figure 24. Load Regulation vs. Temperature,
(1.8 V)
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
VOUT, OUTPUT VOLTAGE (V)
REGLOAD, LOAD REGULATION (mV/mA)
60 140 1201008040200−20−40
700
REGLINE, LINE REGULATION (mV/V)
60 140
1201008040200−20−40
1200
REGLINE, LINE REGULATION (mV/V)
60 140 1201008040200−20−40
8
60 140
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
3.304
3.303
3.302
3.301
3.300
3.299
3.298
3.297
3.296
3.295
3.294
3.293
680
660
640
620
600
580
560
540
520
500
VIN = 2.5 V
VOUT = 1.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
1150
1050
1000
950
900
850
800
750
700
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VIN = 2.5 V
VOUT = 1.8 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
7
6
5
4
3
2
1
0
Figure 25. Load Regulation vs. Temperature,
(3.3 V) Figure 26. Disable Current vs. Temperature
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201006040200−20−40
8
REGLOAD, LOAD REGULATION (mV/mA)
80 140 1201006040200−20−40
0.3
IDIS, DISABLE CURRENT (mA)
80 140
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
7
6
5
4
3
2
1
0
0.25
0.2
0.15
0.1
0.05
0
−0.05
VEN ≤ 0.4 V
RL = 330 W
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VIN = 4.5 V
VIN = 2.3 V
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TYPICAL CHARACTERISTICS
Figure 27. Enable Current vs. Temperature Figure 28. Current Limit vs. Temperature
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201008040200−20−40
120
Figure 29. Short−Circuit vs. Temperature Figure 30. Short−Circuit Current vs.
Temperature
TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V)
IEN, CURRENT TO ENABLE PIN (nA)ISC, SHORT−CIRCUIT CURRENT (mA)
ISC, SHORT−CIRCUIT CURRENT (mA)
60 140 1201008040200−20−40
750
ICL, CURRENT LIMIT (mA)
60 140
1201008040200−20−40
800
60 140 2.5 3.00 5.50
100
80
60
40
20
0
VIN = 3.8 V
VOUT = 3.3 V
RL = 330 W
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VEN = 5.5 V
VEN = 0.4 V
735
720
705
690
675
660
645
630
615
600
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VOUT = 1.8 V
VOUT = 3.3 V
780
760
740
720
700
680
660
640
620
600
VIN = VOUT + 0.5 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
VOUT = 3.3 V
VOUT = 1.8 V
800
780
760
740
720
700
680
660
640
620
600
VOUT = 0.8 V
CIN = 1 mF
COUT = 1 mF
MLCC, X7R
1206 size
3.50 4.00 4.50 5.00
Figure 31. Enable Threshold (High) Figure 32. Enable Threshold (Low)
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201006040200−20−40
1
VEN, ENABLE VOLTAGE (V)
80 140 1201006040200−20−40
VEN, ENABLE VOLTAGE (V)
80 140
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
NCV8705
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11
TYPICAL CHARACTERISTICS
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
Figure 33. Discharge Resistance vs.
Temperature Figure 34. Start−up Time vs. Temperature
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
1201008040200−20−40
400
Figure 35. Power Supply Rejection Ratio,
VOUT = 1.8 V Figure 36. Power Supply Rejection Ratio,
VOUT = 2.8 V
FREQUENCY (kHz) FREQUENCY (kHz)
RDIS, ACTIVE DISCHARGE RESISTANCE (Ω)
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
60 140 1201008040200−20−40
250
tSTART−UP
, START−UP TIME (ms)
60 140
0.01
80
10k
90
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
390
380
370
360
350
340
330
320
310
300
VIN = 3.8 V
VOUT = 3.3 V
COUT = 1 mF
CIN = 1 mF
MLCC, X7R,
1206 size
240
230
220
210
200
190
180
170
160
150
0.1 1 10 100 1k
70
60
50
40
30
20
10
0
VIN = 2.8 V + 100 mVPP
VOUT = 1.8 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
0.01 10k0.1 1 10 100 1k
80
70
60
50
40
30
20
10
0
VIN = 3.8 V + 100 mVPP
VOUT = 2.8 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
IOUT = 10 mA
IOUT = 100 mA
IOUT = 300 mA
IOUT = 500 mA
Figure 37. Power Supply Rejection Ratio,
VOUT = 3.3 V Figure 38. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 10 mA − Different COUT
FREQUENCY (kHz) FREQUENCY (kHz)
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
0.01
100
10k
90
0.1 1 10 100 1k
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
COUT = 1 mF
CIN = none
MLCC, X7R,
1206 size
0.01 10k0.1 1 10 100 1k
80
70
60
50
40
30
20
10
0
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
CIN = none
MLCC, X7R,
1206 size
COUT = 1 mF
COUT = 4.7 mF
COUT = 10 mF
90
80
70
60
50
40
30
20
10
0
NCV8705
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12
TYPICAL CHARACTERISTICS
Figure 39. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 500 mA − Different COUT
FREQUENCY (kHz)
RR, RIPPLE REJECTION (dB)
0.01
100
10k0.1 1 10 100 1k
90
80
70
60
50
40
30
20
10
0
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
ILOAD = 500 mA
CIN = none
MLCC, X7R,
1206 size
COUT = 1 mF
COUT = 4.7 mF
COUT = 10 mF
Figure 40. Power Supply Rejection Ratio,
VOUT = 3.3 V, IOUT = 500 mA − Different COUT
FREQUENCY (kHz)
RR, RIPPLE REJECTION (dB)
0.01 10k0.1 1 10 100 1k
80
70
60
50
40
30
20
10
0
C1 = none
C1 = 100 pF
C1 = 1 nF
C1 = 10 nF
C1 = 100 nF
VIN = 4.3 V + 100 mVPP
VOUT = 3.3 V
R1 = 225k, R2 = 82k
ILOAD = 10 mA
COUT = 1 mF MLCC,
X7R, 1206 size
Figure 41. Output Capacitor ESR vs. Output
Current
IOUT, OUTPUT CURRENT (mA)
ESR, EQUIVALENT SERIAL RESISTANCE (W)
100
10
1
0.1
0.010 50050 150 400100 450200 350300250
VOUT = 0.8 V
VOUT = 3.3 V
UNSTABLE REGION
STABLE REGION
Figure 42. Enable Turn−on Response,
COUT = 1 mF, IOUT = 10 mA Figure 43. Enable Turn−on Response,
COUT = 1 mF, IOUT = 500 mA
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 500 mA
500 mV/div1 V/div
200 mA/div
IINRUSH
100 ms/div
VEN
VOUT
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 1 mF
CIN = 1 mF
IOUT = 500 mA
200 mA/div
500 mV/div1 V/div
VEN
IINRUSH
VOUT
100 ms/div
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NCV8705
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13
TYPICAL CHARACTERISTICS
Figure 44. Enable Turn−on Response,
COUT = 10 mF, IOUT = 10 mA
500 mV/div1 V/div
200 mA/div
IINRUSH
100 ms/div
VEN
VOUT
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 10 mF
CIN = 1 mF
IOUT = 500 mA
200 mA/div
500 mV/div1 V/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
COUT = 10 mF
CIN = 1 mF
IOUT = 500 mA
Figure 45. Enable Turn−on Response,
COUT = 10 mF, IOUT = 500 mA
100 ms/div
IINRUSH
VEN
VOUT
500 mV/div20 mV/div
Figure 46. Line Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 10 mA
5 ms/div
VIN = 2.5 V
VOUT = 0.8 V
VEN = 1 V
IOUT = 10 mA
tRISE = 1 ms
COUT = 1 mF
COUT = 10 mF
VEN
VOUT
Figure 47. Line Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 10 mA
5 ms/div
500 mV/div20 mV/div
VIN = 2.5 V
VOUT = 0.8 V
VEN = 1 V
IOUT = 10 mA
COUT = 1 mF
COUT = 10 mF
tFALL = 1 ms
VEN
VOUT
500 mV/div20 mV/div
Figure 48. Line Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 10 mA
10 ms/div
COUT = 1 mF
COUT = 10 mF
tRISE = 1 msVEN
VOUT
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 10 mA
Figure 49. Line Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 10 mA
10 ms/div
500 mV/div20 mV/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 10 mA
tFALL = 1 ms
COUT = 10 mF
COUT = 1 mF
VOUT
VEN
NCV8705
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TYPICAL CHARACTERISTICS
500 mV/div20 mV/div
Figure 50. Line Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 500 mA
5 ms/div
COUT = 1 mF
tRISE = 1 ms
VEN
VOUT
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 500 mA
COUT = 10 mF
Figure 51. Line Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 500 mA
10 ms/div
500 mV/div20 mV/div
VIN = 3.8 V
VOUT = 3.3 V
VEN = 1 V
IOUT = 500 mA
tFALL = 1 ms
COUT = 1 mF
COUT = 10 mF
VEN
VOUT
200 mA/div100 mV/div
Figure 52. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
10 ms/div
COUT = 1 mF
COUT = 10 mF
tRISE = 1 ms
VOUT
IOUT
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 10 mF
COUT = 1 mF
tFALL = 1 ms
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
Figure 53. Load Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
100 ms/div
VOUT
IOUT
200 mA/div50 mV/div
200 mA/div100 mV/div
Figure 54. Load Transient Response − Rising
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
tRISE_IOUT = 1 ms, 10 ms
10 ms/div
tRISE_IOUT = 10 ms
tRISE_IOUT = 1 ms
VOUT
IOUT
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
Figure 55. Load Transient Response − Falling
Edge, VOUT = 0.8 V, IOUT = 1 mA to 500 mA,
tFALL_IOUT = 1 ms, 10 ms
10 ms/div
tFALL_IOUT = 1 ms
tFALL_IOUT = 10 ms
200 mA/div50 mV/div
VOUT
IOUT
VIN = 2.5 V
VOUT = 0.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
NCV8705
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TYPICAL CHARACTERISTICS
200 mA/div100 mV/div
Figure 56. Load Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
5 ms/div
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF
COUT = 10 mF
VOUT
IOUT
Figure 57. Load Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
COUT = 1 mF, 10 mF
50 ms/div
200 mA/div50 mV/div
VOUT
IOUT
COUT = 10 mF
COUT = 1 mF
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
200 mA/div50 mV/div
Figure 58. Load Transient Response − Rising
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
tRISE_IOUT = 1 ms, 10 ms
10 ms/div
Figure 59. Load Transient Response − Falling
Edge, VOUT = 3.3 V, IOUT = 1 mA to 500 mA,
tFALL_IOUT = 1 ms, 10 ms
50 ms/div
tRISE_IOUT = 10 ms
tRISE_IOUT = 1 ms
VOUT
IOUT
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VIN = 3.8 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
IOUT
tFALL_IOUT = 10 ms
tFALL_IOUT = 1 ms
200 mA/div50 mV/div
VOUT
VIN
VIN = 3.3 V
IOUT = 1 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
600 mV/div
Figure 60. Turn−on/off, Slow Rising VIN
5 ms/div
Figure 61. Short−Circuit and Thermal
Shutdown
20 ms/div
1 V/div500 mA/div
IOUT
VOUT
Short−Circuit
Thermal Shutdown
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
NCV8705
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TYPICAL CHARACTERISTICS
Figure 62. Short−Circuit Current Peak
50 ms/div
1 V/div500 mA/div
IOUT
VOUT
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
500 mA/div1 V/div
Figure 63. Enable Turn−off
5 ms/div
VIN = 5.5 V
VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
COUT = 1 mF
COUT = 10 mF
VEN
VOUT
OUT
NCV8705
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17
APPLICATIONS INFORMATION
General
The NCV8705 is a high performance 500 mA Low
Dropout Linear Regulator. This device delivers excellent
noise and dynamic performance. Thanks to its adaptive
ground current feature the device consumes only 13 mA of
quiescent current at no*load condition. The regulator
features ultra*low noise of 12 mVRMS, PSRR of 71 dB at
1 kHz and very good load/line transient performance. Such
excellent dynamic parameters and small package size make
the device an ideal choice for powering the precision analog
and noise sensitive circuitry in portable applications. The
LDO achieves this ultra low noise level output without the
need for a noise bypass capacitor. A logic EN input provides
ON/OFF control of the output voltage. When the EN is low
the device consumes as low as typ. 10 nA from the IN pin.
The device is fully protected in case of output overload,
output short circuit condition and overheating, assuring a
very robust design.
Input Capacitor Selection (CIN)
It is recommended to connect a minimum of 1 mF Ceramic
X5R or X7R capacitor close to the IN pin of the device. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the min. /max. ESR of the input
capacitor but it is recommended to use ceramic capacitors
for their low ESR and ESL. A good input capacitor will limit
the influence of input trace inductance and source resistance
during sudden load current changes. Larger input capacitor
may be necessary if fast and large load transients are
encountered in the application.
Output Decoupling (COUT)
The NCV8705 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
minimal capacitor value is 1 mF and X7R or X5R dielectric
due to its low capacitance variations over the specified
temperature range. The NCV8705 is designed to remain
stable with minimum effective capacitance of 1 mF to
account for changes with temperature, DC bias and package
size. Especially for small package size capacitors such as
0402 the effective capacitance drops rapidly with the
applied DC bias. Refer to the Figure 64, for the capacitance
vs. package size and DC bias voltage dependence.
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 900 mΩ. Larger
output capacitors and lower ESR could improve the load
transient response or high frequency PSRR as shown in
typical characteristics. It is not recommended to use
tantalum capacitors on the output due to their large ESR. The
equivalent series resistance of tantalum capacitors is also
strongly dependent on the temperature, increasing at low
temperature. The tantalum capacitors are generally more
costly than ceramic capacitors.
Figure 64. Capacitance Change vs. DC Bias
1206
0805
0603
0402
DC BIAS (V)
CAPACITY CHANGE (%)
010198762345
10
0
−10
−20
−30
−40
−50
−60
−70
−80
Package Size
No−load Operation
The regulator remains stable and regulates the output
voltage properly within the ±2% tolerance limits even with
no external load applied to the output.
Adjustable Operation
The output voltage range can be set from 0.8 V to
5.5 V−VDO by resistor divider network. Use Equations 1
and 2 to calculate appropriate values of resistors and output
voltage. Typical current to ADJ pin is 1 nA. For output
voltage 0.8 V ADJ pin can be tied directly to Vout pin.
VOUT +0.8 @ǒ1)R1
R2Ǔ)R1@IADJ (eq. 1)
R2^R1@1
VOUT
0.8 *1
(eq. 2)
The resistor divider should be designed carefully to
achieve the best performance. Recommended current
through divider is 10 mA and more. Too high values of
resistors (MW) cause increasing noise and longer start−up
time. The suggested values of the resistors are in Table 5. To
improve dynamic performance capacitor C1 should be at
least 1 nF. Recommended range of capacity is between
10 nF and 100 nF. Higher value of capacitor C1 increasing
start−up time.
Table 5. Proposal Resistor Values for Various VOUT
VOUT R1 R2
1.5 V 130k 150k
3.3 V 256k 82k
5.0 V 430k 82k
O °_ iw 1 Figure 65 |_. 'H—H—- / //
NCV8705
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18
Figure 65. NCV8705 Adjustable with Noise
Improvement Capacitor
NCV8705
IN
EN
GND
OUT
OFF ON ADJ
V
IN
V
OUT
COUT
1 mF
C1
R1
R2
CIN
1
mF
Enable Operation
The NCV8705 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage >0.9 V the device is guaranteed to
be enabled. The NCV8705 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 110 nA which assures that the device is
turned−off when the EN pin is not connected. Build in 2 mV
hysteresis into the EN prevents from periodic on/off
oscillations that can occur due to noise.
In the case where the EN function isn’t required the EN
should be tied directly to IN.
Undervoltage Lockout
The internal UVLO circuitry assures that the device
becomes disabled when the VIN falls below typ. 1.5 V. When
the VIN voltage ramps−up the NCV8705 becomes enabled, if
VIN rises above typ. 1.6 V. The 100 mV hysteresis prevents
from on/off oscillations that can occur due to noise on VIN line.
Output Current Limit
Output Current is internally limited within the IC to a
typical 750 mA. The NCV8705 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 800 mA (typ). The current limit and
short circuit protection will work properly up to
VIN = 5.5 V at TA = 125°C. There is no limitation for the
short circuit duration.
Internal Soft−Start circuit
NCV8705 contains an internal soft−start circuitry to
protect against large inrush currents which could otherwise
flow during the start−up of the regulator. Soft−start feature
protects against power bus disturbances and assures a
controlled and monotonic rise of the output voltage.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCV8705 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
The maximum power dissipation the NCV8705 can
handle is given by:
PD(MAX) +ƪTJ(MAX) *TAƫ
qJA
(eq. 3)
The power dissipated by the NCV8705 for given
application conditions can be calculated from the following
equations:
PD[VINǒIGND@IOUTǓ)IOUTǒVIN *VOUTǓ(eq. 4)
Figure 66. qJA and PD(MAX) vs. Copper Area (WDFN6)
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
80
100
120
140
160
180
200
220
0 100 200 300 400 500 600 700
COPPER HEAT SPREADER AREA (mm2)
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), MAXIMUM POWER
DISSIPATION (W)
PD(MAX), TA = 25°C, 1 oz Cu
qJA, 1 oz Cu
qJA, 2 oz Cu
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NCV8705
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19
Figure 67. qJA and PD(MAX) vs. Copper Area (DFN8/DFNW8)
0
0.3
0.6
0.9
1.2
1.5
1.8
0
50
100
150
200
250
300
0 100 200 300 400 500 600 700
COPPER HEAT SPREADER AREA (mm2)
qJA, JUNCTION−TO−AMBIENT
THERMAL RESISTANCE (°C/W)
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), MAXIMUM POWER
DISSIPATION (W)
PD(MAX), TA = 25°C, 1 oz Cu
qJA, 1 oz Cu
qJA, 2 oz Cu
Reverse Current
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
Load Regulation
The NCV8705 features very good load regulation of
maximum 2 mV in 0 mA to 500 mA range. In order to
achieve this very good load regulation a special attention to
PCB design is necessary. The trace resistance from the OUT
pin to the point of load can easily approach 100 mW which
will cause 50 mV voltage drop at full load current,
deteriorating the excellent load regulation.
Line Regulation
The IC features very good line regulation of 0.75 mV/V
measured from VIN = VOUT + 0.5 V to 5.5V. For battery
operated applications it may be important that the line
regulation from VIN = VOUT + 0.5 V up to 4.5 V is only
0.55 mV/V.
Power Supply Rejection Ratio
The NCV8705 features very good Power Supply
Rejection ratio. If desired the PSRR at higher frequencies in
the range 100 kHz – 10 MHz can be tuned by the selection
of COUT capacitor and proper PCB layout.
Output Noise
The IC is designed for ultra−low noise output voltage
without external noise filter capacitor (Cnr). Figures 3 − 6
shows NCV8705 noise performance. Generally the noise
performance in the indicated frequency range improves with
increasing output current.
Turn−On Time
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
PCB Layout Recommendations
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 capacitors. Larger
copper area connected to the pins will also improve the
device thermal resistance. The actual power dissipation can
be calculated from the equation above (Equation 4).
NCV8705
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20
ORDERING INFORMATION
Device Voltage Option Marking Package Feature Shipping†
NCV8705MT12TCG 1.2 V VF
WDFN6
(Pb−Free) Non−Wettable Flank 3000 / Tape & Reel
NCV8705MT18TCG 1.8 V VA
NCV8705MT28TCG 2.8 V VC
NCV8705MT30TCG 3.0 V VD
NCV8705MT33TCG 3.3 V VE
NCV8705MTADJTCG Adjustable VJ
NCV8705MW12TCG 1.2 V 8705W
120
DFN8
(Pb−Free) Wettable Flank,
SFS Process 3000 / Tape & Reel
NCV8705MW18TCG 1.8 V 8705W
180
NCV8705MW28TCG 2.8 V 8705W
280
NCV8705MW30TCG 3.0 V 8705W
300
NCV8705MW33TCG 3.3 V 8705W
330
NCV8705MWADJTCG Adjustable 8705W
ADJ
NCV8705ML33TCG 3.3 V 8705L
330 DFNW8
(Pb−Free) Wettable Flank,
SLP Process 3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
D2 1‘3LL 7+7 , £2 DEYAIL A Ei—J b “7:20.an 0.05 BOTTOM VIEW 0 www.0nsemi.com
NCV8705
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21
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511BR
ISSUE B
MOUNTING FOOTPRINT*
RECOMMENDED
DIMENSIONS: MILLIMETERS
6X
0.45
2.30
1.12
1.72
0.65
PITCH
6X 0.40
1
PACKAGE
OUTLINE
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.25 mm FROM
THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. FOR DEVICES CONTAINING WETTABLE FLANK
OPTION, DETAIL A ALTERNATE CONSTRUCTION
A-2 AND DETAIL B ALTERNATE CONSTRUCTION
B-2 ARE NOT APPLICABLE.
SEATING
PLANE
D
E
0.10 C
A3
A
A1
0.10 C DIM
A
MIN MAX
MILLIMETERS
0.70 0.80
A1 0.00 0.05
A3 0.20 REF
b0.25 0.35
D2.00 BSC
D2 1.50 1.70
0.90 1.10
E2.00 BSC
E2
e0.65 BSC
0.20 0.40
L
PIN ONE
REFERENCE
0.05 C
0.05 C
NOTE 4
A0.10 C
NOTE 3
L
e
D2
E2
b
B
3
66X
1
4
0.05 C
BOTTOM VIEW
L1
DETAIL A
L
ALTERNATE
CONSTRUCTIONS
L
DETAIL A
DETAIL B
A
B
TOP VIEW
C
SIDE VIEW --- 0.15
L1
6X
M
M
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
A1
A3
ALTERNATE B−2ALTERNATE B−1
ALTERNATE A−2ALTERNATE A−1
NCV8705 PACKAGE DIMENSIONS DFN8, 3x3, 0.65F CASE 506DB ISSUE A ms I DIMENSIONING AND TOLERANCING PER ASME m 5M I956 '- 2 CONTROLLING DIMENSION MILLIMETERS I 3 DIMENSION b APPLIES TO PLATED IERMINAL I DETAIL A PAD AS WELL AS mg TERMINALS 7 7 , 7 El MILUMEYERS I I mg DIM MIN m A man I an m mm nus A A3 oanEF ’ \ h 025M295 REFEH‘EfiSE\ 2x Q 0.III C I L- ‘ TOPVIEW T\“‘7—r I: 300350 \/ m 155 I ma 2x a- A E 3 an 850 / 0.05 c “7"“ (A3) 7 :2 Ha I Isa / IV DETAIL e 055 BSC / Q 0.05 C NOYEA L use I an L1 man I m5 SIDE VIEW D2 RECOMMENDED SOLDERING FOOTPFIINT‘ DEYAIL A PACKAGE oumNE I ’7 a wwm mm , sz $0“) CAIBI 565,1 PE F040 0.115 c NOTE: ' BOTTOM VIEW PITCH DIMENSIONS MILLIMETERS 'Fur addmona‘ \nIurmamn on our PbrFree slialegy and soldering delaiIs pIease download me ON Semiconduclm Soldenng and Mounhng Techmques ReIerence ManuaI, SOLDERRM/D.
NCV8705
www.onsemi.com
22
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506DB
ISSUE A
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
SOLDERING FOOTPRINT*
8X
0.63
3.30
1.64
0.40
1
0.65
PITCH
3.30
12X
DIMENSIONS: MILLIMETERS
2.05
0.65
PITCH
PACKAGE
OUTLINE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
E
D
D2
E2
BOTTOM VIEW
b
e
8X
0.10 B
0.05
AC
CNOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.10 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
8X
14
58
DIM MIN MAX
MILLIMETERS
A0.80 1.00
A1 0.00 0.05
A3 0.20 REF
b0.25 0.35
D3.00 BSC
D2 1.65 1.85
E3.00 BSC
E2 1.40 1.60
e0.65 BSC
L0.30 0.50
DETAIL A
L
DETAIL B
DETAIL A
L1 0.00 0.15
NOTE 4
e/2
DETAIL B
A1
A3
e1 0.65 REF
b1 0.20 0.30
b14X
e1
T TOP VIEW W—fl new“: , m J EI_U SIDE VIEW Edi wsklbggg BO'I'IOM VIEW SEA‘IING PLANE AM not: 3 7T NoTEs T uTMENsToNTNe AND ToLEPANcwe PER AsME VMSM ‘996 2 CONTROLLING DTMENsToN MTLLTMETEP: a DTMENSTON b APPUES To PLATED TEPMTNAL AND Ts MEASURED EETWEEN a T5 AND a 30mm EPoM IHE TEPMTNAL TTP o coPLANAPTTv APPUES To THE EXPOSED PAD As WELL As THE TEPMTNALs 5 THTs DEVICE coNTATNs WETIABLE FLANK DEsTeN EEATuPE To ATD m ETLLET FORMAr TION ON THE LEADS Dque MOUNTING RECOMMENDED Ffi 4% ‘For addmanal Tnlarmauon on our PbiFTee strategy and sa‘denng dams, p‘ease down‘aad the ON SemTcanaucmr smdenng and Mounhng Techmques Relerence Manua‘, SOLDERRM/D. www mm cum sue Eur Palen Mam gm
NCV8705
www.onsemi.com
23
PACKAGE DIMENSIONS
DFNW8 3x3, 0.65P
CASE 507AD
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. THIS DEVICE CONTAINS WETTABLE FLANK
DESIGN FEATURE TO AID IN FILLET FORMA-
TION ON THE LEADS DURING MOUNTING.
A
B
E
D
D2
E2
BOTTOM VIEW
b
e
8X
0.10 B
0.05
AC
CNOTE 3
PIN ONE
REFERENCE
TOP VIEW
AA3
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
8X
14
58
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
DETAIL B
DETAIL A
NOTE 4
e/2
SOLDERING FOOTPRINT*
DIM MIN NOM
MILLIMETERS
A0.80 0.90
A1 −−− −−−
b0.25 0.30
D
D2 2.30 2.40
E
E2 1.55 1.65
e0.65 BSC
L0.30 0.40
A3 0.20 REF
2.90 3.00
K
A4
L3
MAX
2.90 3.00
1.00
0.05
0.35
2.50
1.75
0.50
3.10
3.10
ALTERNATE
CONSTRUCTION
DETAIL A
L3
SECTION C−C
PLATED
A4
SURFACES L3
L3
L
DETAIL B
PLATING
EXPOSED
ALTERNATE
CONSTRUCTION
COPPER
A4
A1
A4A1
L
C
C
PACKAGE
OUTLINE
14
85
8X
0.58
2.50
1.75
0.40
0.65
PITCH
3.30
8X
DIMENSIONS: MILLIMETERS
2.35
K
0.28 REF
0.10 REF
0.05 REF
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