M90E26 Datasheet by Microchip Technology

Atmelf

Atmel-46002B-SE-M90E26-Datasheet_110714

FEATURES

Metering Features

•Metering features fully in compliance with the requirements of IEC62052-11,

IEC62053-21 and IEC62053-23; applicable in class 1 or class 2 single-phase watt-

hour meter or class 2 single-phase var-hour meter.

•Accuracy of 0.1% for active energy and 0.2% for reactive energy over a dynamic

range of 5000:1.

•Temperature coefficient is 15 ppm/ ℃ (typical) for on-chip reference voltage

•Single-point calibration over a dynamic range of 5000:1 for active energy; no cali-

bration needed for reactive energy.

•Energy Meter Constant doubling at low current to save verification time.

•Electrical parameters measurement: less than ±0.5% fiducial error for Vrms, Irms,

mean active/ reactive/ apparent power, frequency, power factor and phase angle.

•Forward/ reverse active/ reactive energy with independent energy registers. Active/

reactive energy can be output by pulse or read through energy registers to adapt to

different applications.

•Programmable startup and no-load power threshold.

•Dedicated ADC and different gains for L line and N line current sampling circuits.

Current sampled over shunt resistor or current transformer (CT); voltage sampled

over resistor divider network or potential transformer (PT).

•Programmable L line and N line metering modes: anti-tampering mode (larger

power), L line mode (fixed L line), L+N mode (applicable for single-phase three-wire

system) and flexible mode (configure through register).

•Programmable L line and N line power difference threshold in anti-tampering mode.

Other Features

•3.3V single power supply. Operating voltage range: 2.8~3.6V. Metering accuracy

guaranteed within 3.0V~3.6V. 5V compatible for digital input.

•Built-in hysteresis for power-on reset.

•Selectable UART interface and SPI interface (four-wire SPI interface or simplified

three-wire SPI interface with fixed 24 cycles for all registers operation).

•Parameter diagnosis function and programmable interrupt output of the IRQ inter-

rupt signal and the WarnOut signal.

•Programmable voltage sag detection and zero-crossing output.

•Channel input range

-Voltage channel (when gain is '1'): 120μVrms~600mVrms.

-L line current channel (when gain is '24'): 5μVrms~25mVrms.

-N line current channel (when gain is '1'): 120

Vrms~600mVrms.

•Programmable L line current gain: 1, 4, 8, 16, 24; Programmable N line gain: 1, 2, 4.

•Support L line and N line offset compensation.

•CF1 and CF2 output active and reactive energy pulses respectively which can be

used for calibration or energy accumulation.

•Crystal oscillator frequency: 8.192 MHz.

Atmel M90E26

Single-Phase High-Performance Wide-Span

Energy Metering IC

DATASHEET

EA EA AtmeL 2A

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

•Green SSOP28 package.

•Operating temperature: -40 ℃ ~ +85 ℃.

APPLICATION

The M90E26 is used for active and reactive energy metering for single-phase two-wire (1P2W), single-phase three-wire

(1P3W) or anti-tampering energy meters. With the measurement function, the M90E26 can also be used in power instru-

ments which need to measure voltage, current, etc.

DESCRIPTION

The M90E26 is a high-performance wide-span energy metering chip. The ADC and DSP technology ensure the chip's long-

term stability over variations in grid and ambient environmental conditions.

BLOCK DIAGRAM

Figure-1 M90E26 Block Diagram

Reference Voltage

Power On Reset

Crystal Oscillator SPI / UART

Vref

I1P

I1N

L Line Forward/Reverse Active/

Reactive Power

L Line Apparent Power

L Line Irms

Vrms

I2P

I2N

MMD1 MMD0

CS SCLK SDO/

SDI/

OSCI OSCO

RESET

ADC

HPF1 HPF0

DSP Module

PGA

X1/X4/X8/

X16/X24

ADC

Active

Energy Pulse

Output

Reactive

Energy Pulse

Output

CF1 CF2

HPF1 HPF0

N Line Forward/Reverse Active/

Reactive Power

N Line Apparent Power

N Line Irms

Power Factor/

Angle/Frequency

WarnOut/IRQ/ZX

IRQWarnOut

NGain

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Features............................................................................................................................................... 1

Application .......................................................................................................................................... 2

Description .......................................................................................................................................... 2

Block Diagram..................................................................................................................................... 2

1 Pin Assignment .............................................................................................................................. 7

2 Pin Description ............................................................................................................................... 8

3 Functional Description ................................................................................................................ 10

3.1 Dynamic Metering Range ........................................................................................................ 10

3.2 Startup and No-Load Power .................................................................................................... 10

3.3 Energy Registers ..................................................................................................................... 11

3.4 N Line Metering and Anti-Tampering ....................................................................................... 12

3.4.1 Metering Mode and L/N Line Current Sampling Gain Configuration ........................................... 12

3.4.2 Anti-Tampering Mode .................................................................................................................. 12

3.5 Measurement and Zero-Crossing ............................................................................................ 13

3.5.1 Measurement ............................................................................................................................... 13

3.5.2 Zero-Crossing .............................................................................................................................. 13

3.6 Calibration ................................................................................................................................ 14

3.7 Reset ........................................................................................................................................ 14

4 Interface ........................................................................................................................................ 15

4.1 SPI Interface ............................................................................................................................ 15

4.1.1 Four-Wire Mode ........................................................................................................................... 15

4.1.2 Three-Wire Mode ......................................................................................................................... 16

4.1.3 Timeout and Protection ............................................................................................................... 17

4.2 UART Interface ........................................................................................................................ 18

4.2.1 Byte Level Timing ........................................................................................................................ 18

4.2.2 Write Transaction ........................................................................................................................ 18

4.2.3 Read transaction ......................................................................................................................... 19

4.2.4 Checksum .................................................................................................................................... 19

4.3 WarnOut Pin for Fatal Error Warning ....................................................................................... 20

4.4 Low Cost Implementation in Isolation with MCU ...................................................................... 20

5 Register ......................................................................................................................................... 21

5.1 Register List ............................................................................................................................. 21

5.2 Status and Special Register ..................................................................................................... 22

5.3 Metering/ Measurement Calibration and Configuration ........................................................... 26

5.3.1 Metering Calibration and Configuration Register ......................................................................... 26

5.3.2 Measurement Calibration Register .............................................................................................. 34

5.4 Energy Register ....................................................................................................................... 39

5.5 Measurement Register ............................................................................................................. 44

Table of Contents

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

6 Electrical Specification ................................................................................................................ 51

6.1 Electrical Specification ............................................................................................................. 51

6.2 SPI Interface Timing ................................................................................................................ 53

6.3 Power On Reset Timing ........................................................................................................... 54

6.4 Zero-Crossing Timing .............................................................................................................. 55

6.5 Voltage Sag Timing .................................................................................................................. 55

6.6 Pulse Output ............................................................................................................................ 56

6.7 Absolute Maximum Rating ....................................................................................................... 56

Ordering Information........................................................................................................................ 57

Packaging Drawings......................................................................................................................... 58

Revision History .............................................................................................................................. 59

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Table-1 Pin Description ..................................................................................................................................................... 8

Table-2 Active Energy Metering Error ............................................................................................................................. 10

Table-3 Reactive Energy Metering Error ......................................................................................................................... 10

Table-4 Threshold Configuration for Startup and No-Load Power .................................................................................. 10

Table-5 Energy Registers ............................................................................................................................................... 11

Table-6 Metering Mode ................................................................................................................................................... 12

Table-7 The Measurement Format ................................................................................................................................. 13

Table-8 Read / Write Result in Four-Wire Mode ............................................................................................................. 17

Table-9 Read / Write Result in Three-Wire Mode ........................................................................................................... 17

Table-10 Register List ....................................................................................................................................................... 21

Table-11 SPI Timing Specification .................................................................................................................................... 53

Table-12 Power On Reset Specification ........................................................................................................................... 54

Table-13 Zero-Crossing Specification ............................................................................................................................... 55

Table-14 Voltage Sag Specification .................................................................................................................................. 56

List of Tables

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Figure-1 M90E26 Block Diagram ....................................................................................................................................... 2

Figure-2 Pin Assignment (Top View) .................................................................................................................................. 7

Figure-3 Read Sequence in Four-Wire Mode .................................................................................................................. 15

Figure-4 Write Sequence in Four-Wire Mode ................................................................................................................... 15

Figure-5 Read Sequence in Three-Wire Mode ................................................................................................................ 16

Figure-6 Write Sequence in Three-Wire Mode ................................................................................................................. 16

Figure-7 UART Byte Level Timing .................................................................................................................................... 18

Figure-8 Write Transaction ............................................................................................................................................... 18

Figure-9 Read Transaction ............................................................................................................................................... 19

Figure-10 4-Wire SPI Timing Diagram .............................................................................................................................. 53

Figure-11 3-Wire SPI Timing Diagram .............................................................................................................................. 53

Figure-12 Power On Reset Timing Diagram ..................................................................................................................... 54

Figure-13 Zero-Crossing Timing Diagram ......................................................................................................................... 55

Figure-14 Voltage Sag Timing Diagram ............................................................................................................................ 55

Figure-15 Output Pulse Width ........................................................................................................................................... 56

List of Figures

Reset AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

1 PIN ASSIGNMENT

Figure-2 Pin Assignment (Top View)

14 15

Reset

DVDD

AVDD

AGND

I1P

I1N

I2P

I2N

Vref

AGND

Resv_low

WarnOut

SCLK

SDO/UTX

SDI/URXDGND

MMD1 MMD0

OSCI

OSCO

USEL

CF1

CF2

IRQ

DVDD: Dlgltal Power Supply DGND Z | Power DGND: Dlgltal Ground AVDD: Analog Power Supply Vref: Output Pln for Reference Voluge AGND 6, 14 | Power AGND: Analog Ground I1P: Posltlve Input for L Llne Current l2P: Posltlve Input for N Llne Current VP: Posltlve Input for Voluge USEL: UARTISPI Interface Selectlon SCLK: Serlal Clock of SPI AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

2 PIN DESCRIPTION

Table-1 Pin Description

Name Pin No. I/O

note 1

Type Description

Reset 4ILVTTL

Reset: Reset Pin (active low)

This pin should connect to ground through a 0.1μF filter capacitor. In appli-

cation it can also directly connect to one output pin from microcontroller

(MCU).

DVDD 3 I Power

DVDD: Digital Power Supply

This pin provides power supply to the digital part. It should be decoupled

with a 10μF electrolytic capacitor and a 0.1μF capacitor.

DGND 2 I Power DGND: Digital Ground

AVDD 5 I Power

AVDD: Analog Power Supply

This pin provides power supply to the analog part. It should be decoupled

with a 0.1μF capacitor.

Vref 13 O Analog Vref: Output Pin for Reference Voltage

This pin should be decoupled with a 1μF capacitor and a 1nF capacitor.

AGND 6, 14 I Power AGND: Analog Ground

I1P

I1N

11 I Analog

I1P: Positive Input for L Line Current

I1N: Negative Input for L Line Current

These pins are differential inputs for L line current. Input range is

5μVrms~25mVrms when gain is '24'.

I2P

I2N

8I Analog

I2P: Positive Input for N Line Current

I2N: Negative Input for N Line Current

These pins are differential inputs for N line current. Input range is

120μVrms~600mVrms when gain is '1'.

15 I Analog

VP: Positive Input for Voltage

VN: Negative Input for Voltage

These pins are differential inputs for voltage. Input range is

120μVrms~600mVrms.

USEL 12 I LVTTL

USEL: UART/SPI Interface Selection

High: UART interface

Low: SPI interface

Note: This pin should not change after reset.

CS 24 I LVTTL

CS: Chip Select (Active Low) of SPI

In 4-wire SPI mode, this pin must be driven from high to low for each read/

write operation, and maintain low for the entire operation. In 3-wire SPI

mode, this pin must be low all the time. Refer to section 4.1.

In UART interface, this pin should be connected to VDD.

SCLK 25 I LVTTL

SCLK: Serial Clock of SPI

This pin is used as the clock for the SPI interface. Data on SDI is shifted into

the chip on the rising edge of SCLK while data on SDO is shifted out of the

chip on the falling edge of SCLK.

In UART interface, this pin should be connected to ground.

SDO: Serlal Data Output of SPI SDI: Serlal Data Input of SPI MMD1ID: Meterlng Mode Conflguratlon OSCI: External Crystal Inpul 0800: External Crystal Output CF1: Actlve Energy Pulse Output ZX: Voluge Zero-Crosslng Output IRQ: Interrupt Output Warnoul: Fatal Error Warnlng Reserved AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

SDO/UTX 26 OZ LVTTL

SDO: Serial Data Output of SPI

This pin is used as the data output for the SPI interface. Data on this pin is

shifted out of the chip on the falling edge of SCLK.

UTX: UART Data Transmit

This pin is used to transmit data for the UART interface. This pin needs to be

pulled up to VDD by a 10kΩ resistor.”

Note: UART and SPI interface is selected by the USEL pin.

SDI/URX 27 I LVTTL

SDI: Serial Data Input of SPI

This pin is used as the data input for the SPI interface. Address and data on

this pin is shifted into the chip on the rising edge of SCLK.

URX: UART Data Receive

This pin is used to receive data for the UART interface.

Note: UART and SPI interface is selected by the USEL pin.

MMD1

MMD0

28 ILVTTL

MMD1/0: Metering Mode Configuration

00: anti-tampering mode (larger power);

01: L line mode (fixed L line);

10: L+N mode (applicable for single-phase three-wire system);

11: flexible mode (line specified by the LNSel bit (MMode, 2BH))

OSCI 22 I LVTTL

OSCI: External Crystal Input

An 8.192 MHz crystal is connected between OSCI and OSCO. In applica-

tion, this pin should be connected to ground through a 12pF capacitor.

OSCO 23 O LVTTL

OSCO: External Crystal Output

An 8.192 MHz crystal is connected between OSCI and OSCO. In applica-

tion, this pin should be connected to ground through a 12pF capacitor.

CF1

CF2

19 OLVTTL

CF1: Active Energy Pulse Output

CF2: Reactive Energy Pulse Output

These pins output active/reactive energy pulses.

ZX 21 O LVTTL

ZX: Voltage Zero-Crossing Output

This pin is asserted when voltage crosses zero. Zero-crossing mode can be

configured to positive zero-crossing, negative zero-crossing or all zero-

crossing by the Zxcon[1:0] bits (MMode, 2BH).

IRQ 20 O LVTTL

IRQ: Interrupt Output

This pin is asserted when one or more events in the SysStatus register

(01H) occur. It is deasserted when there is no bit set in the SysStatus regis-

ter (01H).

WarnOut 17 O LVTTL

WarnOut: Fatal Error Warning

This pin is asserted when there is metering parameter calibration error or

voltage sag. Refer to section 4.3.

Resv_Low 9 I LVTTL Reserved

For normal operation, these pins should be connected to ground.

Table-1 Pin Description (Continued)

Name Pin No. I/O

note 1

Type Description

AtmeL Note: Shunt resistor i s 250 pf). or CT ratio is 100021 and load resistor is 69. Note: Shunt resistor i s 250 pf). or CT ratio is 100021 and load resistor is 69. Threshold for Active Startup Power PStartTh, 27H Threshold for Active No-load Power PNolTh, 28H Threshold for Reactive Stamp Power QStartTh, 29H Threshold for Reactive No-load Power QNolTh, 2AH

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

3 FUNCTIONAL DESCRIPTION

3.1 DYNAMIC METERING RANGE

Accuracy is 0.1% for active energy metering and 0.2% for reactive energy metering over a dynamic range of 5000:1 (typi-

cal). Refer to Ta bl e -2 and Table-3.

3.2 STARTUP AND NO-LOAD POWER

Startup and no-load power thresholds are programmable, both for active and reactive power. The related registers are

listed in Tab l e- 4 .

The M90E26 will start within 1.2 times of the theoretical startup time of the configured startup power, if startup power is less

than the corresponding power of 20mA when power factor or sinφ is 1.0.

The M90E26 has no-load status bits, the Pnoload/Qnoload bit (EnStatus, 46H). The M90E26 will not output any active

pulse (CF1) in active no-load state. The M90E26 will not output any reactive pulse (CF2) in reactive no-load state.

Table-2 Active Energy Metering Error

Current Power Factor Error(%)

20mA ≤I＜50mA 1.0 ±0.2

50mA ≤I≤100A ±0.1

50mA ≤I＜100mA 0.5 (Inductive)

0.8 (Capacitive)

±0.2

100mA ≤I≤100A ±0.1

Note: Shunt resistor is 250 μΩ or CT ratio is 1000:1 and load resistor is 6Ω.

Table-3 Reactive Energy Metering Error

Current sinφ (Inductive or Capacitive) Error(%)

20mA ≤I＜50mA 1.0 ±0.4

50mA ≤I≤100A ±0.2

50mA ≤I＜100mA 0.5 ±0.4

100mA ≤I≤100A ±0.2

Note: Shunt resistor is 250 μΩ or CT ratio is 1000:1 and load resistor is 6Ω.

Table-4 Threshold Configuration for Startup and No-Load Power

Threshold Register

Threshold for Active Startup Power PStartTh, 27H

Threshold for Active No-load Power PNolTh, 28H

Threshold for Reactive Startup Power QStartTh, 29H

Threshold for Reactive No-load Power QNolTh, 2AH

Forward Active Energy APenergy, 40H Reverse Active Energy ANenergy, 41 H Absolute Active Energy ATenergy, 42H Forward (Inductive) Reactive Energy RPenergy, 43H Reverse (Capacitive) Reactive Energy RNenergy, 44H Absolute Reactive Energy RTenergy, 45H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

3.3 ENERGY REGISTERS

The M90E26 provides energy pulse output CFx (CF1/CF2) which is proportionate to active/reactive energy. Energy is usu-

ally accumulated by adding the CFx pulses in system applications. Alternatively, the M90E26 provides energy registers.

There are forward (inductive), reverse (capacitive) and absolute energy registers for both active and reactive energy. Refer

to Table-5.

Each energy register is cleared after read. The resolution of energy registers is 0.1CF, i.e. one LSB represents 0.1 energy

pulse.

Table-5 Energy Registers

Energy Register

Forward Active Energy APenergy, 40H

Reverse Active Energy ANenergy, 41H

Absolute Active Energy ATenergy, 42H

Forward (Inductive) Reactive Energy RPenergy, 43H

Reverse (Capacitive) Reactive Energy RNenergy, 44H

Absolute Reactive Energy RTenergy, 45H

CFx represents the larger energy line. Refer to sec- 0 1 L Line Mode (ﬁxed L line) CFx represents L line energy all the time. L+N Mode (applicable for single-phase three-wire sys- CFx represents the arithmetic sum ofL line and N line Flexible Mode (line speciﬁed by the LNSel bit (MMode, Threshold Compare Method Special Treatment at Low Power AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

3.4 N LINE METERING AND ANTI-TAMPERING

3.4.1 METERING MODE AND L/N LINE CURRENT SAMPLING GAIN CONFIGURATION

The M90E26 has two current sampling circuits with N line metering and anti-tampering functions. The MMD1 and MMD0

pins are used to configure the metering mode. Refer to Table-6.

The M90E26 has two current sampling circuits with different gain configurations. L line gain can be 1, 4, 8, 16 and 24, and

N line gain can be 1, 2 and 4. The configuration is made by the MMode register (2BH). Generally L line can be sampled

over shunt resistor or CT. N line can be sampled over CT for isolation consideration. Note that Rogowski coil is not sup-

ported.

3.4.2 ANTI-TAMPERING MODE

Threshold

In anti-tampering mode, the power difference threshold between L line and N line can be: 1%, 2%,... 12%, 12.5%, 6.25%,

3.125% and 1.5625%, altogether 16 choices. The configuration is made by the Pthresh[3:0] bits (MMode, 2BH) and the

default value is 3.125%. The threshold is applicable for active energy. The metering line of the reactive energy follows that

of the active energy.

Compare Method

In anti-tampering mode, the compare method is as follows:

If current metering line is L line and

N line is switched as the metering line, otherwise L line keeps as the metering line.

If current metering line is N line and

L line is switched as the metering line, otherwise N line keeps as the metering line.

This method can achieve hysteresis around the threshold automatically. L line is employed after reset by default.

Special Treatment at Low Power

When power is low, general factors such as the quantization error or calibration difference between L line and N line might

cause the power difference to be exceeded. To ensure L line and N line to start up normally, special treatment as follows is

adopted:

The line with higher power is selected as the metering line when both L line and N line power are lower than 8 times of the

startup power but higher than the startup power.

Table-6 Metering Mode

MMD1 MMD0 Metering Mode CFx (CF1 or CF2) Output

0 0 Anti-tampering Mode (larger power) CFx represents the larger energy line. Refer to sec-

tion 3.4.2.

0 1 L Line Mode (fixed L line) CFx represents L line energy all the time.

10L+N Mode (applicable for single-phase three-wire sys-

tem)

CFx represents the arithmetic sum of L line and N line

energy

11Flexible Mode (line specified by the LNSel bit (MMode,

2BH)) CFx represents energy of the specified line.

Threshold100%*

Power ActiveLine L

Power ActiveLine L-Power ActiveLine N >

Threshold100%*

Power ActiveLine N

Power ActiveLine N-Power ActiveLine L >

Voltage rrns Un XXX.XX 0~655.35V Imax -32.768~+32.767 Frequency in XX.XX 45.00~65.00 Hz Note 1: All registers are of 16 hits. For cases when the current and acﬁve/reacnve/apparent power goes beyond the above range. it is AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

3.5 MEASUREMENT AND ZERO-CROSSING

3.5.1 MEASUREMENT

The M90E26 has the following measurements:

•voltage rms

•current rms (L line/N line)

•mean active power (L line/N line)

•mean reactive power (L line/N line)

•voltage frequency

•power factor (L line/N line)

•phase angle between voltage and current (L line/N line)

•mean apparent power (L line/N line)

The above measurements are all calculated with fiducial error except for frequency. The frequency accuracy is 0.01Hz, and

the other measurement accuracy is 0.5%. Fiducial error is calculated as follow:

Where Umea is the measured voltage, Ureal is the actual voltage and UFV is the fiducial value.

3.5.2 ZERO-CROSSING

The ZX pin is asserted when the sampling voltage crosses zero. Zero-crossing mode can be configured to positive zero-

crossing, negative zero-crossing and all zero-crossing by the Zxcon[1:0] bits (MMode, 2BH). Refer to section 6.4.

The zero-crossing signal can facilitate operations such as relay operation and power line carrier transmission in typical

smart meter applications.

Table-7 The Measurement Format

Measurement Fiducial Value (FV) M90E26 Defined

Format Range Comment

Voltage rms Un XXX.XX 0~655.35V

Current rms

note 1, note 2

Imax

as 4Ib XX.XXX 0~65.535A

Active/ Reactive Power

note 1

maximum power as Un*4Ib XX.XXX -32.768~+32.767

kW/kvar Complement, MSB as the sign bit

Apparent Power

note 1

Un*4Ib XX.XXX 0~+32.767 kVA Complement, MSB always '0'

Frequency fn XX.XX 45.00~65.00 Hz

Power Factor

note 3

1.000 X.XXX -1.000~+1.000 Signed, MSB as the sign bit

Phase Angle

note 4

180° XXX.X -180°~+180° Signed, MSB as the sign bit

Note 1: All registers are of 16 bits. For cases when the current and active/reactive/apparent power goes beyond the above range, it is

suggested to be handled by microcontroller (MCU) in application. For example, register value can be calibrated to 1/2 of the actual value

during calibration, then multiply 2 in application. Note that if the actual current is twice of that of the M90E26, the actual active/reactive/

apparent power is also twice of that of the M90E26.

Note 2: The accuracy is not guaranteed when the current is lower than 15mA. Note that the tolerance is 25 mA at IFV of 5A and fiducial

accuracy of 0.5%.

Note 3: Power factor is obtained by active power dividing apparent power

Note 4: Phase angle is obtained when voltage/current crosses zero at the frequency of 256kHz. Precision is not guaranteed at small

current.

100%*

U-U

rrorFiducial_E

realmea

Metering Calibration Measurement Calibration AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

3.6 CALIBRATION

Calibration includes metering and measurement calibration.

Metering Calibration

The M90E26 design methodology guarantees the accuracy over the entire dynamic range, after metering calibration at one

specific current, i.e. the basic current of Ib.

The calibration procedure includes the following steps:

1. Calibrate gain at unity power factor;

2. Calibrate phase angle compensation at 0.5 inductive power factor.

Generally, line current sampling is susceptible to the circuits around the sensor when shunt resistor is employed as the

current sensor in L line. For example, the transformer in the energy meter’s power supply may conduct interference to the

shunt resistor. Such interference will cause perceptible metering error, especially at low current conditions. The total inter-

fere is at a statistically constant level. In this case, the M90E26 provides the power offset compensation feature to improve

metering performance.

L line and N line need to be calibrated sequentially. Reactive energy does not need to be calibrated after active energy cali-

bration completed.

Measurement Calibration

Measurement calibration includes gain calibration for voltage rms and current rms.

Considering the possible nonlinearity around zero caused by external components, the M90E26 also provides offset

compensation for voltage rms, current rms, mean active power and mean reactive power.

The M90E26 design methodology guarantees automatic calibration for frequency, phase angle and power factor measure-

ment.

3.7 RESET

The M90E26 has an on-chip power supply monitor circuit with built-in hysteresis. The M90E26 only works within the volt-

age range.

The M90E26 has three means of reset: power-on reset, hardware reset and software reset. All registers resume to their

default value after reset.

Power-on Reset: Power-on reset is initiated during power-up. Refer to section 6.3.

Hardware Reset: Hardware Reset is initiated when the reset pin is pulled low. The width of the reset signal should be over

200μs.

Software Reset: Software Reset is initiated when ‘789AH’ is written to the software reset register (SoftReset, 00H).

Read Sequence ﬁ_\ /— 1 11 12 1a 14 15 15 17 1a 1a 20 21 22 24 Write Sequence E_\ /— 111213141515171519 20 2122 23 AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

4 INTERFACE

The M90E26 supports both Serial Peripheral Interface (SPI) and UART interface. The selection is made by the USEL pin.

When the USEL pin is low, SPI interface is selected. When the USEL pin is high, UART interface is selected. Note that the

USEL pin should not change after reset.

4.1 SPI INTERFACE

SPI is a full-duplex, synchronous channel. There are two SPI modes: four-wire mode and three-wire mode. In four-wire

mode, four pins are used: CS, SCLK, SDI and SDO. In three-wire mode, three pins are used: SCLK, SDI and SDO. Data on

SDI is shifted into the chip on the rising edge of SCLK while data on SDO is shifted out of the chip on the falling edge of

SCLK. The LastData register (06H) stores the 16-bit data that is just read or written.

4.1.1 FOUR-WIRE MODE

In four-wire mode, the CS pin must be driven low for the entire read or write operation. The first bit on SDI defines the

access type and the lower 7-bit is decoded as address.

Read Sequence

As shown in Figure-3, a read operation is initiated by a high on SDI followed by a 7-bit register address. A 16-bit data in this

Figure-3 Read Sequence in Four-Wire Mode

Write Sequence

As shown in Figure-4, a write operation is initiated by a low on SDI followed by a 7-bit register address. A 16-bit data is then

shifted into the chip on SDI. A complete write operation contains 24 cycles.

Figure-4 Write Sequence in Four-Wire Mode

SCLK

SDI

SDO

10123456789 111213141516171819202122 24

A0A6 A5 A4 A3 A2 A1

High Impedance D15

Don't care

16-bit data

D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1

SCLK

SDI

SDO

10123456789 11121314151617181920212223

A0A6 A5 A4 A3 A2 A1

16-bit data

High Impedance

D0D7 D6 D5 D4 D3 D2 D1

D15

D14D13D12D11D10 D9 D8

u «2 <3 «4="" 15="" «s="" 17="" m="" 19="" 2n="">< 22="" 23="" 24="" atmel="">

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

4.1.2 THREE-WIRE MODE

In three-wire mode, CS is always at low level. When there is no operation, SCLK keeps at high level. The start of a read or

write operation is triggered if SCLK is consistently low for at least 400μs. The subsequent read or write operation is similar

to that in four-wire mode. Refer to Figure-5 and Figure-6.

Figure-5 Read Sequence in Three-Wire Mode

Figure-6 Write Sequence in Three-Wire Mode

SCLK

10123456789 11121314151617181920212223

24 1234

Low ≥400μs

Drive Low

SDI

SDO

A0A6 A5 A4 A3 A2 A1

Hign Impedance D

Don't care

16-bit data

Don’t care A6 A5 A4

High Impedance

Low ≥400μs

SCLK

SDI

SDO

10123456789 11121314151617181920212223

A0A6 A5 A4 A3 A2 A1

16-bit data

High Impedance

1234

A6 A5 A4Don't care

Drive low

Low ≥400μsLow ≥400μs

Don't care

AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

4.1.3 TIMEOUT AND PROTECTION

Timeout occurs if SCLK does not toggle for 6ms in both four-wire and three-wire modes. When timeout, the read or write

operation is aborted.

If there are more than 24 SCLK cycles when CS is driven low in four-wire mode or between two starts in three-wire mode,

writing operation is prohibited while normal reading operation can be completed by taking the first 24 SCLK cycles as the

valid ones. However, the reading result might not be the intended one.

A read access to an invalid address returns all zero. A write access to an invalid address is discarded.

Tab l e -8 and Ta ble - 9 list the read or write result in different conditions.

Table-8 Read / Write Result in Four-Wire Mode

Condition Result

Operation Timeout SCLK Cycles

note 1

Read/Write

Status

LastData

Read

note 2

>=24 Normal Read Yes

note 2

<24 Partial Read No

Write

No =24 Normal Write Yes

No !=24 No Write No

Yes - No Write No

Note 1: The number of SCLK cycles when CS is driven low or the number of SCLK cycles before timeout if any.

Note 2: '-' stands for Don't Care.

Table-9 Read / Write Result in Three-Wire Mode

Condition Result

Operation Timeout SCLK Cycles

note 1

Read/Write Status

LastData

Read

No >=24

note 2

Normal Read Yes

Timeout after 24 cycles >24 Normal Read Yes

Timeout before 24 cycles -

note 3

Partial Read No

Timeout at 24 cycles =24 Normal Read Yes

Write

No =24 Normal Write Yes

No !=24 No Write No

Yes - No Write No

Note 1: The number of SCLK cycles between 2 starts or the number of SCLK cycles before timeout if any.

Note 2: There is no such case of less than 24 SCLK cycles when there is no timeout in three-wire mode, because the first few SCLK

cycles in the next operation is counted into this operation. In this case, data is corrupted.

Note 3: '-' stands for Don't Care.

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

4.2 UART INTERFACE

The UART interface is of 8-bit data only, with no parity checking features.

A read/write transaction is composed of 6 bytes’ transfer, starting always from the host transmitting the first byte ‘FEH’. The

second byte is referenced as RW_ADDRESS, which has a R/W bit (bit7) and 7 address bits (bit6-0).

Upon receiving commands from the host, the M90E26 will send data and/or checksum bytes back to the host within 5ms if

the checksum is confirmed to be correct. Interval between successive UART bytes from the M90E26 is 5 bits maximum.

The M90E26 will time out the current transaction if the host byte interval (idling time between two successive bytes) is

greater than 20ms. Once transaction timeout or checksum failure, the M90E26 will abort the current transaction and wait

for the starting byte ‘FEH’ of the new transaction and ignore other data that received. The host needs to have a timeout

scheme to detect transaction failure. In addition, host needs to wait at least 20ms to start a new transaction to allow the

M90E26 to recover from a failure condition.

UART baud rate is determined by the host, and it can be auto-detected by the M90E26. The baud rates supported are 2400

and 9600. The first byte (FEH) is used in detecting the baud-rate. The baud-rate of a transaction shall be kept unchanged.

For a new transaction, host may change the baud rate. However, it is suggested that boad rate remain the same in applica-

tion.

The 8-bit data in TX/RX pin is shifted in a LSB (bit0) first manner.

4.2.1 BYTE LEVEL TIMING

The timing for each byte is as shown in Figure-7.

Figure-7 UART Byte Level Timing

4.2.2 WRITE TRANSACTION

A complete write transaction is composed of six bytes, five from the host and one from the M90E26 as shown in Figure-8.

Figure-8 Write Transaction

UTX/ URX Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7

Start

bit Stop bit

Data frame

Idle

TX IO Drive

High

Impedence

TX IO Drive

Note: The UTX pin will be in high impedance state when not transmitting

(0) ADDRESS DATA_LSBDATA_MSB CHKSUM

Addr+data

CHKSUM

Addr+data

HOST

(URX)

M90E26

(UTX)

0xFE

Byte interval

max 20 ms

Response time

max 5 ms

Write Transaction: Read Transaction: AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

4.2.3 READ TRANSACTION

A complete read transaction is composed of six bytes, three from the host and three from the M90E26 as shown in Figure-

Figure-9 Read Transaction

4.2.4 CHECKSUM

Checksum is done by adding the bytes as unsigned numbers, dropping the overflow bits, and taking the result as the

checksum.

Checksum is calculated with address, data or address+data, depending on the transaction type:

Write Transaction:

Host Checksum = RW_Address+DATA_MSB+DATA_LSB

M90E26 Checksum = RW_Address+DATA_MSB+DATA_LSB

Read Transaction:

Host Checksum = RW_Address

M90E26 Checksum = DATA_MSB + DATA_LSB

HOST

(URX)

M90E26

(UTX)

(1) ADDRESS0xFE CHKSUM

Address

DATA_LSBDATA_MSB CHKSUM

data

Byte interval

max 20 ms

Byte interval

max 5 bits

Response

time max 5 ms

Calibration Em)! Voltage Sag AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

4.3 WARNOUT PIN FOR FATAL ERROR WARNING

Fatal error warning is raised through the WarnOut pin in two cases: checksum calibration error and voltage sag.

Calibration Error

The M90E26 performs diagnosis on a regular basis for important parameters such as calibration parameters and metering

configuration. When checksum is not correct, the CalErr[1:0] bits (SysStatus, 01H) are set, and both the WarnOut pin and

the IRQ pin are asserted. When checksum is not correct, the metering part does not work to prevent a large number of

pulses during power-on or any abnormal situation upon incorrect parameters.

Voltage Sag

Voltage sag is detected when voltage is continuously below the voltage sag threshold for one cycle which starts from any

zero-crossing point. Voltage threshold is configured by the SagTh register (03H). Refer to section 6.5.

When voltage sag occurs, the SagWarn bit (SysStatus, 01H) is set and the WarnOut pin is asserted if the FuncEn register

(02H) enables voltage sag warning through the WarnOut pin. This function helps reduce power-down detection circuit in

system design. In addition, the method of judging voltage sag by detecting AC side voltage eliminates the influence of large

capacitor in traditional rectifier circuit, and can detect voltage sag earlier.

4.4 LOW COST IMPLEMENTATION IN ISOLATION WITH MCU

The following functions can be achieved at low cost when the M90E26 is isolated from the MCU:

SPI/UART: MCU can perform read and write operations through low speed optocoupler (e.g. PS2501) when the M90E26 is

isolated from the MCU. For the SPI interface, it can be either of 3-wire or 4-wire.

Energy Pulses CFx: Energy can be accumulated by reading values in corresponding energy registers. CFx can also con-

nect to the optocoupler and the energy pulse light can be turned on by CFx.

Fatal Error WarnOut: Fatal error can be acquired by reading the CalErr[1:0] bits (SysStatus, 01H).

IRQ: IRQ interrupt can be acquired by reading the SysStatus register (01H).

Reset: The M90E26 is reset when ‘789AH’ is written to the software reset register (SoftReset, 00H).

AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

5REGISTER

5.1 REGISTER LIST

Table-10 Register List

Address Register Name

Read/Write

Type Functional Description Page

Status and Special Register

00H SoftReset W Software Reset P22

01H SysStatus R/C System Status P23

02H FuncEn R/W Function Enable P24

03H SagTh R/W Voltage Sag Threshold P24

04H SmallPMod R/W Small-Power Mode P25

06H LastData R Last Read/Write SPI/UART Value P25

Metering Calibration and Configuration Register

08H LSB R/W RMS/Power 16-bit LSB P26

20H CalStart R/W Calibration Start Command P26

21H PLconstH R/W High Word of PL_Constant P27

22H PLconstL R/W Low Word of PL_Constant P27

23H Lgain R/W L Line Calibration Gain P28

24H Lphi R/W L Line Calibration Angle P28

25H Ngain R/W N Line Calibration Gain P28

26H Nphi R/W N Line Calibration Angle P29

27H PStartTh R/W Active Startup Power Threshold P29

28H PNolTh R/W Active No-Load Power Threshold P29

29H QStartTh R/W Reactive Startup Power Threshold P30

2AH QNolTh R/W Reactive No-Load Power Threshold P30

2BH MMode R/W Metering Mode Configuration P31

2CH CS1 R/W Checksum 1 P33

Measurement Calibration Register

30H AdjStart R/W Measurement Calibration Start Command P34

31H Ugain R/W Voltage rms Gain P34

32H IgainL R/W L Line Current rms Gain P35

33H IgainN R/W N Line Current rms Gain P35

34H Uoffset R/W Voltage Offset P35

35H IoffsetL R/W L Line Current Offset P36

36H IoffsetN R/W N Line Current Offset P36

37H PoffsetL R/W L Line Active Power Offset P36

38H QoffsetL R/W L Line Reactive Power Offset P37

39H PoffsetN R/W N Line Active Power Offset P37

3AH QoffsetN R/W N Line Reactive Power Offset P37

3BH CS2 R/W Checksum 2 P38

Energy Register

40H APenergy R/C Forward Active Energy P39

41H ANenergy R/C Reverse Active Energy P40

42H ATenergy R/C Absolute Active Energy P40

43H RPenergy R/C Forward (Inductive) Reactive Energy P41

Address: 00H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

5.2 STATUS AND SPECIAL REGISTER

SoftReset

Software Reset

44H RNenergy R/C Reverse (Capacitive) Reactive Energy P41

45H RTenergy R/C Absolute Reactive Energy P42

46H EnStatus R Metering Status P43

Measurement Register

48H Irms R L Line Current rms P44

49H Urms R Voltage rms P44

4AH Pmean R L Line Mean Active Power P45

4BH Qmean R L Line Mean Reactive Power P45

4CH Freq R Voltage Frequency P46

4DH PowerF R L Line Power Factor P46

4EH Pangle R Phase Angle between Voltage and L Line Current P47

4FH Smean R L Line Mean Apparent Power P47

68H Irms2 R N Line Current rms P48

6AH Pmean2 R N Line Mean Active Power P48

6BH Qmean2 R N Line Mean Reactive Power P49

6DH PowerF2 R N Line Power Factor P49

6EH Pangle2 R Phase Angle between Voltage and N Line Current P50

6FH Smean2 R N Line Mean Apparent Power P50

Address: 00H

Type: Write

Default Value: 0000H

Bit Name Description

15 - 0 SoftReset[15:0] Software reset register. The M90E26 resets if only 789AH is written to this register.

Table-10 Register List (Continued)

Address Register Name

Read/Write

Type Functional Description Page

15 14 13 12 11 10 9 8

SoftReset15 SoftReset14 SoftReset13 SoftReset12 SoftReset11 SoftReset10 SoftReset9 SoftReset8

76543210

SoftReset7 SoftReset6 SoftReset5 SoftReset4 SoftReset3 SoftReset2 SoftReset1 SoftReset0

Address: 01H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

SysStatus

System Status

Address: 01H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 14 CalErr[1:0]

These bits indicate CS1 checksum status.

00: CS1 checksum correct (default)

11: CS1 checksum error. At the same time, the WarnOut pin is asserted.

13 - 12 AdjErr[1:0]

These bits indicate CS2 checksum status.

00: CS2 checksum correct (default)

11: CS2 checksum error.

11 - 8 - Reserved.

7 LNchange

This bit indicates whether there is any change of the metering line (L line and N line).

0: metering line no change (default)

1: metering line changed

6RevQchq

This bit indicates whether there is any change with the direction of reactive energy.

0: direction of reactive energy no change (default)

1: direction of reactive energy changed

This status is enabled by the RevQEn bit(FuncEn, 02H).

5 RevPchg

This bit indicates whether there is any change with the direction of active energy.

0: direction of active energy no change (default)

1: direction of active energy changed

This status is enabled by the RevPEn bit (FuncEn, 02H).

4 - 2 - Reserved.

1SagWarn

This bit indicates the voltage sag status.

0: no voltage sag (default)

1: voltage sag

Voltage sag is enabled by the SagEn bit (FuncEn, 02H).

Voltage sag status can also be reported by the WarnOut pin. It is enabled by the SagWo bit(FuncEn,

02H).

Reserved.

Note: Any of the above events will prompt the IRQ pin to be asserted, which can be supplied to external MCU as an interrupt.

15 14 13 12 11 10 9 8

CalErr1 CalErr0 AdjErr1 AdjErr0 - - - -

76543210

LNchange RevQchg RevPchg - - - SagWarn -

Address: 02H Address: 03H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

FuncEn

Function Enable

SagTh

Voltage Sag Threshold

Address: 02H

Type: Read/Write

Default Value: 000CH

Bit Name Description

15 - 6 - Reserved.

5 SagEn

This bit determines whether to enable the voltage sag interrupt.

0: disable (default)

1: enable

4SagWo

This bit determines whether to enable voltage sag to be reported by the WarnOut pin.

0: disable (default)

1: enable

3RevQEn

This bit determines whether to enable the direction change interrupt of reactive energy.

0: disable

1: enable (default)

2 RevPEn

This bit determines whether to enable the direction change interrupt of active energy.

0: disable

1: enable (default)

1 - 0 - Reserved.

Address: 03H

Type: Read/Write

Default Value: 1D6AH

Bit Name Description

15 - 0 SagTh[15:0]

Voltage sag threshold configuration. Data format is XXX.XX. Unit is V.

The power-on value of SagTh is 1D6AH, which is calculated by 22000*sqrt(2)*0.78/(4*Ugain/32768)

For details, please refer to related application note 46102.

15 14 13 12 11 10 9 8

--------

76543210

- - SagEn SagWo RevQEn RevPEn - -

15 14 13 12 11 10 9 8

SagTh15 SagTh14 SagTh13 SagTh12 SagTh11 SagTh10 SagTh9 SagTh8

76543210

SagTh7 SagTh6 SagTh5 SagTh4 SagTh3 SagTh2 SagTh1 SagTh0

Address: 04H Address: 06H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

SmallPMod

Small-Power Mode

LastData

Last Read/Write SPI/UART Value

Address: 04H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 SmallPMod[15:0]

Small-power mode command.

A987H: small-power mode. The relationship between the register value of L line and N line active/reactive

power in small-power mode and normal mode is:

power in normal mode = power in small-power mode *Igain*Ugain /(100000 * 2^42)

Others: Normal mode.

Small-power mode is mainly used in the power offset calibration.

Address: 06H

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 LastData[15:0] This register stores the data that is just read or written through the SPI/UART interface. Refer to Table-8

and Table-9.

15 14 13 12 11 10 9 8

SmallPMod1

0 SmallPMod9 SmallPMod8

76543210

SmallPMod7 SmallPMod6 SmallPMod5 SmallPMod4 SmallPMod3 SmallPMod2 SmallPMod1 SmallPMod0

15 14 13 12 11 10 9 8

LastData15 LastData14 LastData13 LastData12 LastData11 LastData10 LastData9 LastData8

76543210

LastData7 LastData6 LastData5 LastData4 LastData3 LastData2 LastData1 LastData0

Address: 08H Address: 20H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

5.3 METERING/ MEASUREMENT CALIBRATION AND CONFIGURATION

5.3.1 METERING CALIBRATION AND CONFIGURATION REGISTER

LSB

RMS/Power 16-bit LSB

CalStart

Calibration Start Command

Address: 08H

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 LSB[15:0] 16-bit LSB of the RMS or Power registers.

Note that reading of the LSB[7:0] bits is always 0.

Address: 20H

Type: Read/Write

Default Value: 6886H

Bit Name Description

15 - 0 CalStart[15:0]

Metering calibration start command:

6886H: Power-on value. Metering function is disabled.

5678H: Metering calibration startup command. After 5678H is written to this register, registers 21H-2BH

resume to their power-on values. The M90E26 starts to meter and output energy pulses regardless

of the correctness of diagnosis. The CalErr[1:0] bits (SysStatus, 01H) are not set and the WarnOut/

IRQ pins do not report any warning/interrupt.

8765H: Check the correctness of the 21H-2BH registers. If correct, normal metering. If not correct, meter-

ing function is disabled, the CalErr[1:0] bits (SysStatus, 01H) are set and the WarnOut/IRQ pins

report warning/interrupt.

Others: Metering function is disabled. The CalErr[1:0] bits (SysStatus, 01H) are set and the WarnOut/IRQ

pins report warning/interrupt.

15 14 13 12 11 10 9 8

LSB15 LSB14 LSB13 LSB12 LSB11 LSB10 LSB0 LSB8

76543210

LSB7 LSB6 LSB5 LSB4 LSB3 LSB2 LSB1 LSB0

15 14 13 12 11 10 9 8

CalStart15 CalStart14 CalStart13 CalStart12 CalStart11 CalStart10 CalStart9 CalStart8

76543210

CalStart7 CalStart6 CalStart5 CalStart4 CalStart3 CalStart2 CalStart1 CalStart0

Address: 21 H Address: 22H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

PLconstH

High Word of PL_Constant

PLconstL

Low Word of PL_Constant

Address: 21H

Type: Read/Write

Default Value: 0015H

Bit Name Description

15 - 0 PLcon-

stH[15:0]

The PLconstH[15:0] and PLconstL[15:0] bits are high word and low word of PL_Constant respectively.

PL_Constant is a constant which is proportional to the sampling ratios of voltage and current, and

inversely proportional to the Meter Constant. PL_Constant is a threshold for energy calculated inside the

M90E26, i.e., energy larger than PL_Constant will be accumulated in the corresponding energy registers

and then output on CFx.

It is suggested to set PL_constant as a multiple of 4 so as to double or redouble Meter Constant in low

current state to save verification time.

Note: PLconstH takes effect after PLconstL are configured.

For details, please refer to related application note 46102.

Address: 22H

Type: Read/Write

Default Value: D174H

Bit Name Description

15 - 0 PLcon-

stL[15:0]

The PLconstH[15:0] and PLconstL[15:0] bits are high word and low word of PL_Constant respectively.

It is suggested to set PL_constant as a multiple of 4. For details, please refer to related application note

46102.

15 14 13 12 11 10 9 8

PLconstH15 PLconstH14 PLconstH13 PLconstH12 PLconstH11 PLconstH10 PLconstH9 PLconstH8

76543210

PLconstH7 PLconstH6 PLconstH5 PLconstH4 PLconstH3 PLconstH2 PLconstH1 PLconstH0

15 14 13 12 11 10 9 8

PLconstL15 PLconstL14 PLconstL13 PLconstL12 PLconstL11 PLconstL10 PLconstL9 PLconstL8

76543210

PLconstL7 PLconstL6 PLconstL5 PLconstL4 PLconstL3 PLconstL2 PLconstL1 PLconstL0

Address: 23H Address: 24H Address: 25H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Lgain

L Line Calibration Gain

Lphi

L Line Calibration Angle

Ngain

N Line Calibration Gain

Address: 23H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 Lgain[15:0] L line calibration gain. For details, please refer to related application note 46102.

Address: 24H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 Lphi[15:0] L line calibration phase angle. For details, please refer to related application note 46102.

Address: 25H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 Ngain[15:0] N line calibration gain. For details, please refer to related application note 46102.

15 14 13 12 11 10 9 8

Lgain15 Lgain14 Lgain13 Lgain12 Lgain11 Lgain10 Lgain9 Lgain8

76543210

Lgain7 Lgain6 Lgain5 Lgain4 Lgain3 Lgain2 Lgain1 Lgain0

15 14 13 12 11 10 9 8

Lphi15 - - - - - Lphi9 Lphi8

76543210

Lphi7 Lphi6 Lphi5 Lphi4 Lphi3 Lphi2 Lphi1 Lphi0

15 14 13 12 11 10 9 8

Ngain15 Ngain14 Ngain13 Ngain12 Ngain11 Ngain10 Ngain9 Ngain8

76543210

Ngain7 Ngain6 Ngain5 Ngain4 Ngain3 Ngain2 Ngain1 Ngain0

Address: 26H Address: 27H Address: 28H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

Nphi

N Line Calibration Angle

PStartTh

Active Startup Power Threshold

PNolTh

Active No-Load Power Threshold

Address: 26H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 Nphi[15:0] N line calibration phase angle. For details, please refer to related application note 46102.

Address: 27H

Type: Read/Write

Default Value: 08BDH

Bit Name Description

15 - 0 PStartTh[15:0] Active startup power threshold. For details, please refer to related application note 46102.

Address: 28H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 PNolTh[15:0] Active no-load power threshold. For details, please refer to related application note 46102.

15 14 13 12 11 10 9 8

Nphi15 - - - - - Nphi9 Nphi8

76543210

Nphi7 Nphi6 Nphi5 Nphi4 Nphi3 Nphi2 Nphi1 Nphi0

15 14 13 12 11 10 9 8

PStartTh15 PStartTh14 PStartTh13 PStartTh12 PStartTh11 PStartTh10 PStartTh9 PStartTh8

76543210

PStartTh7 PStartTh6 PStartTh5 PStartTh4 PStartTh3 PStartTh2 PStartTh1 PStartTh0

15 14 13 12 11 10 9 8

PNolTh15 PNolTh14 PNolTh13 PNolTh12 PNolTh11 PNolTh10 PNolTh9 PNolTh8

76543210

PNolTh7 PNolTh6 PNolTh5 PNolTh4 PNolTh3 PNolTh2 PNolTh1 PNolTh0

Address: 29H Address: ZAH AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

QStartTh

Reactive Startup Power Threshold

QNolTh

Reactive No-Load Power Threshold

Address: 29H

Type: Read/Write

Default Value: 0AECH

Bit Name Description

15 - 0 QStartTh[15:0] Reactive startup power threshold. For details, please refer to related application note 46102.

Address: 2AH

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 QNolTh[15:0] Reactive no-load power threshold. For details, please refer to related application note 46102.

15 14 13 12 11 10 9 8

QStartTh15 QStartTh14 QStartTh13 QStartTh12 QStartTh11 QStartTh10 QStartTh9 QStartTh8

76543210

QStartTh7 QStartTh6 QStartTh5 QStartTh4 QStartTh3 QStartTh2 QStartTh1 QStartTh0

15 14 13 12 11 10 9 8

QNolTh15 QNolTh14 QNolTh13 QNolTh12 QNolTh11 QNolTh10 QNolTh9 QNolTh8

76543210

QNolTh7 QNolTh6 QNolTh5 QNolTh4 QNolTh3 QNolTh2 QNolTh1 QNolTh0

Address: ZBH Lgaln2 Lgaln1 Lgalno Current Channel Galn 1 X X 1 0 U 0 4 0 U 1 8 0 1 0 16 0 1 1 24 DIsHPF1 DIsHPF 0 HPF Conflgurallon enable HPF1 and HPFO 0 1 enable HPF1, disable HPFO: 1 0 disable HPF1, enable HPF 1 1 disable HPF1 and HPFO AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

MMode

Metering Mode Configuration

Address: 2BH

Type: Read/Write

Default Value: 9422H

Bit Name Description

15 - 13 Lgain[2:0]

L line current gain, default value is ‘100’.

12 - 11 Ngain[1:0]

N line current gain

00: 2

01: 4

10: 1 (default)

11: 1

10 LNSel

This bit specifies metering as L line or N line when metering mode is set to flexible mode by MMD1 and

MMD0 pins.

0: N line

1: L line (default)

9 - 8 DisHPF[1:0]

These bits configure the High Filter Pass (HPF) after ADC. There are two first-order HPF in serial: HPF1

and HPF0. The configuration are applicable to all channels:

7Amod

CF1 output for active power:

0: forward or reverse energy pulse output (default)

1: absolute energy pulse output

6Rmod

CF2 output for reactive power:

0: forward (inductive) or reverse (capacitive) energy pulse output (default)

1: absolute energy pulse output

15 14 13 12 11 10 9 8

Lgain2 Lgain1 Lgain0 Ngain1 Ngain0 LNSel DisHPF1 DisHPF0

76543210

Amod Rmod ZXCon1 ZXCon0 Pthresh3 Pthresh2 Pthresh1 Pthresh0

Lgain2 Lgain1 Lgain0 Current Channel Gain

1XX 1

000 4

001 8

010 16

011 24

DisHPF1 DisHPF 0 HPF Configuration

enable HPF1 and HPF0

(default)

0 1 enable HPF1, disable HPF0;

1 0 disable HPF1, enable HPF0;

1 1 disable HPF1 and HPF0

Plhresh Plhresh Plhresh 0 U U 0 12.5% 0 U U 1 6.25% 0 U 1 0 3.125% (defaulk) 0 U 1 1 1.5625% 0 1 U 0 1% 0 1 U 1 2% 0 1 1 0 3% 0 1 1 1 4% 1 U U 0 5% 1 U U 1 6% 1 U 1 0 7% 1 U 1 1 8% 1 1 U 0 9% 1 1 U 1 10% 1 1 1 0 11% 1 1 1 1 12% AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

5 - 4 Zxcon[1:0]

These bits configure zero-crossing mode. The ZX pin outputs 5ms-width high level when voltage crosses

zero.

00: positive zero-crossing

01: negative zero-crossing

10: all zero-crossing: both positive and negative zero-crossing (default)

11: no zero-crossing output

3 - 0 Pthresh[3:0]

These bits configure the L line and N line power difference threshold in anti-tampering mode.

Pthresh

1 Pthresh0 Threshold

0000 12.5%

0 0 0 1 6.25%

0 0 1 0 3.125% (default)

0 0 1 1 1.5625%

0100 1%

0101 2%

0110 3%

0111 4%

1000 5%

1001 6%

1010 7%

1011 8%

1100 9%

1 1 0 1 10%

1110 11%

1 1 1 1 12%

Address: ZCH AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

CS1

Checksum 1

Address: 2CH

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 CS1[15:0]

The CS1 register should be written after the 21H-2BH registers are written. Suppose the high byte and

the low byte of the 21H-2BH registers are shown in below table.

The calculation of the CS1 register is as follows:

The low byte of 2CH register is: L2C=MOD(H21+H22+...+H2B+L21+L22+...+L2B, 2^8)

The high byte of 2CH register is: H2C=H21 XOR H22 XOR ... XOR H2B XOR L21 XOR L22 XOR ... XOR

L2B

The M90E26 calculates CS1 regularly. If the value of the CS1 register and the calculation by the M90E26

is different when CalStart=8765H, the CalErr[1:0] bits (SysStatus, 01H) are set and the WarnOut and IRQ

pins are asserted.

Note: The readout value of the CS1 register is the calculation by the M90E26, which is different from

what is written.

15 14 13 12 11 10 9 8

CS1_15 CS1_14 CS1_13 CS1_12 CS1_11 CS1_10 CS1_9 CS1_8

76543210

CS1_7 CS1_6 CS1_5 CS1_4 CS1_3 CS1_2 CS1_1 CS1_0

High

Byte

Low

Byte

21H H21 L21

22H H22 L22

23H H23 L23

24H H24 L24

25H H25 L25

26H H26 L26

27H H27 L27

28H H28 L28

29H H29 L29

2AH H2A L2A

2BH H2B L2B

Address: 30H Address: 31H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

5.3.2 MEASUREMENT CALIBRATION REGISTER

AdjStart

Measurement Calibration Start Command

Ugain

Voltage rms Gain

Address: 30H

Type: Read/Write

Default Value: 6886H

Bit Name Description

15 - 0 AdjStart[15:0]

Measurement Calibration Start Command

6886H: Power-on value. No measurement.

5678H: Measurement calibration startup command. After 5678H is written to this register, registers 31H-

3AH resume to their power-on values. The M90E26 starts to measure regardless of the correct-

ness of diagnosis. The AdjErr[1:0] bits (SysStatus, 01H) are not set and the IRQ pin does not

report any interrupt.

8765H: Check the correctness of the 31H-3AH registers. If correct, normal measurement. If not correct,

measurement function is disabled, the AdjErr[1:0] bits (SysStatus, 01H) are set and the IRQ pin

reports interrupt.

Others: No measurement. The AdjErr[1:0] bits (SysStatus, 01H) are set and the IRQ pin reports interrupt.

Address: 31H

Type: Read/Write

Default Value: 6720H

Bit Name Description

15 - 0 Ugain[15:0] Voltage rms Gain. For details, please refer to related application note 46102.

Note: the Ugain15 bit should only be '0'

15 14 13 12 11 10 9 8

AdjStart15 AdjStart14 AdjStart13 AdjStart12 AdjStart11 AdjStart10 AdjStart9 AdjStart8

76543210

AdjStart7 AdjStart6 AdjStart5 AdjStart4 AdjStart3 AdjStart2 AdjStart1 AdjStart0

15 14 13 12 11 10 9 8

Ugain15 Ugain14 Ugain13 Ugain12 Ugain11 Ugain10 Ugain9 Ugain8

76543210

Ugain7 Ugain6 Ugain5 Ugain4 Ugain3 Ugain2 Ugain1 Ugain0

Address: 32H Address: 33H Address: 34H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

IgainL

L Line Current rms Gain

IgainN

N Line Current rms Gain

Uoffset

Voltage Offset

Address: 32H

Type: Read/Write

Default Value: 7A13H

Bit Name Description

15 - 0 IgainL[15:0] L Line Current rms Gain, For details, please refer to related application note 46102.

Address: 33H

Type: Read/Write

Default Value: 7530H

Bit Name Description

15 - 0 IgainN[15:0] N Line Current rms Gain. For details, please refer to related application note 46102.

Address: 34H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 Uoffset[15:0] Voltage offset. For calculation method, please refer to related application note 46102.

15 14 13 12 11 10 9 8

IgainL15 IgainL14 IgainL13 IgainL12 IgainL11 IgainL10 IgainL9 IgainL8

76543210

IgainL7 IgainL6 IgainL5 IgainL4 IgainL3 IgainL2 IgainL1 IgainL0

15 14 13 12 11 10 9 8

IgainN15 IgainN14 IgainN13 IgainN12 IgainN11 IgainN10 IgainN9 IgainN8

76543210

IgainN7 IgainN6 IgainN5 IgainN4 IgainN3 IgainN2 IgainN1 IgainN0

15 14 13 12 11 10 9 8

Uoffset15 Uoffset14 Uoffset13 Uoffset12 Uoffset11 Uoffset10 Uoffset9 Uoffset8

76543210

Uoffset7 Uoffset6 Uoffset5 Uoffset4 Uoffset3 Uoffset2 Uoffset1 Uoffset0

Address: 35H Address: 36H Address: 37H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

IoffsetL

L Line Current Offset

IoffsetN

N Line Current Offset

PoffsetL

L Line Active Power Offset

Address: 35H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 IoffsetL[15:0] L line current offset. For calculation method, please refer to related application note 46102.

Address: 36H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 IoffsetN[15:0] N line current offset. For calculation method, please refer to related application note 46102.

Address: 37H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 PoffsetL[15:0] L line active power offset.

Complement, MSB is the sign bit. For calculation method, please refer to related application note 46102.

15 14 13 12 11 10 9 8

IoffsetL15 IoffsetL14 IoffsetL13 IoffsetL12 IoffsetL11 IoffsetL10 IoffsetL9 IoffsetL8

76543210

IoffsetL7 IoffsetL6 IoffsetL5 IoffsetL4 IoffsetL3 IoffsetL2 IoffsetL1 IoffsetL0

15 14 13 12 11 10 9 8

IoffsetN15 IoffsetN14 IoffsetN13 IoffsetN12 IoffsetN11 IoffsetN10 IoffsetN9 IoffsetN8

76543210

IoffsetN7 IoffsetN6 IoffsetN5 IoffsetN4 IoffsetN3 IoffsetN2 IoffsetN1 IoffsetN0

15 14 13 12 11 10 9 8

PoffsetL15 PoffsetL14 PoffsetL13 PoffsetL12 PoffsetL11 PoffsetL10 PoffsetL9 PoffsetL8

76543210

PoffsetL7 PoffsetL6 PoffsetL5 PoffsetL4 PoffsetL3 PoffsetL2 PoffsetL1 PoffsetL0

Address: 38H Address: 39H Address: 3AH AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

QoffsetL

L Line Reactive Power Offset

PoffsetN

N Line Active Power Offset

QoffsetN

N Line Reactive Power Offset

Address: 38H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 QoffsetL[15:0] L line reactive power offset.

Complement, MSB is the sign bit. For calculation method, please refer to related application note 46102.

Address: 39H

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 PoffsetN[15:0] N line active power offset.

Complement, MSB is the sign bit. For calculation method, please refer to related application note 46102.

Address: 3AH

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 QoffsetN[15:0] N line reactive power offset.

Complement, MSB is the sign bit. For calculation method, please refer to related application note 46102.

15 14 13 12 11 10 9 8

QoffsetL15 QoffsetL14 QoffsetL13 QoffsetL12 QoffsetL11 QoffsetL10 QoffsetL9 QoffsetL8

76543210

QoffsetL7 QoffsetL6 QoffsetL5 QoffsetL4 QoffsetL3 QoffsetL2 QoffsetL1 QoffsetL0

15 14 13 12 11 10 9 8

PoffsetN15 PoffsetN14 PoffsetN13 PoffsetN12 PoffsetN11 PoffsetN10 PoffsetN9 PoffsetN8

76543210

PoffsetN7 PoffsetN6 PoffsetN5 PoffsetN4 PoffsetN3 PoffsetN2 PoffsetN1 PoffsetN0

15 14 13 12 11 10 9 8

QoffsetN15 QoffsetN14 QoffsetN13 QoffsetN12 QoffsetN11 QoffsetN10 QoffsetN9 QoffsetN8

76543210

QoffsetN7 QoffsetN6 QoffsetN5 QoffsetN4 QoffsetN3 QoffsetN2 QoffsetN1 QoffsetN0

Address: SBH AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

CS2

Checksum 2

Address: 3BH

Type: Read/Write

Default Value: 0000H

Bit Name Description

15 - 0 CS2[15:0]

The CS2 register should be written after the 31H-3AH registers are written. Suppose the high byte and

the low byte of the 31H-3AH registers are shown in below table.

The calculation of the CS2 register is as follows:

The low byte of 3BH register is: L3B=MOD(H31+H32+...+H3A+L31+L32+...+L3A, 2^8)

The high byte of 3BH register is: H3B=H31 XOR H32 XOR ... XOR H3A XOR L31 XOR L32 XOR ... XOR

L3A

The M90E26 calculates CS2 regularly. If the value of the CS2 register and the calculation by the M90E26

is different when AdjStart=8765H, the AdjErr[1:0] bits (SysStatus, 01H) are set.

Note: The readout value of the CS2 register is the calculation by the M90E26, which is different from

what is written.

15 14 13 12 11 10 9 8

CS2_15 CS2_14 CS2_13 CS2_12 CS2_11 CS2_10 CS2_9 CS2_8

76543210

CS2_7 CS2_6 CS2_5 CS2_4 CS2_3 CS2_2 CS2_1 CS2_0

High

Byte

Low

Byte

31H H31 L31

32H H32 L32

33H H33 L33

34H H34 L34

35H H35 L35

36H H36 L36

37H H37 L37

38H H38 L38

39H H39 L39

3AH H3A L3A

Theom of Enemy Registers Address: 40H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

5.4 ENERGY REGISTER

Theory of Energy Registers

The internal energy resolution is 0.01 pulse. Within 0.01 pulse, forward and reverse energy are counteracted. When energy exceeds

0.01 pulse, the respective forward/reserve energy is increased. The forward and reverse energy are not counteracted in absolute energy

registers. Take the example of active energy, suppose:

T0: Forward energy is 12.34 pulses and reverse energy is 1.23 pulses;

From T0 to T1: 0.005 forward pulse appeared

From T1 to T2: 0.004 reverse pulse appeared

From T2 to T3: 0.003 reverse pulse appeared

When forward/reverse energy or absolute energy reaches 0.1 pulse, the respective register is updated. When forward/reverse energy or

absolute energy reaches 1 pulse, CFx pins output pulse and the REVP/REVQ bits (EnStatus, 46H) are updated.

Absolute energy might be more than the sum of forward and reverse energies. If “consistency” is required between absolute energy and

forward/reverse energy in system application, absolute energy can be obtained by calculating the readout of the forward and reverse

energy registers.

APenergy

Forward Active Energy

T0 T1 T2 T3

Forward Active Pulse 12.34 12.345 12.341 12.34

Reserve Active Pulse 1.23 1.23 1.23 1.232

Absolute Active Pulse 13.57 13.575 13.579 13.582

Address: 40H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 APenergy[15:0]

Forward active energy; cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

15 14 13 12 11 10 9 8

APenergy15 APenergy14 APenergy13 APenergy12 APenergy11 APenergy10 APenergy9 APenergy8

76543210

APenergy7 APenergy6 APenergy5 APenergy4 APenergy3 APenergy2 APenergy1 APenergy0

Address: 41 H Address: 42H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

ANenergy

Reverse Active Energy

ATenergy

Absolute Active Energy

Address: 41H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 ANenergy[15:0]

Reverse active energy, cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

Address: 42H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 ATenergy[15:0]

Absolute active energy, cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

15 14 13 12 11 10 9 8

ANenergy15 ANenergy14 ANenergy13 ANenergy12 ANenergy11 ANenergy10 ANenergy9 ANenergy8

76543210

ANenergy7 ANenergy6 ANenergy5 ANenergy4 ANenergy3 ANenergy2 ANenergy1 ANenergy0

15 14 13 12 11 10 9 8

ATenergy15 ATenergy14 ATenergy13 ATenergy12 ATenergy11 ATenergy10 ATenergy9 ATenergy8

76543210

ATenergy7 ATenergy6 ATenergy5 ATenergy4 ATenergy3 ATenergy2 ATenergy1 ATenergy0

Address: 43H Address: 44H AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

RPenergy

Forward (Inductive) Reactive Energy

RNenergy

Reverse (Capacitive) Reactive Energy

Address: 43H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 RPenergy[15:0]

Forward (inductive) reactive energy, cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

Address: 44H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 RNenergy[15:0]

Reverse (capacitive) reactive energy, cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

15 14 13 12 11 10 9 8

RPenergy15 RPenergy14 RPenergy13 RPenergy12 RPenergy11 RPenergy10 RPenergy9 RPenergy8

76543210

RPenergy7 RPenergy6 RPenergy5 RPenergy4 RPenergy3 RPenergy2 RPenergy1 RPenergy0

15 14 13 12 11 10 9 8

RNenergy15 RNenergy14 RNenergy13 RNenergy12 RNenergy11 RNenergy10 RNenergy9 RNenergy8

76543210

RNenergy7 RNenergy6 RNenergy5 RNenergy4 RNenergy3 RNenergy2 RNenergy1 RNenergy0

Address: 45H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

RTenergy

Absolute Reactive Energy

Address: 45H

Type: Read/Clear

Default Value: 0000H

Bit Name Description

15 - 0 RTenergy[15:0]

Absolute reactive energy, cleared after read.

Data format is XXXX.X pulses. Resolution is 0.1 pulse. Maximum is 6553.5 pulses.

When the accumulation of this register has achieved FFFFH, the continuation accumulation will return to

0000H.

15 14 13 12 11 10 9 8

RTenergy15 RTenergy14 RTenergy13 RTenergy12 RTenergy11 RTenergy10 RTenergy9 RTenergy8

76543210

RTenergy7 RTenergy6 RTenergy5 RTenergy4 RTenergy3 RTenergy2 RTenergy1 RTenergy0

Address: 46H MMD1 MMDO LNmod1 LNmodo LIN Melerlng Mode 0 0 0 0 anll-lampering mode (larger power) 0 1 0 1 L Ilne mode (llxed L line) L+N mode (appllcable for slngle»phase three» Flexible mode (Llne speciﬁed by the LNSeI bll AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

EnStatus

Metering Status

Address: 46H

Type: Read

Default Value After Power On: C800H

Bit Name Description

15 Qnoload

This bit indicates whether the M90E26 is in reactive no-load status.

0: not reactive no-load state

1: reactive no-load state

14 Pnoload

This bit indicates whether the M90E26 is in active no-load status.

0: not active no-load state

1: active no-load state

13 RevQ

This bit indicates the direction of the last CF2 (reactive output).

0: reactive forward

1: reactive reverse

Note: This bit is always '0' when the CF2 output is configured to be absolute energy.

12 RevP

This bit indicates the direction of the last CF1 (active output).

0: active forward

1: active reverse

Note: This bit is always '0' when the CF1 output is configured to be absolute energy.

11 Lline

This bit indicates the current metering line in anti-tampering mode.

0: N line

1: L line

10 - 2 - Reserved.

1 - 0 LNMode[1:0]

These bits indicate the configuration of MMD1 and MMD0 pins. Their relationship is as follows:

15 14 13 12 11 10 9 8

Qnoload Pnoload RevQ RevP Lline - - -

76543210

- - - - - - LNMode1 LNMode0

MMD1 MMD0 LNmod1 LNmod0 L/N Metering Mode

0000 anti-tampering mode (larger power)

0101 L line mode (fixed L line)

1010

L+N mode (applicable for single-phase three-

wire system)

1111

Flexible mode (Line specified by the LNSel bit

(MMode, 2BH))

Address: 48H Address: 49H AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

5.5 MEASUREMENT REGISTER

Irms

L Line Current rms

Urms

Voltage rms

Address: 48H

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Irms[15:0]

L line current rms.

Data format is XX.XXX, which corresponds to 0 ~ 65.535A.

For cases when the current exceeds 65.535A, it is suggested to be handled by MCU in application. For

example, the register value can be calibrated to 1/2 of the actual value during calibration, then multiplied

by 2 in application.

Address: 49H

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Urms[15:0] Voltage rms.

Data format is XXX.XX, which corresponds to 0 ~ 655.35V.

15 14 13 12 11 10 9 8

Irms15 Irms14 Irms13 Irms12 Irms11 Irms10 Irms9 Irms8

76543210

Irms7 Irms6 Irms5 Irms4 Irms3 Irms2 Irms1 Irms0

15 14 13 12 11 10 9 8

Urms15 Urms14 Urms13 Urms12 Urms11 Urms10 Urms9 Urms8

76543210

Urms7 Urms6 Urms5 Urms4 Urms3 Urms2 Urms1 Urms0

Address: 4AH Address: 4BH AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

Pmean

L Line Mean Active Power

Qmean

L Line Mean Reactive Power

Address: 4AH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Pmean[15:0]

L line mean active power.

Complement, MSB is the sign bit. Data format is XX.XXX, which corresponds to -32.768~+32.768kW.

If current is specially handle by MCU, the power of the M90E26 and the actual power have the same mul-

tiple relationship as the current.

Address: 4BH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Qmean[15:0]

L line mean reactive power.

Complement, MSB is the sign bit. Data format is XX.XXX, which corresponds to -32.768~+32.768kvar.

If current is specially handled by MCU, the power of the M90E26 and the actual power have the same

multiple relationship as the current.

15 14 13 12 11 10 9 8

Pmean15 Pmean14 Pmean13 Pmean12 Pmean11 Pmean10 Pmean9 Pmean8

76543210

Pmean7 Pmean6 Pmean5 Pmean4 Pmean3 Pmean2 Pmean1 Pmean0

15 14 13 12 11 10 9 8

Qmean15 Qmean14 Qmean13 Qmean12 Qmean11 Qmean10 Qmean9 Qmean8

76543210

Qmean7 Qmean6 Qmean5 Qmean4 Qmean3 Qmean2 Qmean1 Qmean0

Address: 4CH Address: 4DH AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Freq

Voltage Frequency

PowerF

L Line Power Factor

Address: 4CH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Freq[15:0]

Voltage frequency.

Data format is XX.XX. Frequency measurement range is 45.00~65.00Hz. For example, 1388H corre-

sponds to 50.00Hz.

Address: 4DH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 PowerF[15:0]

L line power factor.

Signed, MSB is the sign bit. Data format is X.XXX. Power factor range: -1.000~+1.000. For example, 03E

8H corresponds to the power factor of 1.000, and 83E8H corresponds to the power factor of -1.000.

15 14 13 12 11 10 9 8

Freq15 Freq14 Freq13 Freq12 Freq11 Freq10 Freq9 Freq8

76543210

Freq7 Freq6 Freq5 Freq4 Freq3 Freq2 Freq1 Freq0

15 14 13 12 11 10 9 8

PowerF15 PowerF14 PowerF13 PowerF12 PowerF11 PowerF10 PowerF9 PowerF8

76543210

PowerF7 PowerF6 PowerF5 PowerF4 PowerF3 PowerF2 PowerF1 PowerF0

Address: 4EH Address: 4FH AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

Pangle

Phase Angle between Voltage and L Line Current

Smean

L Line Mean Apparent Power

Address: 4EH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Pangle[15:0] L line voltage current angle.

Signed, MSB is the sign bit. Data format is XXX.X. Angle range: -180.0~+180.0 degree.

Address: 4FH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Smean[15:0]

L line mean apparent power.

Complement, MSB is always '0'. Data format is XX.XXX, which corresponds to 0~+32.767kVA.

If current is specially handled by MCU, the power of the M90E26 and the actual power have the same

multiple relationship as the current.

15 14 13 12 11 10 9 8

Pangle15 Pangle14 Pangle13 Pangle12 Pangle11 Pangle10 Pangle9 Pangle8

76543210

Pangle7 Pangle6 Pangle5 Pangle4 Pangle3 Pangle2 Pangle1 Pangle0

15 14 13 12 11 10 9 8

Smean15 Smean14 Smean13 Smean12 Smean11 Smean10 Smean9 Smean8

76543210

Smean7 Smean6 Smean5 Smean4 Smean3 Smean2 Smean1 Smean0

Address: 68H Address: 6AH AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Irms2

N Line Current rms

Pmean2

N Line Mean Active Power

Address: 68H

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Irms2[15:0]

N line current rms.

Data format is XX.XXX, which corresponds to 65.535A.

For cases when the current exceeds 65.535A, it is suggested to be handled by MCU in application. For

example, the register value can be calibrated to 1/2 of the actual value during calibration, then multiplied

by 2 in application.

Address: 6AH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Pmean2[15:0]

N line mean active power.

Complement, MSB is the sign bit. Data format is XX.XXX, which corresponds to -32.768~+32.767kW.

If current is specially handled by MCU, the power of the M90E26 and the actual power have the same

multiple relationship as the current.

15 14 13 12 11 10 9 8

Irms2_15 Irms2_14 Irms2_13 Irms2_12 Irms2_11 Irms2_10 Irms2_9 Irms2_8

76543210

Irms2_7 Irms2_6 Irms2_5 Irms2_4 Irms2_3 Irms2_2 Irms2_1 Irms2_0

15 14 13 12 11 10 9 8

Pmean2_15 Pmean2_14 Pmean2_13 Pmean2_12 Pmean2_11 Pmean2_10 Pmean2_9 Pmean2_8

76543210

Pmean2_7 Pmean2_6 Pmean2_5 Pmean2_4 Pmean2_3 Pmean2_2 Pmean2_1 Pmean2_0

Address: 65H Address: 6DH AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

Qmean2

N Line Mean Reactive Power

PowerF2

N Line Power Factor

Address: 6BH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Qmean2[15:0]

N line mean reactive power.

Complement, MSB is the sign bit. Data format is XX.XXX, which corresponds to -32.768~+32.767kvar.

If current is specially handled by MCU, the power of M90E26 and the actual power have the same multi-

ple relationship as the current.

Address: 6DH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 PowerF2[15:0]

N line power factor.

Signed, MSB is the sign bit. Data format is X.XXX. Power factor range: -1.000~+1.000. For example, 03E

8H corresponds to the power factor of 1.000, and 83E8H corresponds to the power factor of -1.000.

15 14 13 12 11 10 9 8

Qmean2_15 Qmean2_14 Qmean2_13 Qmean2_12 Qmean2_11 Qmean2_10 Qmean2_9 Qmean2_8

76543210

Qmean2_7 Qmean2_6 Qmean2_5 Qmean2_4 Qmean2_3 Qmean2_2 Qmean2_1 Qmean2_0

15 14 13 12 11 10 9 8

PowerF2_15 PowerF2_14 PowerF2_13 PowerF2_12 PowerF2_11 PowerF2_10 PowerF2_9 PowerF2_8

76543210

PowerF2_7 PowerF2_6 PowerF2_5 PowerF2_4 PowerF2_3 PowerF2_2 PowerF2_1 PowerF2_0

Address: 6EH Address: 6FH AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Pangle2

Phase Angle between Voltage and N Line Current

Smean2

N Line Mean Apparent Power

Address: 6EH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Pangle2[15:0] N line voltage current angle

Signed, MSB is the sign bit. Data format is XXX.X. Angle range: -180.0~+180.0 degree.

Address: 6FH

Type: Read

Default Value: 0000H

Bit Name Description

15 - 0 Smean2[15:0]

N line mean apparent power

Complement, MSB is always '0'. Data format is XX.XXX, which corresponds to 0~+32.767kVA.

If current is specially handled by MCU, the power of M90E26 and the actual power have the same multi-

ple relationship as the current.

15 14 13 12 11 10 9 8

Pangle2_15 Pangle2_14 Pangle2_13 Pangle2_12 Pangle2_11 Pangle2_10 Pangle2_9 Pangle2_8

76543210

Pangle2_7 Pangle2_6 Pangle2_5 Pangle2_4 Pangle2_3 Pangle2_2 Pangle2_1 Pangle2_0

15 14 13 12 11 10 9 8

Smean2_15 Smean2_14 Smean2_13 Smean2_12 Smean2_11 Smean2_10 Smean2_9 Smean2_8

76543210

Smean2_7 Smean2_6 Smean2_5 Smean2_4 Smean2_3 Smean2_2 Smean2_1 Smean2_0

Accuracy AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

6 ELECTRICAL SPECIFICATION

6.1 ELECTRICAL SPECIFICATION

Parameters and Description Min. Typical Max. Unit Test Conditions and Comments

Accuracy

DC Power Supply Rejection Ratio (PSRR) ±0.1 %

VDD=3.3V±0.3V, 100Hz, I=5A, V=220V,

L line shunt resistor 150μΩ, N line CT

1000:1, sampling resistor 4.8Ω

AC Power Supply Rejection Ratio (PSRR) ±0.1 %

VDD=3.3V superimposes 400mVrms,

100Hz Sinusoidal signal, I=5A, V=220V,

L line shunt resistor 150μΩ, N line CT

1000:1, sampling resistor 4.8Ω

Active Energy Error (Dynamic Range

5000:1) ±0.1 %

L line current gain is ‘24’; N line current

gain is ‘1’

Measurement Error ±0.5 %

Channel Characteristics

Sampling Frequency 8 kHz

Harmonic Metering (active and reactive)

Bandwidth 1.1 kHz

1% total energy metering error limit;

V-harmonic <= 10% of fundamental;

I-harmonic<=40% of fundamental

Line Frequency

47.5-62.5 Hz Active energy metering

47.5-52.5 Hz Reactive energy metering

Analog Input

L Line Current Channel Differential Input

5μ25m

Vrms

PGA gain is ‘24’

7.5μ37.5m PGA gain is ‘16’

15μ75m PGA gain is ‘8’

30μ150m PGA gain is ‘4’

120μ600m PGA gain is ‘1’

N Line Current Channel Differential Input 120μ600m Vrms DPGA gain is ‘1’

Voltage Channel Differential Input 120μ600m Vrms DPGA gain is ‘1’

L Line Current Channel Input Impedance 1 kΩsingle-ended impedance

N Line Current Channel Input Impedance 400 kΩsingle-ended impedance

Voltage Channel Input Impedance 400 kΩsingle-ended impedance

L Line Current Channel DC Offset 10 mV PGA gain is ‘24’

N Line Current Channel DC Offset 10 mV

Voltage Channel DC Offset 10 mV

Reference

On-Chip Reference 1.26 V

Reference Voltage Temperature Coeffi-

cient ±15 ±40 ppm/°C

Clock

Crystal or External Clock 8.192 MHz

The Accuracy of crystal or external clock

is ±100 ppm

SPI/UART Interface

SPI Interface Bit Rate 200 160k bps

UART Interface Baud Rate

2400 or

9600 bps

Baud rate of 2400 and 9600 is automati-

cally detected.

UART Interface Tolerance ±2%

AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

Pulse Width

CFx Pulse Width 80 ms

If T ≥160 ms, width=80ms; if T<160 ms,

width = 0.5T. Refer to Section 6.6

ESD

Charged Device Model (CDM) 500 V JESD22-C101

Human Body Model (HBM) 2000 V JESD22-A114

Latch Up ±100 mA JESD78A

Latch Up 4.95 V JESD78A

Operating Conditions

AVDD, Analog Power Supply 2.8 3.3 3.6 V

Metering precision guaranteed within

3.0V~3.6V.

DVDD, Digital Power Supply 2.8 3.3 3.6 V

Metering precision guaranteed within

3.0V~3.6V.

IAVDD, Analog Current 3.4 mA

VDD=3.3V, T=25°C, Vref decoupling

capacitor is 1μF.

IDVDD, Digital Current 2.4 mA

VDD=3.3V, T=25°C, Vref decoupling

capacitor is 1μF.

DC Characteristics

Digital Input High Level (pin 1, 4, 24, 25,

27 and 28) 2.0 5.5 V VDD=3.3V±10%,

Digital Input High Level (pin 9, 12 and 22) 2.0 VDD+0.3 V VDD=3.3V±10%

Digital Input Low Level 0.8 V VDD=3.3V±10%

Digital Input Leakage Current ±1μA VDD=3.6V, VI=VDD or GND

Digital Output Low Level 0.4 V VDD=3.3V, IOL=10mA

Digital Output High Level 2.4 V VDD=3.3V, IOH=-10mA

Digital Output Low Level (OSCO) 0.4 V VDD=3.3V, IOL=1mA

Digital Output High Level (OSCO) 2.4 V VDD=3.3V, IOH=-1mA

AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

6.2 SPI INTERFACE TIMING

The SPI interface timing is as shown in Figure-10, Figure-11 and Table-11.

Figure-10 4-Wire SPI Timing Diagram

Figure-11 3-Wire SPI Timing Diagram

Table-11 SPI Timing Specification

Symbol Description Min. Typical Max. Unit

tCSH

note 1

Minimum CS High Level Time 30T

note 2

+10 ns

tCSS

note 1

CS Setup Time 3T+10 ns

tCSD

note 1

CS Hold Time 30T+10 ns

tCLD

note 1

Clock Disable Time 1T ns

tCLH Clock High Level Time 30T+10 ns

tCLL Clock Low Level Time 16T+10 ns

tDIS Data Setup Time 3T+10 ns

SCLK

SDI

SDO

tCSH

tCSS

High Impedance High Impedance

tCSD

tCLH tCLL

tDIS tDIH

tPD tDF

Valid Input

Valid Output

tCLD

tDW

SCLK

SDI

SDO High Impedance High Impedance

tCLH tCLL

tDIS tDIH

tPD

Valid Input

Valid Output

tDW

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

6.3 POWER ON RESET TIMING

Figure-12 Power On Reset Timing Diagram

tDIH Data Hold Time 22T+10 ns

tDW Minimum Data Width 30T+10 ns

tPD Output Delay 14T 15T+20 ns

tDF

note 1

Output Disable Time 16T+20 ns

Note:

1. Not applicable for three-wire SPI.

2. T means SCLK cycle. T=122ns. (Typical value for four-wire SPI)

Table-12 Power On Reset Specification

Symbol Description Min. Typical Max. Unit

VHPower On Trigger Voltage 2.375 2.5 2.625 V

VLPower Off Trigger Voltage 2.185 2.3 2.415 V

VH-VLHysteretic Voltage Difference 0.2 V

T1Delay Time After Power On 5 ms

T2Delay Time After Power Off 10 μs

Table-11 SPI Timing Specification (Continued)

DVDD

RESET

V | v;

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

6.4 ZERO-CROSSING TIMING

Figure-13 Zero-Crossing Timing Diagram

6.5 VOLTAGE SAG TIMING

Figure-14 Voltage Sag Timing Diagram

Table-13 Zero-Crossing Specification

Symbol Description Min. Typical Max. Unit

TZX High Level Width 5 ms

TDDelay Time 0.5 ms

(Positive zero-crossing)

(Negative zero-crossing)

(All zero-crossing)

TZX

Voltage Sag

Threshold

WarnOut

IRQ

Voltage Sag

Threshold

Green SSOPZB 49 “CNV No Awrﬂow ‘ AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

6.6 PULSE OUTPUT

Figure-15 Output Pulse Width

6.7 ABSOLUTE MAXIMUM RATING

Table-14 Voltage Sag Specification

Symbol Description Min. Typical Max. Unit

TDDelay Time 0.5 ms

Parameter Maximum Limit

Relative Voltage Between AVDD and AGND -0.3V~3.7V

Relative Voltage Between DVDD and DGND -0.3V~3.7V

Analog Input Voltage (I1P, I1N, I2P, I2N, VP, VN) -1V~VDD

Digital Input Voltage -0.3V~VDD+2.6V

Operating Temperature Range -40~85 °C

Maximum Junction Temperature 150 °C

Package Type Thermal Resistance θJA Unit Condition

Green SSOP28 49 °C/W No Airflow

CFx

Tp=80ms

Tp=0.5T

T≥160ms 10ms≤T<160ms

Tp=5ms

if T<10ms,

force T=10ms

AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

ORDERING INFORMATION

Atmel Ordering Code Package Carrier Temperature Range

ATM90E26-YU-R SSOP28 Tape&Reel Industry (-40°C to +85°C)

ATM90E26-YU-B SSOP28 Tube Industry (-40°C to +85°C)

mm DETAIL ‘A’ SIDE VIEW E1 5 20 5 30 5 38 2 0,65 550 R 009 Atmel AtmeL

M90E26 [DATASHEET]

Atmel-46002B-SE-M90E26-Datasheet_110714

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AtmeL

M90E26 [Datasheet]

Atmel-46002B-SE-M90E26-Datasheet_110714

REVISION HISTORY

Doc. Rev. Date Comments

46002A 4/18/2014 Initial document release.

46002B 11/7/2014 Removed Preliminary.

AtmeE ‘ Enabling Unlimited Possibilities” a [111

XXX

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