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Designed for 2.3 v 10 3.a v vcc Operation
5 v Tolerunl Inputs — Interface Cnpabilily wiln 5 v TTL Logic
LVTTL Compatible
LVCMOS Compulihle
24 mA Balanced Ourpul Sink and Source Capability
Neur Zem Slalic Supply Current (10 uA) Subslnntially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance: Human Body Model >20“) V
Machine Model >200 V
NLV Prefix for Aulomolive and Ollier Applications Requiring
Unique Site and Control Change Requirements; AEC—QIUU
Qualified and PPAP Capable
These Devices are Fla—Free, Halogen Free/BFR Free and are RoHS
Compliant
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amber, 2012 — Rev. 3
ON Semiconductor®
SOIC-M
‘ D SUFFIX
CASE 75|A
TSSOP—I 4
‘4 DT SUFFIX
CASE 9435
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ORDERING INFORM
See detalled amenng and shlpplng lnlnlm
dlmenslans secllcm on page 4 of ms :15
Publicalia
Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 8
Publication Order Number:
MC74LCX00/D
1
MC74LCX00
Low-Voltage CMOS Quad
2-Input NAND Gate
With 5 V−Tolerant Inputs
The MC74LCX00 is a high performance, quad 2−input NAND gate
operating from a 2.3 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows MC74LCX00 inputs to be safely driven
from 5 V devices.
Current drive capability is 24 mA at the outputs.
Features
Designed for 2.3 V to 3.6 V VCC Operation
5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current (10 mA) Substantially Reduces
System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOIC−14
D SUFFIX
CASE 751A
14
1
MARKING
DIAGRAMS
LCX
00
ALYWG
G
LCX00G
AWLYWW
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
G or G=Pb−Free Package
14
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
1
14
http://onsemi.com
(Note: Microdot may be in either location)
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MC74LCX00
http://onsemi.com
2
Figure 1. Pinout: 14-lead (Top View)
1314 12 11 10 9 8
21 34567
VCC A2 B2 O2 A3 B3 O3
A0 B0 O0 A1 B1 O1 GND
Figure 2. Logic Diagram
3O0
1
A0
2
B0
6O1
4
A1
5
B1
11 O2
13
A2
12
B2
8O3
10
A3
9
B3
PIN NAMES
Pins Function
An, Bn Data Inputs
On Outputs
TRUTH TABLE
Inputs Outputs
An Bn On
L L H
L H H
H L H
H H L
H = High Voltage Level
L = Low Voltage Level
For ICC reasons, DO NOT FLOAT Inputs
MAXIMUM RATINGS
Symbol Parameter Value Condition Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIDC Input Voltage −0.5 VI +7.0 V
VODC Output Voltage −0.5 VO VCC + 0.5 Output in HIGH or LOW State (Note 1) V
IIK DC Input Diode Current −50 VI < GND mA
IOK DC Output Diode Current −50 VO < GND mA
+50 VO > VCC mA
IODC Output Source/Sink Current 50 mA
ICC DC Supply Current Per Supply Pin 100 mA
IGND DC Ground Current Per Ground Pin 100 mA
TSTG Storage Temperature Range −65 to +150 C
MSL Moisture Sensitivity Level 1
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
MC74LCX00
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3
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Type Max Unit
VCC Supply Voltage Operating
Data Retention Only
2.0
1.5
2.5, 3.3
2.5, 3.3
3.6
3.6
V
VIInput Voltage 0 5.5 V
VOOutput Voltage (HIGH or LOW State)
(3−State)
0 VCC V
IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
−24
−12
−8
mA
IOL LOW Level Output Current VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
VCC = 2.3 V − 2.7 V
+24
+12
+8
mA
TAOperating Free−Air Temperature −40 +85 C
Dt/DVInput Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V
DC ELECTRICAL CHARACTERISTICS
TA = −40C to +85C
Symbol Characteristic Condition Min Max Unit
VIH HIGH Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 1.7 V
2.7 V VCC 3.6 V 2.0
VIL LOW Level Input Voltage (Note 2) 2.3 V VCC 2.7 V 0.7 V
2.7 V VCC 3.6 V 0.8
VOH HIGH Level Output Voltage 2.3 V VCC 3.6 V; IOH = −100 mAVCC −0.2 V
VCC = 2.3 V; IOH = −8 mA 1.8
VCC = 2.7 V; IOH = −12 mA 2.2
VCC = 3.0 V; IOH = −18 mA 2.4
VCC = 3.0 V; IOH = −24 mA 2.2
VOL LOW Level Output Voltage 2.3 V VCC 3.6 V; IOL = 100 mA0.2 V
VCC = 2.3 V; IOL = 8 mA 0.6
VCC = 2.7 V; IOL = 12 mA 0.4
VCC = 3.0 V; IOL = 16 mA 0.4
VCC = 3.0 V; IOL = 24 mA 0.55
IOFF Power Off Leakage Current VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA
IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND 5mA
ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA
DICC Increase in ICC per Input 2.3 VCC 3.6 V; VIH = VCC − 0.6 V 500 mA
2. These values of VI are used to test DC electrical characteristics only.
MC74LCX00
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4
AC CHARACTERISTICS (tR = tF = 2.5 ns; RL = 500 W)
Limits
TA = −40C to +85C
VCC = 3.3 V 0.3 V VCC = 2.7 V VCC = 2.5 V 0.2 V
CL = 50 pF CL = 50 pF CL = 30 pF
Symbol Parameter Waveform Min Max Min Max Min Max Unit
tPLH Propagation Delay Time 1 1.5 5.5 1.5 6.2 1.5 6.6 ns
tPHL Input−to−Output 1.5 5.5 1.5 6.2 1.5 6.6
tOSHL Output−to−Output Skew 1.0 ns
tOSLH (Note 3) 1.0
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25C
Symbol Characteristic Condition Min Typ Max Unit
VOLP Dynamic LOW Peak Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V 0.8 V
(Note 4) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.6 V
VOLV Dynamic LOW Valley Voltage VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V −0.8 V
(Note 4) VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.6 V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol Parameter Condition Typical Unit
CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF
COUT Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF
CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 25 pF
ORDERING INFORMATION
Device Package Shipping†
MC74LCX00DG SOIC−14
(Pb−Free)
55 Units / Rail
MC74LCX00DR2G SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LCX00DTG TSSOP−14
(Pb−Free)
96 Units / Rail
MC74LCX00DTR2G TSSOP−14
(Pb−Free)
2500 Tape & Reel
NLV74LCX00DTR2G* TSSOP−14
(Pb−Free)
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
:33:
:25:
MC74LCX00
http://onsemi.com
5
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Vcc
0 V
VOH
VOL
An, Bn
On
tPLH
tPHL
Vmi
Vmo
Vmi
Vmo
Vcc
Symbol 3.3 V + 0.3 V 2.7 V 2.5 V + 0.2 V
Vmi 1.5 V 1.5 V Vcc/2
Vmo 1.5 V 1.5 V Vcc/2
Figure 3. AC Waveforms
PULSE
GENERATOR
RT
DUT
VCC
RL
CL
CL= 50 pF at VCC = 3.3 + 0.3 V or equivalent (includes jig and probe capacitance)
CL= 30 pF at VCC = 2.5 + 0.2 V or equivalent (includes jig and probe capacitance)
RL= R1 = 500 W or equivalent
RT= ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
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MC74LCX00
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6
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
SECTION N−N
DETAIL E
JJ1
K
K1
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
.7
I3
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7
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
H
14 8
71
M
0.25 B M
C
h
X 45
SEATING
PLANE
A1
A
M
_
S
A
M
0.25 B S
C
b
13X
B
A
E
D
e
DETAIL A
L
A3
DETAIL A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
D8.55 8.75 0.337 0.344
E3.80 4.00 0.150 0.157
A1.35 1.75 0.054 0.068
b0.35 0.49 0.014 0.019
L0.40 1.25 0.016 0.049
e1.27 BSC 0.050 BSC
A3 0.19 0.25 0.008 0.010
A1 0.10 0.25 0.004 0.010
M0 7 0 7
H5.80 6.20 0.228 0.244
h0.25 0.50 0.010 0.019
__ __
6.50
14X
0.58
14X
1.18
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
MC74LCX00/D
LITERATURE FULFILLMENT:
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